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a0ae9c7c AB |
1 | config PPC64 |
2 | bool "64-bit kernel" | |
3 | default n | |
105988c0 | 4 | select PPC_HAVE_PMU_SUPPORT |
a0ae9c7c AB |
5 | help |
6 | This option selects whether a 32-bit or a 64-bit kernel | |
7 | will be built. | |
8 | ||
9 | menu "Processor support" | |
10 | choice | |
11 | prompt "Processor Type" | |
12 | depends on PPC32 | |
a0ae9c7c | 13 | help |
b9fd305d AB |
14 | There are five families of 32 bit PowerPC chips supported. |
15 | The most common ones are the desktop and server CPUs (601, 603, | |
16 | 604, 740, 750, 74xx) CPUs from Freescale and IBM, with their | |
e177edcd | 17 | embedded 512x/52xx/82xx/83xx/86xx counterparts. |
b9fd305d AB |
18 | The other embeeded parts, namely 4xx, 8xx, e200 (55xx) and e500 |
19 | (85xx) each form a family of their own that is not compatible | |
20 | with the others. | |
21 | ||
22 | If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx. | |
23 | ||
48c93112 | 24 | config PPC_BOOK3S_32 |
e177edcd | 25 | bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx" |
a0ae9c7c AB |
26 | select PPC_FPU |
27 | ||
a0ae9c7c AB |
28 | config PPC_85xx |
29 | bool "Freescale 85xx" | |
30 | select E500 | |
31 | select FSL_SOC | |
3a83156b | 32 | select MPC85xx |
a0ae9c7c | 33 | |
a0ae9c7c AB |
34 | config PPC_8xx |
35 | bool "Freescale 8xx" | |
36 | select FSL_SOC | |
37 | select 8xx | |
1088a209 | 38 | select PPC_LIB_RHEAP |
a0ae9c7c AB |
39 | |
40 | config 40x | |
41 | bool "AMCC 40x" | |
42 | select PPC_DCR_NATIVE | |
9dae8afd | 43 | select PPC_UDBG_16550 |
93173ce2 | 44 | select 4xx_SOC |
b500563b | 45 | select PPC_PCI_CHOICE |
a0ae9c7c AB |
46 | |
47 | config 44x | |
48 | bool "AMCC 44x" | |
49 | select PPC_DCR_NATIVE | |
1d5499b5 | 50 | select PPC_UDBG_16550 |
93173ce2 | 51 | select 4xx_SOC |
b500563b | 52 | select PPC_PCI_CHOICE |
4ee7084e | 53 | select PHYS_64BIT |
a0ae9c7c AB |
54 | |
55 | config E200 | |
56 | bool "Freescale e200" | |
57 | ||
58 | endchoice | |
59 | ||
2d27cfd3 BH |
60 | choice |
61 | prompt "Processor Type" | |
5b7c3c91 | 62 | depends on PPC64 |
2d27cfd3 BH |
63 | help |
64 | There are two families of 64 bit PowerPC chips supported. | |
65 | The most common ones are the desktop and server CPUs | |
66 | (POWER3, RS64, POWER4, POWER5, POWER5+, POWER6, ...) | |
67 | ||
68 | The other are the "embedded" processors compliant with the | |
69 | "Book 3E" variant of the architecture | |
70 | ||
71 | config PPC_BOOK3S_64 | |
72 | bool "Server processors" | |
5b7c3c91 BH |
73 | select PPC_FPU |
74 | ||
2d27cfd3 BH |
75 | config PPC_BOOK3E_64 |
76 | bool "Embedded processors" | |
77 | select PPC_FPU # Make it a choice ? | |
78 | ||
79 | endchoice | |
80 | ||
48c93112 BH |
81 | config PPC_BOOK3S |
82 | def_bool y | |
83 | depends on PPC_BOOK3S_32 || PPC_BOOK3S_64 | |
28794d34 | 84 | |
2d27cfd3 BH |
85 | config PPC_BOOK3E |
86 | def_bool y | |
87 | depends on PPC_BOOK3E_64 | |
88 | ||
a0ae9c7c AB |
89 | config POWER4_ONLY |
90 | bool "Optimize for POWER4" | |
28794d34 | 91 | depends on PPC64 && PPC_BOOK3S |
a0ae9c7c AB |
92 | default n |
93 | ---help--- | |
94 | Cause the compiler to optimize for POWER4/POWER5/PPC970 processors. | |
95 | The resulting binary will not work on POWER3 or RS64 processors | |
96 | when compiled with binutils 2.15 or later. | |
97 | ||
5b7c3c91 BH |
98 | config 6xx |
99 | def_bool y | |
100 | depends on PPC32 && PPC_BOOK3S | |
7325927e | 101 | select PPC_HAVE_PMU_SUPPORT |
5b7c3c91 | 102 | |
a0ae9c7c AB |
103 | config POWER3 |
104 | bool | |
28794d34 | 105 | depends on PPC64 && PPC_BOOK3S |
a0ae9c7c AB |
106 | default y if !POWER4_ONLY |
107 | ||
108 | config POWER4 | |
28794d34 | 109 | depends on PPC64 && PPC_BOOK3S |
a0ae9c7c AB |
110 | def_bool y |
111 | ||
3164cccd AB |
112 | config TUNE_CELL |
113 | bool "Optimize for Cell Broadband Engine" | |
28794d34 | 114 | depends on PPC64 && PPC_BOOK3S |
3164cccd AB |
115 | help |
116 | Cause the compiler to optimize for the PPE of the Cell Broadband | |
117 | Engine. This will make the code run considerably faster on Cell | |
118 | but somewhat slower on other machines. This option only changes | |
119 | the scheduling of instructions, not the selection of instructions | |
120 | itself, so the resulting kernel will keep running on all other | |
121 | machines. When building a kernel that is supposed to run only | |
122 | on Cell, you should also select the POWER4_ONLY option. | |
123 | ||
a0ae9c7c AB |
124 | # this is temp to handle compat with arch=ppc |
125 | config 8xx | |
126 | bool | |
127 | ||
a0ae9c7c | 128 | config E500 |
39aef685 | 129 | select FSL_EMB_PERFMON |
a0ae9c7c AB |
130 | bool |
131 | ||
3dfa8773 KG |
132 | config PPC_E500MC |
133 | bool "e500mc Support" | |
134 | select PPC_FPU | |
135 | depends on E500 | |
136 | ||
a0ae9c7c AB |
137 | config PPC_FPU |
138 | bool | |
139 | default y if PPC64 | |
140 | ||
141 | config 4xx | |
142 | bool | |
143 | depends on 40x || 44x | |
144 | default y | |
145 | ||
146 | config BOOKE | |
147 | bool | |
2d27cfd3 | 148 | depends on E200 || E500 || 44x || PPC_BOOK3E |
a0ae9c7c AB |
149 | default y |
150 | ||
151 | config FSL_BOOKE | |
152 | bool | |
153 | depends on E200 || E500 | |
154 | default y | |
155 | ||
39aef685 | 156 | config FSL_EMB_PERFMON |
ad562c71 AF |
157 | bool "Freescale Embedded Perfmon" |
158 | depends on E500 || PPC_83xx | |
159 | help | |
160 | This is the Performance Monitor support found on the e500 core | |
161 | and some e300 cores (c3 and c4). Select this only if your | |
162 | core supports the Embedded Performance Monitor APU | |
39aef685 | 163 | |
a0ae9c7c AB |
164 | config PTE_64BIT |
165 | bool | |
4ee7084e BB |
166 | depends on 44x || E500 || PPC_86xx |
167 | default y if PHYS_64BIT | |
a0ae9c7c AB |
168 | |
169 | config PHYS_64BIT | |
4ee7084e BB |
170 | bool 'Large physical address support' if E500 || PPC_86xx |
171 | depends on (44x || E500 || PPC_86xx) && !PPC_83xx && !PPC_82xx | |
a0ae9c7c AB |
172 | ---help--- |
173 | This option enables kernel support for larger than 32-bit physical | |
4ee7084e BB |
174 | addresses. This feature may not be available on all cores. |
175 | ||
176 | If you have more than 3.5GB of RAM or so, you also need to enable | |
177 | SWIOTLB under Kernel Options for this to work. The actual number | |
178 | is platform-dependent. | |
a0ae9c7c AB |
179 | |
180 | If in doubt, say N here. | |
181 | ||
182 | config ALTIVEC | |
183 | bool "AltiVec Support" | |
28794d34 | 184 | depends on 6xx || POWER4 |
a0ae9c7c AB |
185 | ---help--- |
186 | This option enables kernel support for the Altivec extensions to the | |
187 | PowerPC processor. The kernel currently supports saving and restoring | |
188 | altivec registers, and turning on the 'altivec enable' bit so user | |
189 | processes can execute altivec instructions. | |
190 | ||
191 | This option is only usefully if you have a processor that supports | |
192 | altivec (G4, otherwise known as 74xx series), but does not have | |
193 | any affect on a non-altivec cpu (it does, however add code to the | |
194 | kernel). | |
195 | ||
196 | If in doubt, say Y here. | |
197 | ||
96d5b52c MN |
198 | config VSX |
199 | bool "VSX Support" | |
200 | depends on POWER4 && ALTIVEC && PPC_FPU | |
201 | ---help--- | |
202 | ||
203 | This option enables kernel support for the Vector Scaler extensions | |
204 | to the PowerPC processor. The kernel currently supports saving and | |
205 | restoring VSX registers, and turning on the 'VSX enable' bit so user | |
206 | processes can execute VSX instructions. | |
207 | ||
208 | This option is only useful if you have a processor that supports | |
209 | VSX (P7 and above), but does not have any affect on a non-VSX | |
210 | CPUs (it does, however add code to the kernel). | |
211 | ||
212 | If in doubt, say Y here. | |
213 | ||
a0ae9c7c AB |
214 | config SPE |
215 | bool "SPE Support" | |
3dfa8773 | 216 | depends on E200 || (E500 && !PPC_E500MC) |
a0ae9c7c AB |
217 | default y |
218 | ---help--- | |
219 | This option enables kernel support for the Signal Processing | |
220 | Extensions (SPE) to the PowerPC processor. The kernel currently | |
221 | supports saving and restoring SPE registers, and turning on the | |
222 | 'spe enable' bit so user processes can execute SPE instructions. | |
223 | ||
224 | This option is only useful if you have a processor that supports | |
225 | SPE (e500, otherwise known as 85xx series), but does not have any | |
226 | effect on a non-spe cpu (it does, however add code to the kernel). | |
227 | ||
228 | If in doubt, say Y here. | |
229 | ||
230 | config PPC_STD_MMU | |
5b7c3c91 BH |
231 | def_bool y |
232 | depends on PPC_BOOK3S | |
a0ae9c7c AB |
233 | |
234 | config PPC_STD_MMU_32 | |
235 | def_bool y | |
236 | depends on PPC_STD_MMU && PPC32 | |
237 | ||
5e696617 BH |
238 | config PPC_STD_MMU_64 |
239 | def_bool y | |
240 | depends on PPC_STD_MMU && PPC64 | |
241 | ||
242 | config PPC_MMU_NOHASH | |
243 | def_bool y | |
244 | depends on !PPC_STD_MMU | |
245 | ||
2d27cfd3 BH |
246 | config PPC_MMU_NOHASH_32 |
247 | def_bool y | |
248 | depends on PPC_MMU_NOHASH && PPC32 | |
249 | ||
250 | config PPC_MMU_NOHASH_64 | |
251 | def_bool y | |
252 | depends on PPC_MMU_NOHASH && PPC64 | |
253 | ||
70fe3af8 KG |
254 | config PPC_BOOK3E_MMU |
255 | def_bool y | |
2d27cfd3 | 256 | depends on FSL_BOOKE || PPC_BOOK3E |
70fe3af8 | 257 | |
a0ae9c7c AB |
258 | config PPC_MM_SLICES |
259 | bool | |
ca9153a3 | 260 | default y if HUGETLB_PAGE || (PPC_STD_MMU_64 && PPC_64K_PAGES) |
a0ae9c7c AB |
261 | default n |
262 | ||
263 | config VIRT_CPU_ACCOUNTING | |
264 | bool "Deterministic task and CPU time accounting" | |
265 | depends on PPC64 | |
266 | default y | |
267 | help | |
268 | Select this option to enable more accurate task and CPU time | |
269 | accounting. This is done by reading a CPU counter on each | |
270 | kernel entry and exit and on transitions within the kernel | |
271 | between system, softirq and hardirq state, so there is a | |
272 | small performance impact. This also enables accounting of | |
273 | stolen time on logically-partitioned systems running on | |
274 | IBM POWER5-based machines. | |
275 | ||
276 | If in doubt, say Y here. | |
277 | ||
105988c0 PM |
278 | config PPC_HAVE_PMU_SUPPORT |
279 | bool | |
280 | ||
281 | config PPC_PERF_CTRS | |
282 | def_bool y | |
283 | depends on PERF_COUNTERS && PPC_HAVE_PMU_SUPPORT | |
284 | help | |
285 | This enables the powerpc-specific perf_counter back-end. | |
286 | ||
a0ae9c7c | 287 | config SMP |
2d27cfd3 | 288 | depends on PPC_BOOK3S || PPC_BOOK3E || FSL_BOOKE |
a0ae9c7c AB |
289 | bool "Symmetric multi-processing support" |
290 | ---help--- | |
291 | This enables support for systems with more than one CPU. If you have | |
292 | a system with only one CPU, say N. If you have a system with more | |
293 | than one CPU, say Y. Note that the kernel does not currently | |
294 | support SMP machines with 603/603e/603ev or PPC750 ("G3") processors | |
295 | since they have inadequate hardware support for multiprocessor | |
296 | operation. | |
297 | ||
298 | If you say N here, the kernel will run on single and multiprocessor | |
299 | machines, but will use only one CPU of a multiprocessor machine. If | |
300 | you say Y here, the kernel will run on single-processor machines. | |
301 | On a single-processor machine, the kernel will run faster if you say | |
302 | N here. | |
303 | ||
304 | If you don't know what to do here, say N. | |
305 | ||
306 | config NR_CPUS | |
2d8ae638 MN |
307 | int "Maximum number of CPUs (2-8192)" |
308 | range 2 8192 | |
a0ae9c7c AB |
309 | depends on SMP |
310 | default "32" if PPC64 | |
311 | default "4" | |
312 | ||
313 | config NOT_COHERENT_CACHE | |
314 | bool | |
e177edcd | 315 | depends on 4xx || 8xx || E200 || PPC_MPC512x |
a0ae9c7c AB |
316 | default y |
317 | ||
f8eb77d6 | 318 | config CHECK_CACHE_COHERENCY |
a0ae9c7c AB |
319 | bool |
320 | ||
321 | endmenu |