[net-next-2.6.git] / arch / powerpc / platforms / 85xx / corenet_ds.c

/*
 * Corenet based SoC DS Setup
 *
 * Maintained by Kumar Gala (see MAINTAINERS for contact information)
 *
 * Copyright 2009 Freescale Semiconductor Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */

#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/kdev_t.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/memblock.h>

#include <asm/system.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
#include <mm/mmu_decl.h>
#include <asm/prom.h>
#include <asm/udbg.h>
#include <asm/mpic.h>

#include <linux/of_platform.h>
#include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h>

void __init corenet_ds_pic_init(void)
{
	struct mpic *mpic;
	struct resource r;
	struct device_node *np = NULL;
	unsigned int flags = MPIC_PRIMARY | MPIC_BIG_ENDIAN |
				MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU;

	np = of_find_node_by_type(np, "open-pic");

	if (np == NULL) {
		printk(KERN_ERR "Could not find open-pic node\n");
		return;
	}

	if (of_address_to_resource(np, 0, &r)) {
		printk(KERN_ERR "Failed to map mpic register space\n");
		of_node_put(np);
		return;
	}

	if (ppc_md.get_irq == mpic_get_coreint_irq)
		flags |= MPIC_ENABLE_COREINT;

	mpic = mpic_alloc(np, r.start, flags, 0, 256, " OpenPIC  ");
	BUG_ON(mpic == NULL);

	mpic_init(mpic);
}

#ifdef CONFIG_PCI
static int primary_phb_addr;
#endif

/*
 * Setup the architecture
 */
#ifdef CONFIG_SMP
void __init mpc85xx_smp_init(void);
#endif

void __init corenet_ds_setup_arch(void)
{
#ifdef CONFIG_PCI
	struct device_node *np;
	struct pci_controller *hose;
#endif
	dma_addr_t max = 0xffffffff;

#ifdef CONFIG_SMP
	mpc85xx_smp_init();
#endif

#ifdef CONFIG_PCI
	for_each_compatible_node(np, "pci", "fsl,p4080-pcie") {
		struct resource rsrc;
		of_address_to_resource(np, 0, &rsrc);
		if ((rsrc.start & 0xfffff) == primary_phb_addr)
			fsl_add_bridge(np, 1);
		else
			fsl_add_bridge(np, 0);

		hose = pci_find_hose_for_OF_device(np);
		max = min(max, hose->dma_window_base_cur +
				hose->dma_window_size);
	}
#endif

#ifdef CONFIG_SWIOTLB
	if (memblock_end_of_DRAM() > max) {
		ppc_swiotlb_enable = 1;
		set_pci_dma_ops(&swiotlb_dma_ops);
		ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
	}
#endif
	pr_info("%s board from Freescale Semiconductor\n", ppc_md.name);
}

static const struct of_device_id of_device_ids[] __devinitconst = {
	{
		.compatible	= "simple-bus"
	},
	{
		.compatible	= "fsl,rapidio-delta",
	},
	{}
};

int __init corenet_ds_publish_devices(void)
{
	return of_platform_bus_probe(NULL, of_device_ids, NULL);
}
Commit	Line	Data
ab2f4892 KG	1	/*
	2	* Corenet based SoC DS Setup
	3	*
	4	* Maintained by Kumar Gala (see MAINTAINERS for contact information)
	5	*
	6	* Copyright 2009 Freescale Semiconductor Inc.
	7	*
	8	* This program is free software; you can redistribute it and/or modify it
	9	* under the terms of the GNU General Public License as published by the
	10	* Free Software Foundation; either version 2 of the License, or (at your
	11	* option) any later version.
	12	*/
	13
	14	#include <linux/kernel.h>
	15	#include <linux/pci.h>
	16	#include <linux/kdev_t.h>
	17	#include <linux/delay.h>
	18	#include <linux/interrupt.h>
95f72d1e	19	#include <linux/memblock.h>
ab2f4892 KG	20
	21	#include <asm/system.h>
	22	#include <asm/time.h>
	23	#include <asm/machdep.h>
	24	#include <asm/pci-bridge.h>
	25	#include <mm/mmu_decl.h>
	26	#include <asm/prom.h>
	27	#include <asm/udbg.h>
	28	#include <asm/mpic.h>
	29
	30	#include <linux/of_platform.h>
	31	#include <sysdev/fsl_soc.h>
	32	#include <sysdev/fsl_pci.h>
	33
	34	void __init corenet_ds_pic_init(void)
	35	{
	36	struct mpic *mpic;
	37	struct resource r;
	38	struct device_node *np = NULL;
	39	unsigned int flags = MPIC_PRIMARY \| MPIC_BIG_ENDIAN \|
	40	MPIC_BROKEN_FRR_NIRQS \| MPIC_SINGLE_DEST_CPU;
	41
	42	np = of_find_node_by_type(np, "open-pic");
	43
	44	if (np == NULL) {
	45	printk(KERN_ERR "Could not find open-pic node\n");
	46	return;
	47	}
	48
	49	if (of_address_to_resource(np, 0, &r)) {
	50	printk(KERN_ERR "Failed to map mpic register space\n");
	51	of_node_put(np);
	52	return;
	53	}
	54
	55	if (ppc_md.get_irq == mpic_get_coreint_irq)
	56	flags \|= MPIC_ENABLE_COREINT;
	57
	58	mpic = mpic_alloc(np, r.start, flags, 0, 256, " OpenPIC ");
	59	BUG_ON(mpic == NULL);
	60
	61	mpic_init(mpic);
	62	}
	63
	64	#ifdef CONFIG_PCI
	65	static int primary_phb_addr;
	66	#endif
	67
	68	/*
	69	* Setup the architecture
	70	*/
	71	#ifdef CONFIG_SMP
	72	void __init mpc85xx_smp_init(void);
	73	#endif
	74
	75	void __init corenet_ds_setup_arch(void)
	76	{
	77	#ifdef CONFIG_PCI
	78	struct device_node *np;
	79	struct pci_controller *hose;
	80	#endif
	81	dma_addr_t max = 0xffffffff;
	82
	83	#ifdef CONFIG_SMP
84	mpc85xx_smp_init();
85	#endif
86
87	#ifdef CONFIG_PCI
88	for_each_compatible_node(np, "pci", "fsl,p4080-pcie") {
89	struct resource rsrc;
90	of_address_to_resource(np, 0, &rsrc);
91	if ((rsrc.start & 0xfffff) == primary_phb_addr)
92	fsl_add_bridge(np, 1);
93	else
94	fsl_add_bridge(np, 0);
95
96	hose = pci_find_hose_for_OF_device(np);
97	max = min(max, hose->dma_window_base_cur +
98	hose->dma_window_size);
99	}
100	#endif
101
102	#ifdef CONFIG_SWIOTLB
95f72d1e	103	if (memblock_end_of_DRAM() > max) {
ab2f4892 KG	104	ppc_swiotlb_enable = 1;
	105	set_pci_dma_ops(&swiotlb_dma_ops);
	106	ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
	107	}
	108	#endif
	109	pr_info("%s board from Freescale Semiconductor\n", ppc_md.name);
	110	}
	111
	112	static const struct of_device_id of_device_ids[] __devinitconst = {
	113	{
	114	.compatible = "simple-bus"
	115	},
	116	{
	117	.compatible = "fsl,rapidio-delta",
	118	},
	119	{}
	120	};
	121
	122	int __init corenet_ds_publish_devices(void)
	123	{
	124	return of_platform_bus_probe(NULL, of_device_ids, NULL);
	125	}