[net-next-2.6.git] / arch / powerpc / mm / fsl_booke_mmu.c

/*
 * Modifications by Kumar Gala (galak@kernel.crashing.org) to support
 * E500 Book E processors.
 *
 * Copyright 2004,2010 Freescale Semiconductor, Inc.
 *
 * This file contains the routines for initializing the MMU
 * on the 4xx series of chips.
 *  -- paulus
 *
 *  Derived from arch/ppc/mm/init.c:
 *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
 *
 *  Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
 *  and Cort Dougan (PReP) (cort@cs.nmt.edu)
 *    Copyright (C) 1996 Paul Mackerras
 *
 *  Derived from "arch/i386/mm/init.c"
 *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds
 *
 *  This program is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU General Public License
 *  as published by the Free Software Foundation; either version
 *  2 of the License, or (at your option) any later version.
 *
 */

#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/types.h>
#include <linux/ptrace.h>
#include <linux/mman.h>
#include <linux/mm.h>
#include <linux/swap.h>
#include <linux/stddef.h>
#include <linux/vmalloc.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/highmem.h>
#include <linux/memblock.h>

#include <asm/pgalloc.h>
#include <asm/prom.h>
#include <asm/io.h>
#include <asm/mmu_context.h>
#include <asm/pgtable.h>
#include <asm/mmu.h>
#include <asm/uaccess.h>
#include <asm/smp.h>
#include <asm/machdep.h>
#include <asm/setup.h>

#include "mmu_decl.h"

unsigned int tlbcam_index;


#if defined(CONFIG_LOWMEM_CAM_NUM_BOOL) && (CONFIG_LOWMEM_CAM_NUM >= NUM_TLBCAMS)
#error "LOWMEM_CAM_NUM must be less than NUM_TLBCAMS"
#endif

#define NUM_TLBCAMS	(64)
struct tlbcam TLBCAM[NUM_TLBCAMS];

struct tlbcamrange {
	unsigned long start;
	unsigned long limit;
	phys_addr_t phys;
} tlbcam_addrs[NUM_TLBCAMS];

extern unsigned int tlbcam_index;

unsigned long tlbcam_sz(int idx)
{
	return tlbcam_addrs[idx].limit - tlbcam_addrs[idx].start + 1;
}

/*
 * Return PA for this VA if it is mapped by a CAM, or 0
 */
phys_addr_t v_mapped_by_tlbcam(unsigned long va)
{
	int b;
	for (b = 0; b < tlbcam_index; ++b)
		if (va >= tlbcam_addrs[b].start && va < tlbcam_addrs[b].limit)
			return tlbcam_addrs[b].phys + (va - tlbcam_addrs[b].start);
	return 0;
}

/*
 * Return VA for a given PA or 0 if not mapped
 */
unsigned long p_mapped_by_tlbcam(phys_addr_t pa)
{
	int b;
	for (b = 0; b < tlbcam_index; ++b)
		if (pa >= tlbcam_addrs[b].phys
			&& pa < (tlbcam_addrs[b].limit-tlbcam_addrs[b].start)
		              +tlbcam_addrs[b].phys)
			return tlbcam_addrs[b].start+(pa-tlbcam_addrs[b].phys);
	return 0;
}

/*
 * Set up a variable-size TLB entry (tlbcam). The parameters are not checked;
 * in particular size must be a power of 4 between 4k and 256M (or 1G, for cpus
 * that support extended page sizes).  Note that while some cpus support a
 * page size of 4G, we don't allow its use here.
 */
static void settlbcam(int index, unsigned long virt, phys_addr_t phys,
		unsigned long size, unsigned long flags, unsigned int pid)
{
	unsigned int tsize, lz;

	asm (PPC_CNTLZL "%0,%1" : "=r" (lz) : "r" (size));
	tsize = 21 - lz;

#ifdef CONFIG_SMP
	if ((flags & _PAGE_NO_CACHE) == 0)
		flags |= _PAGE_COHERENT;
#endif

	TLBCAM[index].MAS0 = MAS0_TLBSEL(1) | MAS0_ESEL(index) | MAS0_NV(index+1);
	TLBCAM[index].MAS1 = MAS1_VALID | MAS1_IPROT | MAS1_TSIZE(tsize) | MAS1_TID(pid);
	TLBCAM[index].MAS2 = virt & PAGE_MASK;

	TLBCAM[index].MAS2 |= (flags & _PAGE_WRITETHRU) ? MAS2_W : 0;
	TLBCAM[index].MAS2 |= (flags & _PAGE_NO_CACHE) ? MAS2_I : 0;
	TLBCAM[index].MAS2 |= (flags & _PAGE_COHERENT) ? MAS2_M : 0;
	TLBCAM[index].MAS2 |= (flags & _PAGE_GUARDED) ? MAS2_G : 0;
	TLBCAM[index].MAS2 |= (flags & _PAGE_ENDIAN) ? MAS2_E : 0;

	TLBCAM[index].MAS3 = (phys & MAS3_RPN) | MAS3_SX | MAS3_SR;
	TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_SW : 0);
	if (mmu_has_feature(MMU_FTR_BIG_PHYS))
		TLBCAM[index].MAS7 = (u64)phys >> 32;

	if (flags & _PAGE_USER) {
	   TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR;
	   TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0);
	}

	tlbcam_addrs[index].start = virt;
	tlbcam_addrs[index].limit = virt + size - 1;
	tlbcam_addrs[index].phys = phys;

	loadcam_entry(index);
}

unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx)
{
	int i;
	unsigned long virt = PAGE_OFFSET;
	phys_addr_t phys = memstart_addr;
	unsigned long amount_mapped = 0;
	unsigned long max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xf;

	/* Convert (4^max) kB to (2^max) bytes */
	max_cam = max_cam * 2 + 10;

	/* Calculate CAM values */
	for (i = 0; ram && i < max_cam_idx; i++) {
		unsigned int camsize = __ilog2(ram) & ~1U;
		unsigned int align = __ffs(virt | phys) & ~1U;
		unsigned long cam_sz;

		if (camsize > align)
			camsize = align;
		if (camsize > max_cam)
			camsize = max_cam;

		cam_sz = 1UL << camsize;
		settlbcam(i, virt, phys, cam_sz, PAGE_KERNEL_X, 0);

		ram -= cam_sz;
		amount_mapped += cam_sz;
		virt += cam_sz;
		phys += cam_sz;
	}
	tlbcam_index = i;

	return amount_mapped;
}

unsigned long __init mmu_mapin_ram(unsigned long top)
{
	return tlbcam_addrs[tlbcam_index - 1].limit - PAGE_OFFSET + 1;
}

/*
 * MMU_init_hw does the chip-specific initialization of the MMU hardware.
 */
void __init MMU_init_hw(void)
{
	flush_instruction_cache();
}

void __init adjust_total_lowmem(void)
{
	unsigned long ram;
	int i;

	/* adjust lowmem size to __max_low_memory */
	ram = min((phys_addr_t)__max_low_memory, (phys_addr_t)total_lowmem);

	__max_low_memory = map_mem_in_cams(ram, CONFIG_LOWMEM_CAM_NUM);

	pr_info("Memory CAM mapping: ");
	for (i = 0; i < tlbcam_index - 1; i++)
		pr_cont("%lu/", tlbcam_sz(i) >> 20);
	pr_cont("%lu Mb, residual: %dMb\n", tlbcam_sz(tlbcam_index - 1) >> 20,
	        (unsigned int)((total_lowmem - __max_low_memory) >> 20));

	memblock_set_current_limit(memstart_addr + __max_low_memory);
}

void setup_initial_memory_limit(phys_addr_t first_memblock_base,
				phys_addr_t first_memblock_size)
{
	phys_addr_t limit = first_memblock_base + first_memblock_size;

	/* 64M mapped initially according to head_fsl_booke.S */
	memblock_set_current_limit(min_t(u64, limit, 0x04000000));
}
Commit	Line	Data
14cf11af	1	/*
4c8d3d99	2	* Modifications by Kumar Gala (galak@kernel.crashing.org) to support
14cf11af PM	3	* E500 Book E processors.
14cf11af PM	4	*
78f62237	5	* Copyright 2004,2010 Freescale Semiconductor, Inc.
14cf11af PM	6	*
	7	* This file contains the routines for initializing the MMU
	8	* on the 4xx series of chips.
	9	* -- paulus
	10	*
	11	* Derived from arch/ppc/mm/init.c:
	12	* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
	13	*
	14	* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
	15	* and Cort Dougan (PReP) (cort@cs.nmt.edu)
	16	* Copyright (C) 1996 Paul Mackerras
14cf11af PM	17	*
	18	* Derived from "arch/i386/mm/init.c"
	19	* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
	20	*
	21	* This program is free software; you can redistribute it and/or
	22	* modify it under the terms of the GNU General Public License
	23	* as published by the Free Software Foundation; either version
	24	* 2 of the License, or (at your option) any later version.
	25	*
	26	*/
	27
14cf11af PM	28	#include <linux/signal.h>
	29	#include <linux/sched.h>
	30	#include <linux/kernel.h>
	31	#include <linux/errno.h>
	32	#include <linux/string.h>
	33	#include <linux/types.h>
	34	#include <linux/ptrace.h>
	35	#include <linux/mman.h>
	36	#include <linux/mm.h>
	37	#include <linux/swap.h>
	38	#include <linux/stddef.h>
	39	#include <linux/vmalloc.h>
	40	#include <linux/init.h>
	41	#include <linux/delay.h>
	42	#include <linux/highmem.h>
e63075a3	43	#include <linux/memblock.h>
14cf11af PM	44
	45	#include <asm/pgalloc.h>
	46	#include <asm/prom.h>
	47	#include <asm/io.h>
	48	#include <asm/mmu_context.h>
	49	#include <asm/pgtable.h>
	50	#include <asm/mmu.h>
	51	#include <asm/uaccess.h>
	52	#include <asm/smp.h>
14cf11af PM	53	#include <asm/machdep.h>
	54	#include <asm/setup.h>
	55
99c62dd7 KG	56	#include "mmu_decl.h"
99c62dd7 KG	57
14cf11af	58	unsigned int tlbcam_index;
14cf11af	59
14cf11af	60
96051465 TP	61	#if defined(CONFIG_LOWMEM_CAM_NUM_BOOL) && (CONFIG_LOWMEM_CAM_NUM >= NUM_TLBCAMS)
	62	#error "LOWMEM_CAM_NUM must be less than NUM_TLBCAMS"
	63	#endif
	64
78f62237 KG	65	#define NUM_TLBCAMS (64)
78f62237 KG	66	struct tlbcam TLBCAM[NUM_TLBCAMS];
14cf11af PM	67
14cf11af PM	68	struct tlbcamrange {
8b27f0b6	69	unsigned long start;
14cf11af PM	70	unsigned long limit;
	71	phys_addr_t phys;
	72	} tlbcam_addrs[NUM_TLBCAMS];
	73
	74	extern unsigned int tlbcam_index;
	75
8b27f0b6 KG	76	unsigned long tlbcam_sz(int idx)
	77	{
	78	return tlbcam_addrs[idx].limit - tlbcam_addrs[idx].start + 1;
	79	}
	80
14cf11af PM	81	/*
	82	* Return PA for this VA if it is mapped by a CAM, or 0
	83	*/
6c24b174	84	phys_addr_t v_mapped_by_tlbcam(unsigned long va)
14cf11af PM	85	{
	86	int b;
	87	for (b = 0; b < tlbcam_index; ++b)
	88	if (va >= tlbcam_addrs[b].start && va < tlbcam_addrs[b].limit)
	89	return tlbcam_addrs[b].phys + (va - tlbcam_addrs[b].start);
	90	return 0;
	91	}
	92
	93	/*
	94	* Return VA for a given PA or 0 if not mapped
	95	*/
6c24b174	96	unsigned long p_mapped_by_tlbcam(phys_addr_t pa)
14cf11af PM	97	{
	98	int b;
	99	for (b = 0; b < tlbcam_index; ++b)
	100	if (pa >= tlbcam_addrs[b].phys
8b27f0b6	101	&& pa < (tlbcam_addrs[b].limit-tlbcam_addrs[b].start)
14cf11af PM	102	+tlbcam_addrs[b].phys)
	103	return tlbcam_addrs[b].start+(pa-tlbcam_addrs[b].phys);
	104	return 0;
	105	}
	106
	107	/*
d10ac373 BB	108	* Set up a variable-size TLB entry (tlbcam). The parameters are not checked;
	109	* in particular size must be a power of 4 between 4k and 256M (or 1G, for cpus
	110	* that support extended page sizes). Note that while some cpus support a
	111	* page size of 4G, we don't allow its use here.
14cf11af	112	*/
8b27f0b6 KG	113	static void settlbcam(int index, unsigned long virt, phys_addr_t phys,
8b27f0b6 KG	114	unsigned long size, unsigned long flags, unsigned int pid)
14cf11af PM	115	{
	116	unsigned int tsize, lz;
	117
8b27f0b6	118	asm (PPC_CNTLZL "%0,%1" : "=r" (lz) : "r" (size));
d66c82ea	119	tsize = 21 - lz;
14cf11af PM	120
	121	#ifdef CONFIG_SMP
	122	if ((flags & _PAGE_NO_CACHE) == 0)
	123	flags \|= _PAGE_COHERENT;
	124	#endif
	125
	126	TLBCAM[index].MAS0 = MAS0_TLBSEL(1) \| MAS0_ESEL(index) \| MAS0_NV(index+1);
	127	TLBCAM[index].MAS1 = MAS1_VALID \| MAS1_IPROT \| MAS1_TSIZE(tsize) \| MAS1_TID(pid);
	128	TLBCAM[index].MAS2 = virt & PAGE_MASK;
	129
	130	TLBCAM[index].MAS2 \|= (flags & _PAGE_WRITETHRU) ? MAS2_W : 0;
	131	TLBCAM[index].MAS2 \|= (flags & _PAGE_NO_CACHE) ? MAS2_I : 0;
	132	TLBCAM[index].MAS2 \|= (flags & _PAGE_COHERENT) ? MAS2_M : 0;
	133	TLBCAM[index].MAS2 \|= (flags & _PAGE_GUARDED) ? MAS2_G : 0;
	134	TLBCAM[index].MAS2 \|= (flags & _PAGE_ENDIAN) ? MAS2_E : 0;
	135
8b27f0b6	136	TLBCAM[index].MAS3 = (phys & MAS3_RPN) \| MAS3_SX \| MAS3_SR;
14cf11af	137	TLBCAM[index].MAS3 \|= ((flags & _PAGE_RW) ? MAS3_SW : 0);
e8137341	138	if (mmu_has_feature(MMU_FTR_BIG_PHYS))
8b27f0b6	139	TLBCAM[index].MAS7 = (u64)phys >> 32;
14cf11af	140
14cf11af PM	141	if (flags & _PAGE_USER) {
	142	TLBCAM[index].MAS3 \|= MAS3_UX \| MAS3_UR;
	143	TLBCAM[index].MAS3 \|= ((flags & _PAGE_RW) ? MAS3_UW : 0);
	144	}
14cf11af PM	145
	146	tlbcam_addrs[index].start = virt;
	147	tlbcam_addrs[index].limit = virt + size - 1;
	148	tlbcam_addrs[index].phys = phys;
	149
	150	loadcam_entry(index);
	151	}
	152
8b27f0b6	153	unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx)
14cf11af	154	{
8b27f0b6	155	int i;
f88747e7 TP	156	unsigned long virt = PAGE_OFFSET;
f88747e7 TP	157	phys_addr_t phys = memstart_addr;
8b27f0b6 KG	158	unsigned long amount_mapped = 0;
	159	unsigned long max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xf;
	160
	161	/* Convert (4^max) kB to (2^max) bytes */
	162	max_cam = max_cam * 2 + 10;
f88747e7	163
8b27f0b6 KG	164	/* Calculate CAM values */
	165	for (i = 0; ram && i < max_cam_idx; i++) {
	166	unsigned int camsize = __ilog2(ram) & ~1U;
	167	unsigned int align = __ffs(virt \| phys) & ~1U;
	168	unsigned long cam_sz;
	169
	170	if (camsize > align)
	171	camsize = align;
	172	if (camsize > max_cam)
	173	camsize = max_cam;
	174
	175	cam_sz = 1UL << camsize;
	176	settlbcam(i, virt, phys, cam_sz, PAGE_KERNEL_X, 0);
	177
	178	ram -= cam_sz;
	179	amount_mapped += cam_sz;
	180	virt += cam_sz;
	181	phys += cam_sz;
14cf11af	182	}
8b27f0b6 KG	183	tlbcam_index = i;
	184
	185	return amount_mapped;
	186	}
f88747e7	187
a73611b6	188	unsigned long __init mmu_mapin_ram(unsigned long top)
8b27f0b6 KG	189	{
8b27f0b6 KG	190	return tlbcam_addrs[tlbcam_index - 1].limit - PAGE_OFFSET + 1;
14cf11af PM	191	}
	192
	193	/*
	194	* MMU_init_hw does the chip-specific initialization of the MMU hardware.
	195	*/
	196	void __init MMU_init_hw(void)
	197	{
	198	flush_instruction_cache();
	199	}
	200
8b27f0b6	201	void __init adjust_total_lowmem(void)
14cf11af	202	{
8b27f0b6	203	unsigned long ram;
f88747e7	204	int i;
14cf11af	205
f88747e7 TP	206	/* adjust lowmem size to __max_low_memory */
f88747e7 TP	207	ram = min((phys_addr_t)__max_low_memory, (phys_addr_t)total_lowmem);
14cf11af	208
8b27f0b6	209	__max_low_memory = map_mem_in_cams(ram, CONFIG_LOWMEM_CAM_NUM);
c8f3570b	210
8b27f0b6 KG	211	pr_info("Memory CAM mapping: ");
	212	for (i = 0; i < tlbcam_index - 1; i++)
	213	pr_cont("%lu/", tlbcam_sz(i) >> 20);
	214	pr_cont("%lu Mb, residual: %dMb\n", tlbcam_sz(tlbcam_index - 1) >> 20,
96a8bac5	215	(unsigned int)((total_lowmem - __max_low_memory) >> 20));
8b27f0b6	216
e63075a3	217	memblock_set_current_limit(memstart_addr + __max_low_memory);
14cf11af	218	}
cd3db0c4 BH	219
	220	void setup_initial_memory_limit(phys_addr_t first_memblock_base,
	221	phys_addr_t first_memblock_size)
	222	{
	223	phys_addr_t limit = first_memblock_base + first_memblock_size;
	224
	225	/* 64M mapped initially according to head_fsl_booke.S */
	226	memblock_set_current_limit(min_t(u64, limit, 0x04000000));
	227	}