]> bbs.cooldavid.org Git - net-next-2.6.git/blame - arch/powerpc/kernel/setup_32.c
[POWERPC] Open Firmware serial port driver
[net-next-2.6.git] / arch / powerpc / kernel / setup_32.c
CommitLineData
9b6b563c
PM
1/*
2 * Common prep/pmac/chrp boot and setup code.
3 */
4
9b6b563c
PM
5#include <linux/module.h>
6#include <linux/string.h>
7#include <linux/sched.h>
8#include <linux/init.h>
9#include <linux/kernel.h>
10#include <linux/reboot.h>
11#include <linux/delay.h>
12#include <linux/initrd.h>
13#include <linux/ide.h>
14#include <linux/tty.h>
15#include <linux/bootmem.h>
16#include <linux/seq_file.h>
17#include <linux/root_dev.h>
18#include <linux/cpu.h>
19#include <linux/console.h>
20
21#include <asm/residual.h>
22#include <asm/io.h>
23#include <asm/prom.h>
24#include <asm/processor.h>
25#include <asm/pgtable.h>
9b6b563c
PM
26#include <asm/setup.h>
27#include <asm/amigappc.h>
28#include <asm/smp.h>
29#include <asm/elf.h>
30#include <asm/cputable.h>
31#include <asm/bootx.h>
32#include <asm/btext.h>
33#include <asm/machdep.h>
34#include <asm/uaccess.h>
35#include <asm/system.h>
36#include <asm/pmac_feature.h>
37#include <asm/sections.h>
38#include <asm/nvram.h>
39#include <asm/xmon.h>
6d7f58b0 40#include <asm/time.h>
463ce0e1 41#include <asm/serial.h>
51d3082f 42#include <asm/udbg.h>
9b6b563c 43
66ba135c
SR
44#include "setup.h"
45
03501dab
PM
46#define DBG(fmt...)
47
9b6b563c
PM
48#if defined CONFIG_KGDB
49#include <asm/kgdb.h>
50#endif
51
9b6b563c
PM
52extern void bootx_init(unsigned long r4, unsigned long phys);
53
9b6b563c
PM
54struct ide_machdep_calls ppc_ide_md;
55
80579e1f
PM
56int boot_cpuid;
57EXPORT_SYMBOL_GPL(boot_cpuid);
58int boot_cpuid_phys;
59
9b6b563c
PM
60unsigned long ISA_DMA_THRESHOLD;
61unsigned int DMA_MODE_READ;
62unsigned int DMA_MODE_WRITE;
63
e574d238
PM
64int have_of = 1;
65
9b6b563c
PM
66#ifdef CONFIG_VGA_CONSOLE
67unsigned long vgacon_remap_base;
d003e7a1 68EXPORT_SYMBOL(vgacon_remap_base);
9b6b563c
PM
69#endif
70
9b6b563c
PM
71/*
72 * These are used in binfmt_elf.c to put aux entries on the stack
73 * for each elf executable being started.
74 */
75int dcache_bsize;
76int icache_bsize;
77int ucache_bsize;
78
9b6b563c
PM
79/*
80 * We're called here very early in the boot. We determine the machine
81 * type and call the appropriate low-level setup functions.
82 * -- Cort <cort@fsmlabs.com>
83 *
84 * Note that the kernel may be running at an address which is different
85 * from the address that it was linked at, so we must use RELOC/PTRRELOC
86 * to access static data (including strings). -- paulus
87 */
88unsigned long __init early_init(unsigned long dt_ptr)
89{
90 unsigned long offset = reloc_offset();
42c4aaad 91 struct cpu_spec *spec;
9b6b563c 92
dd184343
PM
93 /* First zero the BSS -- use memset_io, some platforms don't have
94 * caches on yet */
af308377 95 memset_io((void __iomem *)PTRRELOC(&__bss_start), 0, _end - __bss_start);
dd184343 96
9b6b563c
PM
97 /*
98 * Identify the CPU type and fix up code sections
99 * that depend on which cpu we have.
100 */
974a76f5 101 spec = identify_cpu(offset, mfspr(SPRN_PVR));
42c4aaad 102
0909c8c2 103 do_feature_fixups(spec->cpu_features,
42c4aaad
BH
104 PTRRELOC(&__start___ftr_fixup),
105 PTRRELOC(&__stop___ftr_fixup));
9b6b563c 106
9b6b563c
PM
107 return KERNELBASE + offset;
108}
109
9b6b563c 110
9b6b563c
PM
111/*
112 * Find out what kind of machine we're on and save any data we need
113 * from the early boot process (devtree is copied on pmac by prom_init()).
114 * This is called very early on the boot process, after a minimal
115 * MMU environment has been set up but before MMU_init is called.
116 */
117void __init machine_init(unsigned long dt_ptr, unsigned long phys)
118{
51d3082f
BH
119 /* If btext is enabled, we might have a BAT setup for early display,
120 * thus we do enable some very basic udbg output
121 */
122#ifdef CONFIG_BOOTX_TEXT
123 udbg_putc = btext_drawchar;
124#endif
125
126 /* Do some early initialization based on the flat device tree */
9b6b563c
PM
127 early_init_devtree(__va(dt_ptr));
128
e8222502 129 probe_machine();
35499c01 130
9b6b563c 131#ifdef CONFIG_6xx
a0652fc9
PM
132 if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
133 cpu_has_feature(CPU_FTR_CAN_NAP))
134 ppc_md.power_save = ppc6xx_idle;
9b6b563c 135#endif
9b6b563c
PM
136
137 if (ppc_md.progress)
138 ppc_md.progress("id mach(): done", 0x200);
139}
140
141#ifdef CONFIG_BOOKE_WDT
142/* Checks wdt=x and wdt_period=xx command-line option */
143int __init early_parse_wdt(char *p)
144{
145 if (p && strncmp(p, "0", 1) != 0)
146 booke_wdt_enabled = 1;
147
148 return 0;
149}
150early_param("wdt", early_parse_wdt);
151
152int __init early_parse_wdt_period (char *p)
153{
154 if (p)
155 booke_wdt_period = simple_strtoul(p, NULL, 0);
156
157 return 0;
158}
159early_param("wdt_period", early_parse_wdt_period);
160#endif /* CONFIG_BOOKE_WDT */
161
162/* Checks "l2cr=xxxx" command-line option */
163int __init ppc_setup_l2cr(char *str)
164{
165 if (cpu_has_feature(CPU_FTR_L2CR)) {
166 unsigned long val = simple_strtoul(str, NULL, 0);
167 printk(KERN_INFO "l2cr set to %lx\n", val);
168 _set_L2CR(0); /* force invalidate by disable cache */
169 _set_L2CR(val); /* and enable it */
170 }
171 return 1;
172}
173__setup("l2cr=", ppc_setup_l2cr);
174
175#ifdef CONFIG_GENERIC_NVRAM
176
177/* Generic nvram hooks used by drivers/char/gen_nvram.c */
178unsigned char nvram_read_byte(int addr)
179{
180 if (ppc_md.nvram_read_val)
181 return ppc_md.nvram_read_val(addr);
182 return 0xff;
183}
184EXPORT_SYMBOL(nvram_read_byte);
185
186void nvram_write_byte(unsigned char val, int addr)
187{
188 if (ppc_md.nvram_write_val)
189 ppc_md.nvram_write_val(addr, val);
190}
191EXPORT_SYMBOL(nvram_write_byte);
192
193void nvram_sync(void)
194{
195 if (ppc_md.nvram_sync)
196 ppc_md.nvram_sync();
197}
198EXPORT_SYMBOL(nvram_sync);
199
200#endif /* CONFIG_NVRAM */
201
202static struct cpu cpu_devices[NR_CPUS];
203
204int __init ppc_init(void)
205{
206 int i;
207
208 /* clear the progress line */
209 if ( ppc_md.progress ) ppc_md.progress(" ", 0xffff);
210
211 /* register CPU devices */
0e551954 212 for_each_possible_cpu(i)
76b67ed9 213 register_cpu(&cpu_devices[i], i);
9b6b563c
PM
214
215 /* call platform init */
216 if (ppc_md.init != NULL) {
217 ppc_md.init();
218 }
219 return 0;
220}
221
222arch_initcall(ppc_init);
223
224/* Warning, IO base is not yet inited */
225void __init setup_arch(char **cmdline_p)
226{
846f77b0
ME
227 *cmdline_p = cmd_line;
228
9b6b563c
PM
229 /* so udelay does something sensible, assume <= 1000 bogomips */
230 loops_per_jiffy = 500000000 / HZ;
231
9b6b563c 232 unflatten_device_tree();
a82765b6 233 check_for_initrd();
463ce0e1
BH
234
235 if (ppc_md.init_early)
236 ppc_md.init_early();
237
463ce0e1 238 find_legacy_serial_ports();
9b6b563c 239
5ad57078
PM
240 smp_setup_cpu_maps();
241
51d3082f
BH
242 /* Register early console */
243 register_early_udbg_console();
9b6b563c 244
47679283
ME
245 xmon_setup();
246
9b6b563c
PM
247#if defined(CONFIG_KGDB)
248 if (ppc_md.kgdb_map_scc)
249 ppc_md.kgdb_map_scc();
250 set_debug_traps();
251 if (strstr(cmd_line, "gdb")) {
252 if (ppc_md.progress)
253 ppc_md.progress("setup_arch: kgdb breakpoint", 0x4000);
254 printk("kgdb breakpoint activated\n");
255 breakpoint();
256 }
257#endif
258
259 /*
260 * Set cache line size based on type of cpu as a default.
261 * Systems with OF can look in the properties on the cpu node(s)
262 * for a possibly more accurate value.
263 */
264 if (cpu_has_feature(CPU_FTR_SPLIT_ID_CACHE)) {
265 dcache_bsize = cur_cpu_spec->dcache_bsize;
266 icache_bsize = cur_cpu_spec->icache_bsize;
267 ucache_bsize = 0;
268 } else
269 ucache_bsize = dcache_bsize = icache_bsize
270 = cur_cpu_spec->dcache_bsize;
271
272 /* reboot on panic */
273 panic_timeout = 180;
274
7e990266
KG
275 if (ppc_md.panic)
276 setup_panic();
277
9b6b563c
PM
278 init_mm.start_code = PAGE_OFFSET;
279 init_mm.end_code = (unsigned long) _etext;
280 init_mm.end_data = (unsigned long) _edata;
49b09853 281 init_mm.brk = klimit;
9b6b563c 282
9b6b563c
PM
283 /* set up the bootmem stuff with available memory */
284 do_init_bootmem();
285 if ( ppc_md.progress ) ppc_md.progress("setup_arch: bootmem", 0x3eab);
286
9b6b563c
PM
287#ifdef CONFIG_DUMMY_CONSOLE
288 conswitchp = &dummy_con;
289#endif
290
291 ppc_md.setup_arch();
292 if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab);
293
294 paging_init();
9b6b563c 295}