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Commit | Line | Data |
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9b6b563c PM |
1 | /* |
2 | * Common prep/pmac/chrp boot and setup code. | |
3 | */ | |
4 | ||
5 | #include <linux/config.h> | |
6 | #include <linux/module.h> | |
7 | #include <linux/string.h> | |
8 | #include <linux/sched.h> | |
9 | #include <linux/init.h> | |
10 | #include <linux/kernel.h> | |
11 | #include <linux/reboot.h> | |
12 | #include <linux/delay.h> | |
13 | #include <linux/initrd.h> | |
14 | #include <linux/ide.h> | |
15 | #include <linux/tty.h> | |
16 | #include <linux/bootmem.h> | |
17 | #include <linux/seq_file.h> | |
18 | #include <linux/root_dev.h> | |
19 | #include <linux/cpu.h> | |
20 | #include <linux/console.h> | |
21 | ||
22 | #include <asm/residual.h> | |
23 | #include <asm/io.h> | |
24 | #include <asm/prom.h> | |
25 | #include <asm/processor.h> | |
26 | #include <asm/pgtable.h> | |
9b6b563c PM |
27 | #include <asm/setup.h> |
28 | #include <asm/amigappc.h> | |
29 | #include <asm/smp.h> | |
30 | #include <asm/elf.h> | |
31 | #include <asm/cputable.h> | |
32 | #include <asm/bootx.h> | |
33 | #include <asm/btext.h> | |
34 | #include <asm/machdep.h> | |
35 | #include <asm/uaccess.h> | |
36 | #include <asm/system.h> | |
37 | #include <asm/pmac_feature.h> | |
38 | #include <asm/sections.h> | |
39 | #include <asm/nvram.h> | |
40 | #include <asm/xmon.h> | |
6d7f58b0 | 41 | #include <asm/time.h> |
463ce0e1 | 42 | #include <asm/serial.h> |
51d3082f | 43 | #include <asm/udbg.h> |
9b6b563c | 44 | |
66ba135c SR |
45 | #include "setup.h" |
46 | ||
03501dab PM |
47 | #define DBG(fmt...) |
48 | ||
9b6b563c PM |
49 | #if defined CONFIG_KGDB |
50 | #include <asm/kgdb.h> | |
51 | #endif | |
52 | ||
53 | extern void platform_init(void); | |
54 | extern void bootx_init(unsigned long r4, unsigned long phys); | |
55 | ||
9b6b563c PM |
56 | boot_infos_t *boot_infos; |
57 | struct ide_machdep_calls ppc_ide_md; | |
58 | ||
80579e1f PM |
59 | int boot_cpuid; |
60 | EXPORT_SYMBOL_GPL(boot_cpuid); | |
61 | int boot_cpuid_phys; | |
62 | ||
9b6b563c PM |
63 | unsigned long ISA_DMA_THRESHOLD; |
64 | unsigned int DMA_MODE_READ; | |
65 | unsigned int DMA_MODE_WRITE; | |
66 | ||
e574d238 PM |
67 | int have_of = 1; |
68 | ||
9b6b563c | 69 | #ifdef CONFIG_PPC_MULTIPLATFORM |
9b6b563c PM |
70 | extern void prep_init(void); |
71 | extern void pmac_init(void); | |
72 | extern void chrp_init(void); | |
73 | ||
74 | dev_t boot_dev; | |
75 | #endif /* CONFIG_PPC_MULTIPLATFORM */ | |
76 | ||
77 | #ifdef CONFIG_MAGIC_SYSRQ | |
78 | unsigned long SYSRQ_KEY = 0x54; | |
79 | #endif /* CONFIG_MAGIC_SYSRQ */ | |
80 | ||
81 | #ifdef CONFIG_VGA_CONSOLE | |
82 | unsigned long vgacon_remap_base; | |
83 | #endif | |
84 | ||
85 | struct machdep_calls ppc_md; | |
e574d238 | 86 | EXPORT_SYMBOL(ppc_md); |
9b6b563c PM |
87 | |
88 | /* | |
89 | * These are used in binfmt_elf.c to put aux entries on the stack | |
90 | * for each elf executable being started. | |
91 | */ | |
92 | int dcache_bsize; | |
93 | int icache_bsize; | |
94 | int ucache_bsize; | |
95 | ||
9b6b563c PM |
96 | /* |
97 | * We're called here very early in the boot. We determine the machine | |
98 | * type and call the appropriate low-level setup functions. | |
99 | * -- Cort <cort@fsmlabs.com> | |
100 | * | |
101 | * Note that the kernel may be running at an address which is different | |
102 | * from the address that it was linked at, so we must use RELOC/PTRRELOC | |
103 | * to access static data (including strings). -- paulus | |
104 | */ | |
105 | unsigned long __init early_init(unsigned long dt_ptr) | |
106 | { | |
107 | unsigned long offset = reloc_offset(); | |
108 | ||
dd184343 PM |
109 | /* First zero the BSS -- use memset_io, some platforms don't have |
110 | * caches on yet */ | |
af308377 | 111 | memset_io((void __iomem *)PTRRELOC(&__bss_start), 0, _end - __bss_start); |
dd184343 | 112 | |
9b6b563c PM |
113 | /* |
114 | * Identify the CPU type and fix up code sections | |
115 | * that depend on which cpu we have. | |
116 | */ | |
117 | identify_cpu(offset, 0); | |
118 | do_cpu_ftr_fixups(offset); | |
119 | ||
9b6b563c PM |
120 | return KERNELBASE + offset; |
121 | } | |
122 | ||
9b6b563c PM |
123 | #ifdef CONFIG_PPC_MULTIPLATFORM |
124 | /* | |
125 | * The PPC_MULTIPLATFORM version of platform_init... | |
126 | */ | |
127 | void __init platform_init(void) | |
128 | { | |
129 | /* if we didn't get any bootinfo telling us what we are... */ | |
130 | if (_machine == 0) { | |
131 | /* prep boot loader tells us if we're prep or not */ | |
132 | if ( *(unsigned long *)(KERNELBASE) == (0xdeadc0de) ) | |
133 | _machine = _MACH_prep; | |
134 | } | |
135 | ||
136 | #ifdef CONFIG_PPC_PREP | |
137 | /* not much more to do here, if prep */ | |
138 | if (_machine == _MACH_prep) { | |
139 | prep_init(); | |
140 | return; | |
141 | } | |
142 | #endif | |
143 | ||
144 | #ifdef CONFIG_ADB | |
145 | if (strstr(cmd_line, "adb_sync")) { | |
146 | extern int __adb_probe_sync; | |
147 | __adb_probe_sync = 1; | |
148 | } | |
149 | #endif /* CONFIG_ADB */ | |
150 | ||
151 | switch (_machine) { | |
152 | #ifdef CONFIG_PPC_PMAC | |
153 | case _MACH_Pmac: | |
154 | pmac_init(); | |
155 | break; | |
156 | #endif | |
157 | #ifdef CONFIG_PPC_CHRP | |
158 | case _MACH_chrp: | |
159 | chrp_init(); | |
160 | break; | |
161 | #endif | |
162 | } | |
163 | } | |
03501dab | 164 | #endif |
9b6b563c | 165 | |
9b6b563c PM |
166 | /* |
167 | * Find out what kind of machine we're on and save any data we need | |
168 | * from the early boot process (devtree is copied on pmac by prom_init()). | |
169 | * This is called very early on the boot process, after a minimal | |
170 | * MMU environment has been set up but before MMU_init is called. | |
171 | */ | |
172 | void __init machine_init(unsigned long dt_ptr, unsigned long phys) | |
173 | { | |
51d3082f BH |
174 | /* If btext is enabled, we might have a BAT setup for early display, |
175 | * thus we do enable some very basic udbg output | |
176 | */ | |
177 | #ifdef CONFIG_BOOTX_TEXT | |
178 | udbg_putc = btext_drawchar; | |
179 | #endif | |
180 | ||
181 | /* Do some early initialization based on the flat device tree */ | |
9b6b563c PM |
182 | early_init_devtree(__va(dt_ptr)); |
183 | ||
51d3082f | 184 | /* Check default command line */ |
9b6b563c | 185 | #ifdef CONFIG_CMDLINE |
51d3082f BH |
186 | if (cmd_line[0] == 0) |
187 | strlcpy(cmd_line, CONFIG_CMDLINE, sizeof(cmd_line)); | |
9b6b563c PM |
188 | #endif /* CONFIG_CMDLINE */ |
189 | ||
51d3082f | 190 | /* Base init based on machine type */ |
35499c01 PM |
191 | platform_init(); |
192 | ||
9b6b563c | 193 | #ifdef CONFIG_6xx |
a0652fc9 PM |
194 | if (cpu_has_feature(CPU_FTR_CAN_DOZE) || |
195 | cpu_has_feature(CPU_FTR_CAN_NAP)) | |
196 | ppc_md.power_save = ppc6xx_idle; | |
9b6b563c | 197 | #endif |
9b6b563c PM |
198 | |
199 | if (ppc_md.progress) | |
200 | ppc_md.progress("id mach(): done", 0x200); | |
201 | } | |
202 | ||
203 | #ifdef CONFIG_BOOKE_WDT | |
204 | /* Checks wdt=x and wdt_period=xx command-line option */ | |
205 | int __init early_parse_wdt(char *p) | |
206 | { | |
207 | if (p && strncmp(p, "0", 1) != 0) | |
208 | booke_wdt_enabled = 1; | |
209 | ||
210 | return 0; | |
211 | } | |
212 | early_param("wdt", early_parse_wdt); | |
213 | ||
214 | int __init early_parse_wdt_period (char *p) | |
215 | { | |
216 | if (p) | |
217 | booke_wdt_period = simple_strtoul(p, NULL, 0); | |
218 | ||
219 | return 0; | |
220 | } | |
221 | early_param("wdt_period", early_parse_wdt_period); | |
222 | #endif /* CONFIG_BOOKE_WDT */ | |
223 | ||
224 | /* Checks "l2cr=xxxx" command-line option */ | |
225 | int __init ppc_setup_l2cr(char *str) | |
226 | { | |
227 | if (cpu_has_feature(CPU_FTR_L2CR)) { | |
228 | unsigned long val = simple_strtoul(str, NULL, 0); | |
229 | printk(KERN_INFO "l2cr set to %lx\n", val); | |
230 | _set_L2CR(0); /* force invalidate by disable cache */ | |
231 | _set_L2CR(val); /* and enable it */ | |
232 | } | |
233 | return 1; | |
234 | } | |
235 | __setup("l2cr=", ppc_setup_l2cr); | |
236 | ||
237 | #ifdef CONFIG_GENERIC_NVRAM | |
238 | ||
239 | /* Generic nvram hooks used by drivers/char/gen_nvram.c */ | |
240 | unsigned char nvram_read_byte(int addr) | |
241 | { | |
242 | if (ppc_md.nvram_read_val) | |
243 | return ppc_md.nvram_read_val(addr); | |
244 | return 0xff; | |
245 | } | |
246 | EXPORT_SYMBOL(nvram_read_byte); | |
247 | ||
248 | void nvram_write_byte(unsigned char val, int addr) | |
249 | { | |
250 | if (ppc_md.nvram_write_val) | |
251 | ppc_md.nvram_write_val(addr, val); | |
252 | } | |
253 | EXPORT_SYMBOL(nvram_write_byte); | |
254 | ||
255 | void nvram_sync(void) | |
256 | { | |
257 | if (ppc_md.nvram_sync) | |
258 | ppc_md.nvram_sync(); | |
259 | } | |
260 | EXPORT_SYMBOL(nvram_sync); | |
261 | ||
262 | #endif /* CONFIG_NVRAM */ | |
263 | ||
264 | static struct cpu cpu_devices[NR_CPUS]; | |
265 | ||
266 | int __init ppc_init(void) | |
267 | { | |
268 | int i; | |
269 | ||
270 | /* clear the progress line */ | |
271 | if ( ppc_md.progress ) ppc_md.progress(" ", 0xffff); | |
272 | ||
273 | /* register CPU devices */ | |
394e3902 AM |
274 | for_each_cpu(i) |
275 | register_cpu(&cpu_devices[i], i, NULL); | |
9b6b563c PM |
276 | |
277 | /* call platform init */ | |
278 | if (ppc_md.init != NULL) { | |
279 | ppc_md.init(); | |
280 | } | |
281 | return 0; | |
282 | } | |
283 | ||
284 | arch_initcall(ppc_init); | |
285 | ||
286 | /* Warning, IO base is not yet inited */ | |
287 | void __init setup_arch(char **cmdline_p) | |
288 | { | |
9b6b563c PM |
289 | extern void do_init_bootmem(void); |
290 | ||
291 | /* so udelay does something sensible, assume <= 1000 bogomips */ | |
292 | loops_per_jiffy = 500000000 / HZ; | |
293 | ||
9b6b563c | 294 | unflatten_device_tree(); |
a82765b6 | 295 | check_for_initrd(); |
463ce0e1 BH |
296 | |
297 | if (ppc_md.init_early) | |
298 | ppc_md.init_early(); | |
299 | ||
463ce0e1 | 300 | find_legacy_serial_ports(); |
9b6b563c PM |
301 | finish_device_tree(); |
302 | ||
5ad57078 PM |
303 | smp_setup_cpu_maps(); |
304 | ||
fca5dcd4 PM |
305 | #ifdef CONFIG_XMON_DEFAULT |
306 | xmon_init(1); | |
307 | #endif | |
51d3082f BH |
308 | /* Register early console */ |
309 | register_early_udbg_console(); | |
9b6b563c PM |
310 | |
311 | #if defined(CONFIG_KGDB) | |
312 | if (ppc_md.kgdb_map_scc) | |
313 | ppc_md.kgdb_map_scc(); | |
314 | set_debug_traps(); | |
315 | if (strstr(cmd_line, "gdb")) { | |
316 | if (ppc_md.progress) | |
317 | ppc_md.progress("setup_arch: kgdb breakpoint", 0x4000); | |
318 | printk("kgdb breakpoint activated\n"); | |
319 | breakpoint(); | |
320 | } | |
321 | #endif | |
322 | ||
323 | /* | |
324 | * Set cache line size based on type of cpu as a default. | |
325 | * Systems with OF can look in the properties on the cpu node(s) | |
326 | * for a possibly more accurate value. | |
327 | */ | |
328 | if (cpu_has_feature(CPU_FTR_SPLIT_ID_CACHE)) { | |
329 | dcache_bsize = cur_cpu_spec->dcache_bsize; | |
330 | icache_bsize = cur_cpu_spec->icache_bsize; | |
331 | ucache_bsize = 0; | |
332 | } else | |
333 | ucache_bsize = dcache_bsize = icache_bsize | |
334 | = cur_cpu_spec->dcache_bsize; | |
335 | ||
336 | /* reboot on panic */ | |
337 | panic_timeout = 180; | |
338 | ||
339 | init_mm.start_code = PAGE_OFFSET; | |
340 | init_mm.end_code = (unsigned long) _etext; | |
341 | init_mm.end_data = (unsigned long) _edata; | |
49b09853 | 342 | init_mm.brk = klimit; |
9b6b563c PM |
343 | |
344 | /* Save unparsed command line copy for /proc/cmdline */ | |
345 | strlcpy(saved_command_line, cmd_line, COMMAND_LINE_SIZE); | |
346 | *cmdline_p = cmd_line; | |
347 | ||
348 | parse_early_param(); | |
349 | ||
350 | /* set up the bootmem stuff with available memory */ | |
351 | do_init_bootmem(); | |
352 | if ( ppc_md.progress ) ppc_md.progress("setup_arch: bootmem", 0x3eab); | |
353 | ||
9b6b563c PM |
354 | #ifdef CONFIG_DUMMY_CONSOLE |
355 | conswitchp = &dummy_con; | |
356 | #endif | |
357 | ||
358 | ppc_md.setup_arch(); | |
359 | if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab); | |
360 | ||
361 | paging_init(); | |
362 | ||
363 | /* this is for modules since _machine can be a define -- Cort */ | |
364 | ppc_md.ppc_machine = _machine; | |
365 | } |