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1da177e4 1/*
1da177e4
LT
2 * Derived from arch/i386/kernel/irq.c
3 * Copyright (C) 1992 Linus Torvalds
4 * Adapted from arch/i386 by Gary Thomas
5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
756e7104
SR
6 * Updated and modified by Cort Dougan <cort@fsmlabs.com>
7 * Copyright (C) 1996-2001 Cort Dougan
1da177e4
LT
8 * Adapted for Power Macintosh by Paul Mackerras
9 * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
10 * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
756e7104 11 *
1da177e4
LT
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version.
16 *
17 * This file contains the code used by various IRQ handling routines:
18 * asking for different IRQ's should be done through these routines
19 * instead of just grabbing them. Thus setups with different IRQ numbers
20 * shouldn't result in any weird surprises, and installing new handlers
21 * should be easier.
756e7104
SR
22 *
23 * The MPC8xx has an interrupt mask in the SIU. If a bit is set, the
24 * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit
25 * mask register (of which only 16 are defined), hence the weird shifting
26 * and complement of the cached_irq_mask. I want to be able to stuff
27 * this right into the SIU SMASK register.
28 * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx
29 * to reduce code space and undefined function references.
1da177e4
LT
30 */
31
0ebfff14
BH
32#undef DEBUG
33
1da177e4
LT
34#include <linux/module.h>
35#include <linux/threads.h>
36#include <linux/kernel_stat.h>
37#include <linux/signal.h>
38#include <linux/sched.h>
756e7104 39#include <linux/ptrace.h>
1da177e4
LT
40#include <linux/ioport.h>
41#include <linux/interrupt.h>
42#include <linux/timex.h>
1da177e4
LT
43#include <linux/init.h>
44#include <linux/slab.h>
1da177e4
LT
45#include <linux/delay.h>
46#include <linux/irq.h>
756e7104
SR
47#include <linux/seq_file.h>
48#include <linux/cpumask.h>
1da177e4
LT
49#include <linux/profile.h>
50#include <linux/bitops.h>
0ebfff14
BH
51#include <linux/list.h>
52#include <linux/radix-tree.h>
53#include <linux/mutex.h>
54#include <linux/bootmem.h>
45934c47 55#include <linux/pci.h>
1da177e4
LT
56
57#include <asm/uaccess.h>
58#include <asm/system.h>
59#include <asm/io.h>
60#include <asm/pgtable.h>
61#include <asm/irq.h>
62#include <asm/cache.h>
63#include <asm/prom.h>
64#include <asm/ptrace.h>
1da177e4 65#include <asm/machdep.h>
0ebfff14 66#include <asm/udbg.h>
d04c56f7 67#ifdef CONFIG_PPC64
1da177e4 68#include <asm/paca.h>
d04c56f7 69#include <asm/firmware.h>
756e7104 70#endif
1da177e4 71
868accb7 72int __irq_offset_value;
756e7104
SR
73static int ppc_spurious_interrupts;
74
756e7104 75#ifdef CONFIG_PPC32
b9e5b4e6
BH
76EXPORT_SYMBOL(__irq_offset_value);
77atomic_t ppc_n_lost_interrupts;
756e7104 78
b9e5b4e6
BH
79#ifndef CONFIG_PPC_MERGE
80#define NR_MASK_WORDS ((NR_IRQS + 31) / 32)
756e7104 81unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
b9e5b4e6 82#endif
756e7104
SR
83
84#ifdef CONFIG_TAU_INT
85extern int tau_initialized;
86extern int tau_interrupts(int);
87#endif
b9e5b4e6 88#endif /* CONFIG_PPC32 */
756e7104
SR
89
90#if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE)
91extern atomic_t ipi_recv;
92extern atomic_t ipi_sent;
93#endif
756e7104
SR
94
95#ifdef CONFIG_PPC64
1da177e4
LT
96EXPORT_SYMBOL(irq_desc);
97
98int distribute_irqs = 1;
d04c56f7
PM
99
100void local_irq_restore(unsigned long en)
101{
102 get_paca()->soft_enabled = en;
103 if (!en)
104 return;
105
106 if (firmware_has_feature(FW_FEATURE_ISERIES)) {
107 if (get_paca()->lppaca_ptr->int_dword.any_int)
108 iseries_handle_interrupts();
109 return;
110 }
111
112 if (get_paca()->hard_enabled)
113 return;
114 /* need to hard-enable interrupts here */
115 get_paca()->hard_enabled = en;
116 if ((int)mfspr(SPRN_DEC) < 0)
117 mtspr(SPRN_DEC, 1);
118 hard_irq_enable();
119}
756e7104 120#endif /* CONFIG_PPC64 */
1da177e4
LT
121
122int show_interrupts(struct seq_file *p, void *v)
123{
756e7104
SR
124 int i = *(loff_t *)v, j;
125 struct irqaction *action;
1da177e4
LT
126 irq_desc_t *desc;
127 unsigned long flags;
128
129 if (i == 0) {
756e7104
SR
130 seq_puts(p, " ");
131 for_each_online_cpu(j)
132 seq_printf(p, "CPU%d ", j);
1da177e4
LT
133 seq_putc(p, '\n');
134 }
135
136 if (i < NR_IRQS) {
137 desc = get_irq_desc(i);
138 spin_lock_irqsave(&desc->lock, flags);
139 action = desc->action;
140 if (!action || !action->handler)
141 goto skip;
142 seq_printf(p, "%3d: ", i);
143#ifdef CONFIG_SMP
756e7104
SR
144 for_each_online_cpu(j)
145 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
1da177e4
LT
146#else
147 seq_printf(p, "%10u ", kstat_irqs(i));
148#endif /* CONFIG_SMP */
d1bef4ed
IM
149 if (desc->chip)
150 seq_printf(p, " %s ", desc->chip->typename);
1da177e4 151 else
756e7104 152 seq_puts(p, " None ");
1da177e4 153 seq_printf(p, "%s", (desc->status & IRQ_LEVEL) ? "Level " : "Edge ");
756e7104
SR
154 seq_printf(p, " %s", action->name);
155 for (action = action->next; action; action = action->next)
1da177e4
LT
156 seq_printf(p, ", %s", action->name);
157 seq_putc(p, '\n');
158skip:
159 spin_unlock_irqrestore(&desc->lock, flags);
756e7104
SR
160 } else if (i == NR_IRQS) {
161#ifdef CONFIG_PPC32
162#ifdef CONFIG_TAU_INT
163 if (tau_initialized){
164 seq_puts(p, "TAU: ");
394e3902
AM
165 for_each_online_cpu(j)
166 seq_printf(p, "%10u ", tau_interrupts(j));
756e7104
SR
167 seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n");
168 }
169#endif
170#if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE)
171 /* should this be per processor send/receive? */
172 seq_printf(p, "IPI (recv/sent): %10u/%u\n",
173 atomic_read(&ipi_recv), atomic_read(&ipi_sent));
174#endif
175#endif /* CONFIG_PPC32 */
1da177e4 176 seq_printf(p, "BAD: %10u\n", ppc_spurious_interrupts);
756e7104 177 }
1da177e4
LT
178 return 0;
179}
180
181#ifdef CONFIG_HOTPLUG_CPU
182void fixup_irqs(cpumask_t map)
183{
184 unsigned int irq;
185 static int warned;
186
187 for_each_irq(irq) {
188 cpumask_t mask;
189
190 if (irq_desc[irq].status & IRQ_PER_CPU)
191 continue;
192
a53da52f 193 cpus_and(mask, irq_desc[irq].affinity, map);
1da177e4
LT
194 if (any_online_cpu(mask) == NR_CPUS) {
195 printk("Breaking affinity for irq %i\n", irq);
196 mask = map;
197 }
d1bef4ed
IM
198 if (irq_desc[irq].chip->set_affinity)
199 irq_desc[irq].chip->set_affinity(irq, mask);
1da177e4
LT
200 else if (irq_desc[irq].action && !(warned++))
201 printk("Cannot set affinity for irq %i\n", irq);
202 }
203
204 local_irq_enable();
205 mdelay(1);
206 local_irq_disable();
207}
208#endif
209
1da177e4
LT
210void do_IRQ(struct pt_regs *regs)
211{
7d12e780 212 struct pt_regs *old_regs = set_irq_regs(regs);
0ebfff14 213 unsigned int irq;
b709c083
SR
214#ifdef CONFIG_IRQSTACKS
215 struct thread_info *curtp, *irqtp;
216#endif
1da177e4 217
756e7104 218 irq_enter();
1da177e4
LT
219
220#ifdef CONFIG_DEBUG_STACKOVERFLOW
221 /* Debugging check for stack overflow: is there less than 2KB free? */
222 {
223 long sp;
224
225 sp = __get_SP() & (THREAD_SIZE-1);
226
227 if (unlikely(sp < (sizeof(struct thread_info) + 2048))) {
228 printk("do_IRQ: stack overflow: %ld\n",
229 sp - sizeof(struct thread_info));
230 dump_stack();
231 }
232 }
233#endif
234
756e7104
SR
235 /*
236 * Every platform is required to implement ppc_md.get_irq.
237 * This function will either return an irq number or -1 to
238 * indicate there are no more pending.
239 * The value -2 is for buggy hardware and means that this IRQ
240 * has already been handled. -- Tom
241 */
35a84c2f 242 irq = ppc_md.get_irq();
1da177e4 243
0ebfff14 244 if (irq != NO_IRQ && irq != NO_IRQ_IGNORE) {
b709c083
SR
245#ifdef CONFIG_IRQSTACKS
246 /* Switch to the irq stack to handle this */
247 curtp = current_thread_info();
248 irqtp = hardirq_ctx[smp_processor_id()];
249 if (curtp != irqtp) {
b9e5b4e6
BH
250 struct irq_desc *desc = irq_desc + irq;
251 void *handler = desc->handle_irq;
252 if (handler == NULL)
253 handler = &__do_IRQ;
b709c083
SR
254 irqtp->task = curtp->task;
255 irqtp->flags = 0;
7d12e780 256 call_handle_irq(irq, desc, irqtp, handler);
b709c083
SR
257 irqtp->task = NULL;
258 if (irqtp->flags)
259 set_bits(irqtp->flags, &curtp->flags);
260 } else
261#endif
7d12e780 262 generic_handle_irq(irq);
0ebfff14 263 } else if (irq != NO_IRQ_IGNORE)
e199500c
SR
264 /* That's not SMP safe ... but who cares ? */
265 ppc_spurious_interrupts++;
266
756e7104 267 irq_exit();
7d12e780 268 set_irq_regs(old_regs);
756e7104 269
e199500c 270#ifdef CONFIG_PPC_ISERIES
3356bb9f
DG
271 if (get_lppaca()->int_dword.fields.decr_int) {
272 get_lppaca()->int_dword.fields.decr_int = 0;
273 /* Signal a fake decrementer interrupt */
274 timer_interrupt(regs);
e199500c
SR
275 }
276#endif
277}
1da177e4
LT
278
279void __init init_IRQ(void)
280{
1da177e4 281 ppc_md.init_IRQ();
756e7104 282#ifdef CONFIG_PPC64
1da177e4 283 irq_ctx_init();
756e7104 284#endif
1da177e4
LT
285}
286
1da177e4 287
1da177e4 288#ifdef CONFIG_IRQSTACKS
22722051
AM
289struct thread_info *softirq_ctx[NR_CPUS] __read_mostly;
290struct thread_info *hardirq_ctx[NR_CPUS] __read_mostly;
1da177e4
LT
291
292void irq_ctx_init(void)
293{
294 struct thread_info *tp;
295 int i;
296
0e551954 297 for_each_possible_cpu(i) {
1da177e4
LT
298 memset((void *)softirq_ctx[i], 0, THREAD_SIZE);
299 tp = softirq_ctx[i];
300 tp->cpu = i;
301 tp->preempt_count = SOFTIRQ_OFFSET;
302
303 memset((void *)hardirq_ctx[i], 0, THREAD_SIZE);
304 tp = hardirq_ctx[i];
305 tp->cpu = i;
306 tp->preempt_count = HARDIRQ_OFFSET;
307 }
308}
309
c6622f63
PM
310static inline void do_softirq_onstack(void)
311{
312 struct thread_info *curtp, *irqtp;
313
314 curtp = current_thread_info();
315 irqtp = softirq_ctx[smp_processor_id()];
316 irqtp->task = curtp->task;
317 call_do_softirq(irqtp);
318 irqtp->task = NULL;
319}
1da177e4 320
c6622f63
PM
321#else
322#define do_softirq_onstack() __do_softirq()
323#endif /* CONFIG_IRQSTACKS */
324
1da177e4
LT
325void do_softirq(void)
326{
327 unsigned long flags;
1da177e4
LT
328
329 if (in_interrupt())
1da177e4
LT
330 return;
331
1da177e4 332 local_irq_save(flags);
1da177e4 333
912b2539 334 if (local_softirq_pending())
c6622f63 335 do_softirq_onstack();
1da177e4
LT
336
337 local_irq_restore(flags);
1da177e4 338}
1da177e4
LT
339EXPORT_SYMBOL(do_softirq);
340
1da177e4 341
1da177e4 342/*
0ebfff14 343 * IRQ controller and virtual interrupts
1da177e4
LT
344 */
345
0ebfff14 346#ifdef CONFIG_PPC_MERGE
1da177e4 347
0ebfff14
BH
348static LIST_HEAD(irq_hosts);
349static spinlock_t irq_big_lock = SPIN_LOCK_UNLOCKED;
8ec8f2e8
BH
350static DEFINE_PER_CPU(unsigned int, irq_radix_reader);
351static unsigned int irq_radix_writer;
0ebfff14
BH
352struct irq_map_entry irq_map[NR_IRQS];
353static unsigned int irq_virq_count = NR_IRQS;
354static struct irq_host *irq_default_host;
1da177e4 355
0ebfff14
BH
356struct irq_host *irq_alloc_host(unsigned int revmap_type,
357 unsigned int revmap_arg,
358 struct irq_host_ops *ops,
359 irq_hw_number_t inval_irq)
1da177e4 360{
0ebfff14
BH
361 struct irq_host *host;
362 unsigned int size = sizeof(struct irq_host);
363 unsigned int i;
364 unsigned int *rmap;
365 unsigned long flags;
366
367 /* Allocate structure and revmap table if using linear mapping */
368 if (revmap_type == IRQ_HOST_MAP_LINEAR)
369 size += revmap_arg * sizeof(unsigned int);
370 if (mem_init_done)
371 host = kzalloc(size, GFP_KERNEL);
372 else {
373 host = alloc_bootmem(size);
374 if (host)
375 memset(host, 0, size);
376 }
377 if (host == NULL)
378 return NULL;
7d01c880 379
0ebfff14
BH
380 /* Fill structure */
381 host->revmap_type = revmap_type;
382 host->inval_irq = inval_irq;
383 host->ops = ops;
7d01c880 384
0ebfff14
BH
385 spin_lock_irqsave(&irq_big_lock, flags);
386
387 /* If it's a legacy controller, check for duplicates and
388 * mark it as allocated (we use irq 0 host pointer for that
389 */
390 if (revmap_type == IRQ_HOST_MAP_LEGACY) {
391 if (irq_map[0].host != NULL) {
392 spin_unlock_irqrestore(&irq_big_lock, flags);
393 /* If we are early boot, we can't free the structure,
394 * too bad...
395 * this will be fixed once slab is made available early
396 * instead of the current cruft
397 */
398 if (mem_init_done)
399 kfree(host);
400 return NULL;
401 }
402 irq_map[0].host = host;
403 }
404
405 list_add(&host->link, &irq_hosts);
406 spin_unlock_irqrestore(&irq_big_lock, flags);
407
408 /* Additional setups per revmap type */
409 switch(revmap_type) {
410 case IRQ_HOST_MAP_LEGACY:
411 /* 0 is always the invalid number for legacy */
412 host->inval_irq = 0;
413 /* setup us as the host for all legacy interrupts */
414 for (i = 1; i < NUM_ISA_INTERRUPTS; i++) {
415 irq_map[i].hwirq = 0;
416 smp_wmb();
417 irq_map[i].host = host;
418 smp_wmb();
419
6e99e458
BH
420 /* Clear norequest flags */
421 get_irq_desc(i)->status &= ~IRQ_NOREQUEST;
0ebfff14
BH
422
423 /* Legacy flags are left to default at this point,
424 * one can then use irq_create_mapping() to
425 * explicitely change them
426 */
6e99e458 427 ops->map(host, i, i);
0ebfff14
BH
428 }
429 break;
430 case IRQ_HOST_MAP_LINEAR:
431 rmap = (unsigned int *)(host + 1);
432 for (i = 0; i < revmap_arg; i++)
433 rmap[i] = IRQ_NONE;
434 host->revmap_data.linear.size = revmap_arg;
435 smp_wmb();
436 host->revmap_data.linear.revmap = rmap;
437 break;
438 default:
439 break;
440 }
441
442 pr_debug("irq: Allocated host of type %d @0x%p\n", revmap_type, host);
443
444 return host;
1da177e4
LT
445}
446
0ebfff14 447struct irq_host *irq_find_host(struct device_node *node)
1da177e4 448{
0ebfff14
BH
449 struct irq_host *h, *found = NULL;
450 unsigned long flags;
451
452 /* We might want to match the legacy controller last since
453 * it might potentially be set to match all interrupts in
454 * the absence of a device node. This isn't a problem so far
455 * yet though...
456 */
457 spin_lock_irqsave(&irq_big_lock, flags);
458 list_for_each_entry(h, &irq_hosts, link)
459 if (h->ops->match == NULL || h->ops->match(h, node)) {
460 found = h;
461 break;
462 }
463 spin_unlock_irqrestore(&irq_big_lock, flags);
464 return found;
465}
466EXPORT_SYMBOL_GPL(irq_find_host);
467
468void irq_set_default_host(struct irq_host *host)
469{
470 pr_debug("irq: Default host set to @0x%p\n", host);
1da177e4 471
0ebfff14
BH
472 irq_default_host = host;
473}
1da177e4 474
0ebfff14
BH
475void irq_set_virq_count(unsigned int count)
476{
477 pr_debug("irq: Trying to set virq count to %d\n", count);
fef1c772 478
0ebfff14
BH
479 BUG_ON(count < NUM_ISA_INTERRUPTS);
480 if (count < NR_IRQS)
481 irq_virq_count = count;
482}
483
8ec8f2e8
BH
484/* radix tree not lockless safe ! we use a brlock-type mecanism
485 * for now, until we can use a lockless radix tree
486 */
487static void irq_radix_wrlock(unsigned long *flags)
488{
489 unsigned int cpu, ok;
490
491 spin_lock_irqsave(&irq_big_lock, *flags);
492 irq_radix_writer = 1;
493 smp_mb();
494 do {
495 barrier();
496 ok = 1;
497 for_each_possible_cpu(cpu) {
498 if (per_cpu(irq_radix_reader, cpu)) {
499 ok = 0;
500 break;
501 }
502 }
503 if (!ok)
504 cpu_relax();
505 } while(!ok);
506}
507
508static void irq_radix_wrunlock(unsigned long flags)
509{
510 smp_wmb();
511 irq_radix_writer = 0;
512 spin_unlock_irqrestore(&irq_big_lock, flags);
513}
514
515static void irq_radix_rdlock(unsigned long *flags)
516{
517 local_irq_save(*flags);
518 __get_cpu_var(irq_radix_reader) = 1;
519 smp_mb();
520 if (likely(irq_radix_writer == 0))
521 return;
522 __get_cpu_var(irq_radix_reader) = 0;
523 smp_wmb();
524 spin_lock(&irq_big_lock);
525 __get_cpu_var(irq_radix_reader) = 1;
526 spin_unlock(&irq_big_lock);
527}
528
529static void irq_radix_rdunlock(unsigned long flags)
530{
531 __get_cpu_var(irq_radix_reader) = 0;
532 local_irq_restore(flags);
533}
534
535
0ebfff14 536unsigned int irq_create_mapping(struct irq_host *host,
6e99e458 537 irq_hw_number_t hwirq)
0ebfff14
BH
538{
539 unsigned int virq, hint;
540
6e99e458 541 pr_debug("irq: irq_create_mapping(0x%p, 0x%lx)\n", host, hwirq);
0ebfff14
BH
542
543 /* Look for default host if nececssary */
544 if (host == NULL)
545 host = irq_default_host;
546 if (host == NULL) {
547 printk(KERN_WARNING "irq_create_mapping called for"
548 " NULL host, hwirq=%lx\n", hwirq);
549 WARN_ON(1);
550 return NO_IRQ;
1da177e4 551 }
0ebfff14 552 pr_debug("irq: -> using host @%p\n", host);
1da177e4 553
0ebfff14
BH
554 /* Check if mapping already exist, if it does, call
555 * host->ops->map() to update the flags
556 */
557 virq = irq_find_mapping(host, hwirq);
558 if (virq != IRQ_NONE) {
559 pr_debug("irq: -> existing mapping on virq %d\n", virq);
0ebfff14 560 return virq;
1da177e4
LT
561 }
562
0ebfff14
BH
563 /* Get a virtual interrupt number */
564 if (host->revmap_type == IRQ_HOST_MAP_LEGACY) {
565 /* Handle legacy */
566 virq = (unsigned int)hwirq;
567 if (virq == 0 || virq >= NUM_ISA_INTERRUPTS)
568 return NO_IRQ;
569 return virq;
570 } else {
571 /* Allocate a virtual interrupt number */
572 hint = hwirq % irq_virq_count;
573 virq = irq_alloc_virt(host, 1, hint);
574 if (virq == NO_IRQ) {
575 pr_debug("irq: -> virq allocation failed\n");
576 return NO_IRQ;
577 }
578 }
579 pr_debug("irq: -> obtained virq %d\n", virq);
580
6e99e458
BH
581 /* Clear IRQ_NOREQUEST flag */
582 get_irq_desc(virq)->status &= ~IRQ_NOREQUEST;
0ebfff14
BH
583
584 /* map it */
6e99e458
BH
585 smp_wmb();
586 irq_map[virq].hwirq = hwirq;
587 smp_mb();
588 if (host->ops->map(host, virq, hwirq)) {
0ebfff14
BH
589 pr_debug("irq: -> mapping failed, freeing\n");
590 irq_free_virt(virq, 1);
591 return NO_IRQ;
592 }
1da177e4 593 return virq;
0ebfff14
BH
594}
595EXPORT_SYMBOL_GPL(irq_create_mapping);
596
f3d2ab41
AV
597unsigned int irq_create_of_mapping(struct device_node *controller,
598 u32 *intspec, unsigned int intsize)
0ebfff14
BH
599{
600 struct irq_host *host;
601 irq_hw_number_t hwirq;
6e99e458
BH
602 unsigned int type = IRQ_TYPE_NONE;
603 unsigned int virq;
1da177e4 604
0ebfff14
BH
605 if (controller == NULL)
606 host = irq_default_host;
607 else
608 host = irq_find_host(controller);
6e99e458
BH
609 if (host == NULL) {
610 printk(KERN_WARNING "irq: no irq host found for %s !\n",
611 controller->full_name);
0ebfff14 612 return NO_IRQ;
6e99e458 613 }
0ebfff14
BH
614
615 /* If host has no translation, then we assume interrupt line */
616 if (host->ops->xlate == NULL)
617 hwirq = intspec[0];
618 else {
619 if (host->ops->xlate(host, controller, intspec, intsize,
6e99e458 620 &hwirq, &type))
0ebfff14 621 return NO_IRQ;
1da177e4 622 }
0ebfff14 623
6e99e458
BH
624 /* Create mapping */
625 virq = irq_create_mapping(host, hwirq);
626 if (virq == NO_IRQ)
627 return virq;
628
629 /* Set type if specified and different than the current one */
630 if (type != IRQ_TYPE_NONE &&
631 type != (get_irq_desc(virq)->status & IRQF_TRIGGER_MASK))
632 set_irq_type(virq, type);
633 return virq;
1da177e4 634}
0ebfff14 635EXPORT_SYMBOL_GPL(irq_create_of_mapping);
1da177e4 636
0ebfff14 637unsigned int irq_of_parse_and_map(struct device_node *dev, int index)
1da177e4 638{
0ebfff14 639 struct of_irq oirq;
1da177e4 640
0ebfff14
BH
641 if (of_irq_map_one(dev, index, &oirq))
642 return NO_IRQ;
1da177e4 643
0ebfff14
BH
644 return irq_create_of_mapping(oirq.controller, oirq.specifier,
645 oirq.size);
646}
647EXPORT_SYMBOL_GPL(irq_of_parse_and_map);
1da177e4 648
0ebfff14
BH
649void irq_dispose_mapping(unsigned int virq)
650{
5414c6be 651 struct irq_host *host;
0ebfff14
BH
652 irq_hw_number_t hwirq;
653 unsigned long flags;
1da177e4 654
5414c6be
ME
655 if (virq == NO_IRQ)
656 return;
657
658 host = irq_map[virq].host;
0ebfff14
BH
659 WARN_ON (host == NULL);
660 if (host == NULL)
661 return;
1da177e4 662
0ebfff14
BH
663 /* Never unmap legacy interrupts */
664 if (host->revmap_type == IRQ_HOST_MAP_LEGACY)
665 return;
1da177e4 666
0ebfff14
BH
667 /* remove chip and handler */
668 set_irq_chip_and_handler(virq, NULL, NULL);
669
670 /* Make sure it's completed */
671 synchronize_irq(virq);
672
673 /* Tell the PIC about it */
674 if (host->ops->unmap)
675 host->ops->unmap(host, virq);
676 smp_mb();
677
678 /* Clear reverse map */
679 hwirq = irq_map[virq].hwirq;
680 switch(host->revmap_type) {
681 case IRQ_HOST_MAP_LINEAR:
682 if (hwirq < host->revmap_data.linear.size)
683 host->revmap_data.linear.revmap[hwirq] = IRQ_NONE;
684 break;
685 case IRQ_HOST_MAP_TREE:
686 /* Check if radix tree allocated yet */
687 if (host->revmap_data.tree.gfp_mask == 0)
688 break;
8ec8f2e8 689 irq_radix_wrlock(&flags);
0ebfff14 690 radix_tree_delete(&host->revmap_data.tree, hwirq);
8ec8f2e8 691 irq_radix_wrunlock(flags);
0ebfff14
BH
692 break;
693 }
1da177e4 694
0ebfff14
BH
695 /* Destroy map */
696 smp_mb();
697 irq_map[virq].hwirq = host->inval_irq;
1da177e4 698
0ebfff14
BH
699 /* Set some flags */
700 get_irq_desc(virq)->status |= IRQ_NOREQUEST;
1da177e4 701
0ebfff14
BH
702 /* Free it */
703 irq_free_virt(virq, 1);
1da177e4 704}
0ebfff14 705EXPORT_SYMBOL_GPL(irq_dispose_mapping);
1da177e4 706
0ebfff14
BH
707unsigned int irq_find_mapping(struct irq_host *host,
708 irq_hw_number_t hwirq)
709{
710 unsigned int i;
711 unsigned int hint = hwirq % irq_virq_count;
712
713 /* Look for default host if nececssary */
714 if (host == NULL)
715 host = irq_default_host;
716 if (host == NULL)
717 return NO_IRQ;
718
719 /* legacy -> bail early */
720 if (host->revmap_type == IRQ_HOST_MAP_LEGACY)
721 return hwirq;
722
723 /* Slow path does a linear search of the map */
724 if (hint < NUM_ISA_INTERRUPTS)
725 hint = NUM_ISA_INTERRUPTS;
726 i = hint;
727 do {
728 if (irq_map[i].host == host &&
729 irq_map[i].hwirq == hwirq)
730 return i;
731 i++;
732 if (i >= irq_virq_count)
733 i = NUM_ISA_INTERRUPTS;
734 } while(i != hint);
735 return NO_IRQ;
736}
737EXPORT_SYMBOL_GPL(irq_find_mapping);
1da177e4 738
0ebfff14
BH
739
740unsigned int irq_radix_revmap(struct irq_host *host,
741 irq_hw_number_t hwirq)
1da177e4 742{
0ebfff14
BH
743 struct radix_tree_root *tree;
744 struct irq_map_entry *ptr;
745 unsigned int virq;
746 unsigned long flags;
1da177e4 747
0ebfff14 748 WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE);
1da177e4 749
0ebfff14
BH
750 /* Check if the radix tree exist yet. We test the value of
751 * the gfp_mask for that. Sneaky but saves another int in the
752 * structure. If not, we fallback to slow mode
753 */
754 tree = &host->revmap_data.tree;
755 if (tree->gfp_mask == 0)
756 return irq_find_mapping(host, hwirq);
757
0ebfff14 758 /* Now try to resolve */
8ec8f2e8 759 irq_radix_rdlock(&flags);
0ebfff14 760 ptr = radix_tree_lookup(tree, hwirq);
8ec8f2e8
BH
761 irq_radix_rdunlock(flags);
762
0ebfff14
BH
763 /* Found it, return */
764 if (ptr) {
765 virq = ptr - irq_map;
8ec8f2e8 766 return virq;
1da177e4 767 }
0ebfff14
BH
768
769 /* If not there, try to insert it */
770 virq = irq_find_mapping(host, hwirq);
8ec8f2e8
BH
771 if (virq != NO_IRQ) {
772 irq_radix_wrlock(&flags);
e5c14ce1 773 radix_tree_insert(tree, hwirq, &irq_map[virq]);
8ec8f2e8
BH
774 irq_radix_wrunlock(flags);
775 }
0ebfff14 776 return virq;
1da177e4
LT
777}
778
0ebfff14
BH
779unsigned int irq_linear_revmap(struct irq_host *host,
780 irq_hw_number_t hwirq)
c6622f63 781{
0ebfff14 782 unsigned int *revmap;
c6622f63 783
0ebfff14
BH
784 WARN_ON(host->revmap_type != IRQ_HOST_MAP_LINEAR);
785
786 /* Check revmap bounds */
787 if (unlikely(hwirq >= host->revmap_data.linear.size))
788 return irq_find_mapping(host, hwirq);
789
790 /* Check if revmap was allocated */
791 revmap = host->revmap_data.linear.revmap;
792 if (unlikely(revmap == NULL))
793 return irq_find_mapping(host, hwirq);
794
795 /* Fill up revmap with slow path if no mapping found */
796 if (unlikely(revmap[hwirq] == NO_IRQ))
797 revmap[hwirq] = irq_find_mapping(host, hwirq);
798
799 return revmap[hwirq];
c6622f63
PM
800}
801
0ebfff14
BH
802unsigned int irq_alloc_virt(struct irq_host *host,
803 unsigned int count,
804 unsigned int hint)
805{
806 unsigned long flags;
807 unsigned int i, j, found = NO_IRQ;
c6622f63 808
0ebfff14
BH
809 if (count == 0 || count > (irq_virq_count - NUM_ISA_INTERRUPTS))
810 return NO_IRQ;
811
812 spin_lock_irqsave(&irq_big_lock, flags);
813
814 /* Use hint for 1 interrupt if any */
815 if (count == 1 && hint >= NUM_ISA_INTERRUPTS &&
816 hint < irq_virq_count && irq_map[hint].host == NULL) {
817 found = hint;
818 goto hint_found;
819 }
820
821 /* Look for count consecutive numbers in the allocatable
822 * (non-legacy) space
823 */
e1251465
ME
824 for (i = NUM_ISA_INTERRUPTS, j = 0; i < irq_virq_count; i++) {
825 if (irq_map[i].host != NULL)
826 j = 0;
827 else
828 j++;
829
830 if (j == count) {
831 found = i - count + 1;
832 break;
833 }
0ebfff14
BH
834 }
835 if (found == NO_IRQ) {
836 spin_unlock_irqrestore(&irq_big_lock, flags);
837 return NO_IRQ;
838 }
839 hint_found:
840 for (i = found; i < (found + count); i++) {
841 irq_map[i].hwirq = host->inval_irq;
842 smp_wmb();
843 irq_map[i].host = host;
844 }
845 spin_unlock_irqrestore(&irq_big_lock, flags);
846 return found;
847}
848
849void irq_free_virt(unsigned int virq, unsigned int count)
1da177e4
LT
850{
851 unsigned long flags;
0ebfff14 852 unsigned int i;
1da177e4 853
0ebfff14
BH
854 WARN_ON (virq < NUM_ISA_INTERRUPTS);
855 WARN_ON (count == 0 || (virq + count) > irq_virq_count);
1da177e4 856
0ebfff14
BH
857 spin_lock_irqsave(&irq_big_lock, flags);
858 for (i = virq; i < (virq + count); i++) {
859 struct irq_host *host;
1da177e4 860
0ebfff14
BH
861 if (i < NUM_ISA_INTERRUPTS ||
862 (virq + count) > irq_virq_count)
863 continue;
1da177e4 864
0ebfff14
BH
865 host = irq_map[i].host;
866 irq_map[i].hwirq = host->inval_irq;
867 smp_wmb();
868 irq_map[i].host = NULL;
869 }
870 spin_unlock_irqrestore(&irq_big_lock, flags);
1da177e4 871}
0ebfff14
BH
872
873void irq_early_init(void)
874{
875 unsigned int i;
876
877 for (i = 0; i < NR_IRQS; i++)
878 get_irq_desc(i)->status |= IRQ_NOREQUEST;
879}
880
881/* We need to create the radix trees late */
882static int irq_late_init(void)
883{
884 struct irq_host *h;
885 unsigned long flags;
886
8ec8f2e8 887 irq_radix_wrlock(&flags);
0ebfff14
BH
888 list_for_each_entry(h, &irq_hosts, link) {
889 if (h->revmap_type == IRQ_HOST_MAP_TREE)
890 INIT_RADIX_TREE(&h->revmap_data.tree, GFP_ATOMIC);
891 }
8ec8f2e8 892 irq_radix_wrunlock(flags);
0ebfff14
BH
893
894 return 0;
895}
896arch_initcall(irq_late_init);
897
898#endif /* CONFIG_PPC_MERGE */
1da177e4 899
204face4
JM
900#ifdef CONFIG_PCI_MSI
901int pci_enable_msi(struct pci_dev * pdev)
902{
903 if (ppc_md.enable_msi)
904 return ppc_md.enable_msi(pdev);
905 else
906 return -1;
907}
45934c47 908EXPORT_SYMBOL(pci_enable_msi);
204face4
JM
909
910void pci_disable_msi(struct pci_dev * pdev)
911{
912 if (ppc_md.disable_msi)
913 ppc_md.disable_msi(pdev);
914}
45934c47 915EXPORT_SYMBOL(pci_disable_msi);
204face4
JM
916
917void pci_scan_msi_device(struct pci_dev *dev) {}
918int pci_enable_msix(struct pci_dev* dev, struct msix_entry *entries, int nvec) {return -1;}
919void pci_disable_msix(struct pci_dev *dev) {}
920void msi_remove_pci_irq_vectors(struct pci_dev *dev) {}
921void disable_msi_mode(struct pci_dev *dev, int pos, int type) {}
922void pci_no_msi(void) {}
45934c47
JM
923EXPORT_SYMBOL(pci_enable_msix);
924EXPORT_SYMBOL(pci_disable_msix);
204face4
JM
925
926#endif
927
c6622f63 928#ifdef CONFIG_PPC64
1da177e4
LT
929static int __init setup_noirqdistrib(char *str)
930{
931 distribute_irqs = 0;
932 return 1;
933}
934
935__setup("noirqdistrib", setup_noirqdistrib);
756e7104 936#endif /* CONFIG_PPC64 */