[net-next-2.6.git] / arch / powerpc / kernel / irq.c

/*
 *  Derived from arch/i386/kernel/irq.c
 *    Copyright (C) 1992 Linus Torvalds
 *  Adapted from arch/i386 by Gary Thomas
 *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
 *  Updated and modified by Cort Dougan <cort@fsmlabs.com>
 *    Copyright (C) 1996-2001 Cort Dougan
 *  Adapted for Power Macintosh by Paul Mackerras
 *    Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
 *  Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 *
 * This file contains the code used by various IRQ handling routines:
 * asking for different IRQ's should be done through these routines
 * instead of just grabbing them. Thus setups with different IRQ numbers
 * shouldn't result in any weird surprises, and installing new handlers
 * should be easier.
 *
 * The MPC8xx has an interrupt mask in the SIU.  If a bit is set, the
 * interrupt is _enabled_.  As expected, IRQ0 is bit 0 in the 32-bit
 * mask register (of which only 16 are defined), hence the weird shifting
 * and complement of the cached_irq_mask.  I want to be able to stuff
 * this right into the SIU SMASK register.
 * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx
 * to reduce code space and undefined function references.
 */

#include <linux/module.h>
#include <linux/threads.h>
#include <linux/kernel_stat.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/ptrace.h>
#include <linux/ioport.h>
#include <linux/interrupt.h>
#include <linux/timex.h>
#include <linux/config.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/irq.h>
#include <linux/seq_file.h>
#include <linux/cpumask.h>
#include <linux/profile.h>
#include <linux/bitops.h>

#include <asm/uaccess.h>
#include <asm/system.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/irq.h>
#include <asm/cache.h>
#include <asm/prom.h>
#include <asm/ptrace.h>
#include <asm/machdep.h>
#ifdef CONFIG_PPC_ISERIES
#include <asm/paca.h>
#endif

int __irq_offset_value;
#ifdef CONFIG_PPC32
EXPORT_SYMBOL(__irq_offset_value);
#endif

static int ppc_spurious_interrupts;

#ifdef CONFIG_PPC32
#define NR_MASK_WORDS	((NR_IRQS + 31) / 32)

unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
atomic_t ppc_n_lost_interrupts;

#ifdef CONFIG_TAU_INT
extern int tau_initialized;
extern int tau_interrupts(int);
#endif

#if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE)
extern atomic_t ipi_recv;
extern atomic_t ipi_sent;
#endif
#endif /* CONFIG_PPC32 */

#ifdef CONFIG_PPC64
EXPORT_SYMBOL(irq_desc);

int distribute_irqs = 1;
u64 ppc64_interrupt_controller;
#endif /* CONFIG_PPC64 */

int show_interrupts(struct seq_file *p, void *v)
{
	int i = *(loff_t *)v, j;
	struct irqaction *action;
	irq_desc_t *desc;
	unsigned long flags;

	if (i == 0) {
		seq_puts(p, "           ");
		for_each_online_cpu(j)
			seq_printf(p, "CPU%d       ", j);
		seq_putc(p, '\n');
	}

	if (i < NR_IRQS) {
		desc = get_irq_desc(i);
		spin_lock_irqsave(&desc->lock, flags);
		action = desc->action;
		if (!action || !action->handler)
			goto skip;
		seq_printf(p, "%3d: ", i);
#ifdef CONFIG_SMP
		for_each_online_cpu(j)
			seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
#else
		seq_printf(p, "%10u ", kstat_irqs(i));
#endif /* CONFIG_SMP */
		if (desc->handler)
			seq_printf(p, " %s ", desc->handler->typename);
		else
			seq_puts(p, "  None      ");
		seq_printf(p, "%s", (desc->status & IRQ_LEVEL) ? "Level " : "Edge  ");
		seq_printf(p, "    %s", action->name);
		for (action = action->next; action; action = action->next)
			seq_printf(p, ", %s", action->name);
		seq_putc(p, '\n');
skip:
		spin_unlock_irqrestore(&desc->lock, flags);
	} else if (i == NR_IRQS) {
#ifdef CONFIG_PPC32
#ifdef CONFIG_TAU_INT
		if (tau_initialized){
			seq_puts(p, "TAU: ");
			for_each_online_cpu(j)
				seq_printf(p, "%10u ", tau_interrupts(j));
			seq_puts(p, "  PowerPC             Thermal Assist (cpu temp)\n");
		}
#endif
#if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE)
		/* should this be per processor send/receive? */
		seq_printf(p, "IPI (recv/sent): %10u/%u\n",
				atomic_read(&ipi_recv), atomic_read(&ipi_sent));
#endif
#endif /* CONFIG_PPC32 */
		seq_printf(p, "BAD: %10u\n", ppc_spurious_interrupts);
	}
	return 0;
}

#ifdef CONFIG_HOTPLUG_CPU
void fixup_irqs(cpumask_t map)
{
	unsigned int irq;
	static int warned;

	for_each_irq(irq) {
		cpumask_t mask;

		if (irq_desc[irq].status & IRQ_PER_CPU)
			continue;

		cpus_and(mask, irq_affinity[irq], map);
		if (any_online_cpu(mask) == NR_CPUS) {
			printk("Breaking affinity for irq %i\n", irq);
			mask = map;
		}
		if (irq_desc[irq].handler->set_affinity)
			irq_desc[irq].handler->set_affinity(irq, mask);
		else if (irq_desc[irq].action && !(warned++))
			printk("Cannot set affinity for irq %i\n", irq);
	}

	local_irq_enable();
	mdelay(1);
	local_irq_disable();
}
#endif

void do_IRQ(struct pt_regs *regs)
{
	int irq;
#ifdef CONFIG_IRQSTACKS
	struct thread_info *curtp, *irqtp;
#endif

        irq_enter();

#ifdef CONFIG_DEBUG_STACKOVERFLOW
	/* Debugging check for stack overflow: is there less than 2KB free? */
	{
		long sp;

		sp = __get_SP() & (THREAD_SIZE-1);

		if (unlikely(sp < (sizeof(struct thread_info) + 2048))) {
			printk("do_IRQ: stack overflow: %ld\n",
				sp - sizeof(struct thread_info));
			dump_stack();
		}
	}
#endif

	/*
	 * Every platform is required to implement ppc_md.get_irq.
	 * This function will either return an irq number or -1 to
	 * indicate there are no more pending.
	 * The value -2 is for buggy hardware and means that this IRQ
	 * has already been handled. -- Tom
	 */
	irq = ppc_md.get_irq(regs);

	if (irq >= 0) {
#ifdef CONFIG_IRQSTACKS
		/* Switch to the irq stack to handle this */
		curtp = current_thread_info();
		irqtp = hardirq_ctx[smp_processor_id()];
		if (curtp != irqtp) {
			irqtp->task = curtp->task;
			irqtp->flags = 0;
			call___do_IRQ(irq, regs, irqtp);
			irqtp->task = NULL;
			if (irqtp->flags)
				set_bits(irqtp->flags, &curtp->flags);
		} else
#endif
			__do_IRQ(irq, regs);
	} else if (irq != -2)
		/* That's not SMP safe ... but who cares ? */
		ppc_spurious_interrupts++;

        irq_exit();

#ifdef CONFIG_PPC_ISERIES
	if (get_lppaca()->int_dword.fields.decr_int) {
		get_lppaca()->int_dword.fields.decr_int = 0;
		/* Signal a fake decrementer interrupt */
		timer_interrupt(regs);
	}
#endif
}

void __init init_IRQ(void)
{
#ifdef CONFIG_PPC64
	static int once = 0;

	if (once)
		return;

	once++;

#endif
	ppc_md.init_IRQ();
#ifdef CONFIG_PPC64
	irq_ctx_init();
#endif
}

#ifdef CONFIG_PPC64
/*
 * Virtual IRQ mapping code, used on systems with XICS interrupt controllers.
 */

#define UNDEFINED_IRQ 0xffffffff
unsigned int virt_irq_to_real_map[NR_IRQS];

/*
 * Don't use virtual irqs 0, 1, 2 for devices.
 * The pcnet32 driver considers interrupt numbers < 2 to be invalid,
 * and 2 is the XICS IPI interrupt.
 * We limit virtual irqs to 17 less than NR_IRQS so that when we
 * offset them by 16 (to reserve the first 16 for ISA interrupts)
 * we don't end up with an interrupt number >= NR_IRQS.
 */
#define MIN_VIRT_IRQ	3
#define MAX_VIRT_IRQ	(NR_IRQS - NUM_ISA_INTERRUPTS - 1)
#define NR_VIRT_IRQS	(MAX_VIRT_IRQ - MIN_VIRT_IRQ + 1)

void
virt_irq_init(void)
{
	int i;
	for (i = 0; i < NR_IRQS; i++)
		virt_irq_to_real_map[i] = UNDEFINED_IRQ;
}

/* Create a mapping for a real_irq if it doesn't already exist.
 * Return the virtual irq as a convenience.
 */
int virt_irq_create_mapping(unsigned int real_irq)
{
	unsigned int virq, first_virq;
	static int warned;

	if (ppc64_interrupt_controller == IC_OPEN_PIC)
		return real_irq;	/* no mapping for openpic (for now) */

	if (ppc64_interrupt_controller == IC_CELL_PIC)
		return real_irq;	/* no mapping for iic either */

	/* don't map interrupts < MIN_VIRT_IRQ */
	if (real_irq < MIN_VIRT_IRQ) {
		virt_irq_to_real_map[real_irq] = real_irq;
		return real_irq;
	}

	/* map to a number between MIN_VIRT_IRQ and MAX_VIRT_IRQ */
	virq = real_irq;
	if (virq > MAX_VIRT_IRQ)
		virq = (virq % NR_VIRT_IRQS) + MIN_VIRT_IRQ;

	/* search for this number or a free slot */
	first_virq = virq;
	while (virt_irq_to_real_map[virq] != UNDEFINED_IRQ) {
		if (virt_irq_to_real_map[virq] == real_irq)
			return virq;
		if (++virq > MAX_VIRT_IRQ)
			virq = MIN_VIRT_IRQ;
		if (virq == first_virq)
			goto nospace;	/* oops, no free slots */
	}

	virt_irq_to_real_map[virq] = real_irq;
	return virq;

 nospace:
	if (!warned) {
		printk(KERN_CRIT "Interrupt table is full\n");
		printk(KERN_CRIT "Increase NR_IRQS (currently %d) "
		       "in your kernel sources and rebuild.\n", NR_IRQS);
		warned = 1;
	}
	return NO_IRQ;
}

/*
 * In most cases will get a hit on the very first slot checked in the
 * virt_irq_to_real_map.  Only when there are a large number of
 * IRQs will this be expensive.
 */
unsigned int real_irq_to_virt_slowpath(unsigned int real_irq)
{
	unsigned int virq;
	unsigned int first_virq;

	virq = real_irq;

	if (virq > MAX_VIRT_IRQ)
		virq = (virq % NR_VIRT_IRQS) + MIN_VIRT_IRQ;

	first_virq = virq;

	do {
		if (virt_irq_to_real_map[virq] == real_irq)
			return virq;

		virq++;

		if (virq >= MAX_VIRT_IRQ)
			virq = 0;

	} while (first_virq != virq);

	return NO_IRQ;

}
#endif /* CONFIG_PPC64 */

#ifdef CONFIG_IRQSTACKS
struct thread_info *softirq_ctx[NR_CPUS];
struct thread_info *hardirq_ctx[NR_CPUS];

void irq_ctx_init(void)
{
	struct thread_info *tp;
	int i;

	for_each_cpu(i) {
		memset((void *)softirq_ctx[i], 0, THREAD_SIZE);
		tp = softirq_ctx[i];
		tp->cpu = i;
		tp->preempt_count = SOFTIRQ_OFFSET;

		memset((void *)hardirq_ctx[i], 0, THREAD_SIZE);
		tp = hardirq_ctx[i];
		tp->cpu = i;
		tp->preempt_count = HARDIRQ_OFFSET;
	}
}

static inline void do_softirq_onstack(void)
{
	struct thread_info *curtp, *irqtp;

	curtp = current_thread_info();
	irqtp = softirq_ctx[smp_processor_id()];
	irqtp->task = curtp->task;
	call_do_softirq(irqtp);
	irqtp->task = NULL;
}

#else
#define do_softirq_onstack()	__do_softirq()
#endif /* CONFIG_IRQSTACKS */

void do_softirq(void)
{
	unsigned long flags;

	if (in_interrupt())
		return;

	local_irq_save(flags);

	if (local_softirq_pending()) {
		account_system_vtime(current);
		local_bh_disable();
		do_softirq_onstack();
		account_system_vtime(current);
		__local_bh_enable();
	}

	local_irq_restore(flags);
}
EXPORT_SYMBOL(do_softirq);

#ifdef CONFIG_PPC64
static int __init setup_noirqdistrib(char *str)
{
	distribute_irqs = 0;
	return 1;
}

__setup("noirqdistrib", setup_noirqdistrib);
#endif /* CONFIG_PPC64 */
Commit	Line	Data
1da177e4	1	/*
1da177e4 LT	2	* Derived from arch/i386/kernel/irq.c
	3	* Copyright (C) 1992 Linus Torvalds
	4	* Adapted from arch/i386 by Gary Thomas
	5	* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
756e7104 SR	6	* Updated and modified by Cort Dougan <cort@fsmlabs.com>
756e7104 SR	7	* Copyright (C) 1996-2001 Cort Dougan
1da177e4 LT	8	* Adapted for Power Macintosh by Paul Mackerras
	9	* Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
	10	* Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
756e7104	11	*
1da177e4 LT	12	* This program is free software; you can redistribute it and/or
	13	* modify it under the terms of the GNU General Public License
	14	* as published by the Free Software Foundation; either version
	15	* 2 of the License, or (at your option) any later version.
	16	*
	17	* This file contains the code used by various IRQ handling routines:
	18	* asking for different IRQ's should be done through these routines
	19	* instead of just grabbing them. Thus setups with different IRQ numbers
	20	* shouldn't result in any weird surprises, and installing new handlers
	21	* should be easier.
756e7104 SR	22	*
	23	* The MPC8xx has an interrupt mask in the SIU. If a bit is set, the
	24	* interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit
	25	* mask register (of which only 16 are defined), hence the weird shifting
	26	* and complement of the cached_irq_mask. I want to be able to stuff
	27	* this right into the SIU SMASK register.
	28	* Many of the prep/chrp functions are conditional compiled on CONFIG_8xx
	29	* to reduce code space and undefined function references.
1da177e4 LT	30	*/
1da177e4 LT	31
1da177e4 LT	32	#include <linux/module.h>
	33	#include <linux/threads.h>
	34	#include <linux/kernel_stat.h>
	35	#include <linux/signal.h>
	36	#include <linux/sched.h>
756e7104	37	#include <linux/ptrace.h>
1da177e4 LT	38	#include <linux/ioport.h>
	39	#include <linux/interrupt.h>
	40	#include <linux/timex.h>
	41	#include <linux/config.h>
	42	#include <linux/init.h>
	43	#include <linux/slab.h>
1da177e4 LT	44	#include <linux/delay.h>
1da177e4 LT	45	#include <linux/irq.h>
756e7104 SR	46	#include <linux/seq_file.h>
756e7104 SR	47	#include <linux/cpumask.h>
1da177e4 LT	48	#include <linux/profile.h>
	49	#include <linux/bitops.h>
	50
	51	#include <asm/uaccess.h>
	52	#include <asm/system.h>
	53	#include <asm/io.h>
	54	#include <asm/pgtable.h>
	55	#include <asm/irq.h>
	56	#include <asm/cache.h>
	57	#include <asm/prom.h>
	58	#include <asm/ptrace.h>
1da177e4	59	#include <asm/machdep.h>
a50b56d2	60	#ifdef CONFIG_PPC_ISERIES
1da177e4	61	#include <asm/paca.h>
756e7104	62	#endif
1da177e4	63
868accb7 SR	64	int __irq_offset_value;
	65	#ifdef CONFIG_PPC32
	66	EXPORT_SYMBOL(__irq_offset_value);
	67	#endif
	68
756e7104 SR	69	static int ppc_spurious_interrupts;
756e7104 SR	70
756e7104 SR	71	#ifdef CONFIG_PPC32
	72	#define NR_MASK_WORDS ((NR_IRQS + 31) / 32)
	73
	74	unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
	75	atomic_t ppc_n_lost_interrupts;
	76
	77	#ifdef CONFIG_TAU_INT
	78	extern int tau_initialized;
	79	extern int tau_interrupts(int);
	80	#endif
	81
	82	#if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE)
	83	extern atomic_t ipi_recv;
	84	extern atomic_t ipi_sent;
	85	#endif
	86	#endif /* CONFIG_PPC32 */
	87
	88	#ifdef CONFIG_PPC64
1da177e4 LT	89	EXPORT_SYMBOL(irq_desc);
	90
	91	int distribute_irqs = 1;
1da177e4	92	u64 ppc64_interrupt_controller;
756e7104	93	#endif /* CONFIG_PPC64 */
1da177e4 LT	94
	95	int show_interrupts(struct seq_file p, void v)
	96	{
756e7104 SR	97	int i = (loff_t )v, j;
756e7104 SR	98	struct irqaction *action;
1da177e4 LT	99	irq_desc_t *desc;
	100	unsigned long flags;
	101
	102	if (i == 0) {
756e7104 SR	103	seq_puts(p, " ");
	104	for_each_online_cpu(j)
	105	seq_printf(p, "CPU%d ", j);
1da177e4 LT	106	seq_putc(p, '\n');
	107	}
	108
	109	if (i < NR_IRQS) {
	110	desc = get_irq_desc(i);
	111	spin_lock_irqsave(&desc->lock, flags);
	112	action = desc->action;
	113	if (!action \|\| !action->handler)
	114	goto skip;
	115	seq_printf(p, "%3d: ", i);
	116	#ifdef CONFIG_SMP
756e7104 SR	117	for_each_online_cpu(j)
756e7104 SR	118	seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
1da177e4 LT	119	#else
	120	seq_printf(p, "%10u ", kstat_irqs(i));
	121	#endif /* CONFIG_SMP */
	122	if (desc->handler)
756e7104	123	seq_printf(p, " %s ", desc->handler->typename);
1da177e4	124	else
756e7104	125	seq_puts(p, " None ");
1da177e4	126	seq_printf(p, "%s", (desc->status & IRQ_LEVEL) ? "Level " : "Edge ");
756e7104 SR	127	seq_printf(p, " %s", action->name);
756e7104 SR	128	for (action = action->next; action; action = action->next)
1da177e4 LT	129	seq_printf(p, ", %s", action->name);
	130	seq_putc(p, '\n');
	131	skip:
	132	spin_unlock_irqrestore(&desc->lock, flags);
756e7104 SR	133	} else if (i == NR_IRQS) {
	134	#ifdef CONFIG_PPC32
	135	#ifdef CONFIG_TAU_INT
	136	if (tau_initialized){
	137	seq_puts(p, "TAU: ");
394e3902 AM	138	for_each_online_cpu(j)
394e3902 AM	139	seq_printf(p, "%10u ", tau_interrupts(j));
756e7104 SR	140	seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n");
	141	}
	142	#endif
	143	#if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE)
	144	/* should this be per processor send/receive? */
	145	seq_printf(p, "IPI (recv/sent): %10u/%u\n",
	146	atomic_read(&ipi_recv), atomic_read(&ipi_sent));
	147	#endif
	148	#endif /* CONFIG_PPC32 */
1da177e4	149	seq_printf(p, "BAD: %10u\n", ppc_spurious_interrupts);
756e7104	150	}
1da177e4 LT	151	return 0;
	152	}
	153
	154	#ifdef CONFIG_HOTPLUG_CPU
	155	void fixup_irqs(cpumask_t map)
	156	{
	157	unsigned int irq;
	158	static int warned;
	159
	160	for_each_irq(irq) {
	161	cpumask_t mask;
	162
	163	if (irq_desc[irq].status & IRQ_PER_CPU)
	164	continue;
	165
	166	cpus_and(mask, irq_affinity[irq], map);
	167	if (any_online_cpu(mask) == NR_CPUS) {
	168	printk("Breaking affinity for irq %i\n", irq);
	169	mask = map;
	170	}
	171	if (irq_desc[irq].handler->set_affinity)
	172	irq_desc[irq].handler->set_affinity(irq, mask);
	173	else if (irq_desc[irq].action && !(warned++))
	174	printk("Cannot set affinity for irq %i\n", irq);
	175	}
	176
	177	local_irq_enable();
	178	mdelay(1);
	179	local_irq_disable();
	180	}
	181	#endif
	182
1da177e4 LT	183	void do_IRQ(struct pt_regs *regs)
	184	{
	185	int irq;
b709c083 SR	186	#ifdef CONFIG_IRQSTACKS
	187	struct thread_info curtp, irqtp;
	188	#endif
1da177e4	189
756e7104	190	irq_enter();
1da177e4 LT	191
	192	#ifdef CONFIG_DEBUG_STACKOVERFLOW
	193	/* Debugging check for stack overflow: is there less than 2KB free? */
	194	{
	195	long sp;
	196
	197	sp = __get_SP() & (THREAD_SIZE-1);
	198
	199	if (unlikely(sp < (sizeof(struct thread_info) + 2048))) {
	200	printk("do_IRQ: stack overflow: %ld\n",
	201	sp - sizeof(struct thread_info));
	202	dump_stack();
	203	}
	204	}
	205	#endif
	206
756e7104 SR	207	/*
	208	* Every platform is required to implement ppc_md.get_irq.
	209	* This function will either return an irq number or -1 to
	210	* indicate there are no more pending.
	211	* The value -2 is for buggy hardware and means that this IRQ
	212	* has already been handled. -- Tom
	213	*/
1da177e4 LT	214	irq = ppc_md.get_irq(regs);
1da177e4 LT	215
b709c083 SR	216	if (irq >= 0) {
	217	#ifdef CONFIG_IRQSTACKS
	218	/* Switch to the irq stack to handle this */
	219	curtp = current_thread_info();
	220	irqtp = hardirq_ctx[smp_processor_id()];
	221	if (curtp != irqtp) {
	222	irqtp->task = curtp->task;
	223	irqtp->flags = 0;
d4be4f37	224	call___do_IRQ(irq, regs, irqtp);
b709c083 SR	225	irqtp->task = NULL;
	226	if (irqtp->flags)
	227	set_bits(irqtp->flags, &curtp->flags);
	228	} else
	229	#endif
d4be4f37	230	__do_IRQ(irq, regs);
e199500c SR	231	} else if (irq != -2)
	232	/* That's not SMP safe ... but who cares ? */
	233	ppc_spurious_interrupts++;
	234
756e7104	235	irq_exit();
756e7104	236
e199500c	237	#ifdef CONFIG_PPC_ISERIES
3356bb9f DG	238	if (get_lppaca()->int_dword.fields.decr_int) {
	239	get_lppaca()->int_dword.fields.decr_int = 0;
	240	/* Signal a fake decrementer interrupt */
	241	timer_interrupt(regs);
e199500c SR	242	}
	243	#endif
	244	}
1da177e4 LT	245
	246	void __init init_IRQ(void)
	247	{
756e7104	248	#ifdef CONFIG_PPC64
1da177e4 LT	249	static int once = 0;
	250
	251	if (once)
	252	return;
	253
	254	once++;
	255
756e7104	256	#endif
1da177e4	257	ppc_md.init_IRQ();
756e7104	258	#ifdef CONFIG_PPC64
1da177e4	259	irq_ctx_init();
756e7104	260	#endif
1da177e4 LT	261	}
1da177e4 LT	262
756e7104	263	#ifdef CONFIG_PPC64
1da177e4 LT	264	/*
	265	* Virtual IRQ mapping code, used on systems with XICS interrupt controllers.
	266	*/
	267
	268	#define UNDEFINED_IRQ 0xffffffff
	269	unsigned int virt_irq_to_real_map[NR_IRQS];
	270
	271	/*
	272	* Don't use virtual irqs 0, 1, 2 for devices.
	273	* The pcnet32 driver considers interrupt numbers < 2 to be invalid,
	274	* and 2 is the XICS IPI interrupt.
	275	* We limit virtual irqs to 17 less than NR_IRQS so that when we
	276	* offset them by 16 (to reserve the first 16 for ISA interrupts)
	277	* we don't end up with an interrupt number >= NR_IRQS.
	278	*/
	279	#define MIN_VIRT_IRQ 3
	280	#define MAX_VIRT_IRQ (NR_IRQS - NUM_ISA_INTERRUPTS - 1)
	281	#define NR_VIRT_IRQS (MAX_VIRT_IRQ - MIN_VIRT_IRQ + 1)
	282
	283	void
	284	virt_irq_init(void)
	285	{
	286	int i;
	287	for (i = 0; i < NR_IRQS; i++)
	288	virt_irq_to_real_map[i] = UNDEFINED_IRQ;
	289	}
	290
	291	/* Create a mapping for a real_irq if it doesn't already exist.
	292	* Return the virtual irq as a convenience.
	293	*/
	294	int virt_irq_create_mapping(unsigned int real_irq)
	295	{
	296	unsigned int virq, first_virq;
	297	static int warned;
	298
	299	if (ppc64_interrupt_controller == IC_OPEN_PIC)
	300	return real_irq; /* no mapping for openpic (for now) */
	301
f3f66f59	302	if (ppc64_interrupt_controller == IC_CELL_PIC)
fef1c772 AB	303	return real_irq; /* no mapping for iic either */
fef1c772 AB	304
1da177e4 LT	305	/* don't map interrupts < MIN_VIRT_IRQ */
	306	if (real_irq < MIN_VIRT_IRQ) {
	307	virt_irq_to_real_map[real_irq] = real_irq;
	308	return real_irq;
	309	}
	310
	311	/* map to a number between MIN_VIRT_IRQ and MAX_VIRT_IRQ */
	312	virq = real_irq;
	313	if (virq > MAX_VIRT_IRQ)
	314	virq = (virq % NR_VIRT_IRQS) + MIN_VIRT_IRQ;
	315
	316	/* search for this number or a free slot */
	317	first_virq = virq;
	318	while (virt_irq_to_real_map[virq] != UNDEFINED_IRQ) {
	319	if (virt_irq_to_real_map[virq] == real_irq)
	320	return virq;
	321	if (++virq > MAX_VIRT_IRQ)
	322	virq = MIN_VIRT_IRQ;
	323	if (virq == first_virq)
	324	goto nospace; /* oops, no free slots */
	325	}
	326
	327	virt_irq_to_real_map[virq] = real_irq;
	328	return virq;
	329
	330	nospace:
	331	if (!warned) {
	332	printk(KERN_CRIT "Interrupt table is full\n");
	333	printk(KERN_CRIT "Increase NR_IRQS (currently %d) "
	334	"in your kernel sources and rebuild.\n", NR_IRQS);
	335	warned = 1;
	336	}
	337	return NO_IRQ;
	338	}
	339
	340	/*
	341	* In most cases will get a hit on the very first slot checked in the
	342	* virt_irq_to_real_map. Only when there are a large number of
	343	* IRQs will this be expensive.
	344	*/
	345	unsigned int real_irq_to_virt_slowpath(unsigned int real_irq)
	346	{
	347	unsigned int virq;
	348	unsigned int first_virq;
	349
	350	virq = real_irq;
	351
	352	if (virq > MAX_VIRT_IRQ)
	353	virq = (virq % NR_VIRT_IRQS) + MIN_VIRT_IRQ;
	354
	355	first_virq = virq;
	356
	357	do {
	358	if (virt_irq_to_real_map[virq] == real_irq)
	359	return virq;
	360
	361	virq++;
	362
	363	if (virq >= MAX_VIRT_IRQ)
	364	virq = 0;
	365
	366	} while (first_virq != virq);
	367
	368	return NO_IRQ;
369
370	}
c6622f63	371	#endif /* CONFIG_PPC64 */
1da177e4	372
1da177e4 LT	373	#ifdef CONFIG_IRQSTACKS
	374	struct thread_info *softirq_ctx[NR_CPUS];
	375	struct thread_info *hardirq_ctx[NR_CPUS];
	376
	377	void irq_ctx_init(void)
	378	{
	379	struct thread_info *tp;
	380	int i;
	381
	382	for_each_cpu(i) {
	383	memset((void *)softirq_ctx[i], 0, THREAD_SIZE);
	384	tp = softirq_ctx[i];
	385	tp->cpu = i;
	386	tp->preempt_count = SOFTIRQ_OFFSET;
	387
	388	memset((void *)hardirq_ctx[i], 0, THREAD_SIZE);
	389	tp = hardirq_ctx[i];
	390	tp->cpu = i;
	391	tp->preempt_count = HARDIRQ_OFFSET;
	392	}
	393	}
	394
c6622f63 PM	395	static inline void do_softirq_onstack(void)
	396	{
	397	struct thread_info curtp, irqtp;
	398
	399	curtp = current_thread_info();
	400	irqtp = softirq_ctx[smp_processor_id()];
	401	irqtp->task = curtp->task;
	402	call_do_softirq(irqtp);
	403	irqtp->task = NULL;
	404	}
	405
	406	#else
	407	#define do_softirq_onstack() __do_softirq()
	408	#endif /* CONFIG_IRQSTACKS */
	409
1da177e4 LT	410	void do_softirq(void)
	411	{
	412	unsigned long flags;
1da177e4 LT	413
	414	if (in_interrupt())
	415	return;
	416
	417	local_irq_save(flags);
	418
	419	if (local_softirq_pending()) {
c6622f63 PM	420	account_system_vtime(current);
	421	local_bh_disable();
	422	do_softirq_onstack();
	423	account_system_vtime(current);
	424	__local_bh_enable();
1da177e4 LT	425	}
	426
	427	local_irq_restore(flags);
	428	}
	429	EXPORT_SYMBOL(do_softirq);
	430
c6622f63	431	#ifdef CONFIG_PPC64
1da177e4 LT	432	static int __init setup_noirqdistrib(char *str)
	433	{
	434	distribute_irqs = 0;
	435	return 1;
	436	}
	437
	438	__setup("noirqdistrib", setup_noirqdistrib);
756e7104	439	#endif /* CONFIG_PPC64 */