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Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Derived from arch/i386/kernel/irq.c |
3 | * Copyright (C) 1992 Linus Torvalds | |
4 | * Adapted from arch/i386 by Gary Thomas | |
5 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
756e7104 SR |
6 | * Updated and modified by Cort Dougan <cort@fsmlabs.com> |
7 | * Copyright (C) 1996-2001 Cort Dougan | |
1da177e4 LT |
8 | * Adapted for Power Macintosh by Paul Mackerras |
9 | * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au) | |
756e7104 | 10 | * |
1da177e4 LT |
11 | * This program is free software; you can redistribute it and/or |
12 | * modify it under the terms of the GNU General Public License | |
13 | * as published by the Free Software Foundation; either version | |
14 | * 2 of the License, or (at your option) any later version. | |
15 | * | |
16 | * This file contains the code used by various IRQ handling routines: | |
17 | * asking for different IRQ's should be done through these routines | |
18 | * instead of just grabbing them. Thus setups with different IRQ numbers | |
19 | * shouldn't result in any weird surprises, and installing new handlers | |
20 | * should be easier. | |
756e7104 SR |
21 | * |
22 | * The MPC8xx has an interrupt mask in the SIU. If a bit is set, the | |
23 | * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit | |
24 | * mask register (of which only 16 are defined), hence the weird shifting | |
25 | * and complement of the cached_irq_mask. I want to be able to stuff | |
26 | * this right into the SIU SMASK register. | |
27 | * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx | |
28 | * to reduce code space and undefined function references. | |
1da177e4 LT |
29 | */ |
30 | ||
0ebfff14 BH |
31 | #undef DEBUG |
32 | ||
1da177e4 LT |
33 | #include <linux/module.h> |
34 | #include <linux/threads.h> | |
35 | #include <linux/kernel_stat.h> | |
36 | #include <linux/signal.h> | |
37 | #include <linux/sched.h> | |
756e7104 | 38 | #include <linux/ptrace.h> |
1da177e4 LT |
39 | #include <linux/ioport.h> |
40 | #include <linux/interrupt.h> | |
41 | #include <linux/timex.h> | |
1da177e4 LT |
42 | #include <linux/init.h> |
43 | #include <linux/slab.h> | |
1da177e4 LT |
44 | #include <linux/delay.h> |
45 | #include <linux/irq.h> | |
756e7104 SR |
46 | #include <linux/seq_file.h> |
47 | #include <linux/cpumask.h> | |
1da177e4 LT |
48 | #include <linux/profile.h> |
49 | #include <linux/bitops.h> | |
0ebfff14 BH |
50 | #include <linux/list.h> |
51 | #include <linux/radix-tree.h> | |
52 | #include <linux/mutex.h> | |
53 | #include <linux/bootmem.h> | |
45934c47 | 54 | #include <linux/pci.h> |
60b332e7 | 55 | #include <linux/debugfs.h> |
cdd6c482 | 56 | #include <linux/perf_event.h> |
1da177e4 LT |
57 | |
58 | #include <asm/uaccess.h> | |
59 | #include <asm/system.h> | |
60 | #include <asm/io.h> | |
61 | #include <asm/pgtable.h> | |
62 | #include <asm/irq.h> | |
63 | #include <asm/cache.h> | |
64 | #include <asm/prom.h> | |
65 | #include <asm/ptrace.h> | |
1da177e4 | 66 | #include <asm/machdep.h> |
0ebfff14 | 67 | #include <asm/udbg.h> |
d04c56f7 | 68 | #ifdef CONFIG_PPC64 |
1da177e4 | 69 | #include <asm/paca.h> |
d04c56f7 | 70 | #include <asm/firmware.h> |
0874dd40 | 71 | #include <asm/lv1call.h> |
756e7104 | 72 | #endif |
1bf4af16 AB |
73 | #define CREATE_TRACE_POINTS |
74 | #include <asm/trace.h> | |
1da177e4 | 75 | |
868accb7 | 76 | int __irq_offset_value; |
756e7104 SR |
77 | static int ppc_spurious_interrupts; |
78 | ||
756e7104 | 79 | #ifdef CONFIG_PPC32 |
b9e5b4e6 BH |
80 | EXPORT_SYMBOL(__irq_offset_value); |
81 | atomic_t ppc_n_lost_interrupts; | |
756e7104 | 82 | |
756e7104 SR |
83 | #ifdef CONFIG_TAU_INT |
84 | extern int tau_initialized; | |
85 | extern int tau_interrupts(int); | |
86 | #endif | |
b9e5b4e6 | 87 | #endif /* CONFIG_PPC32 */ |
756e7104 | 88 | |
756e7104 | 89 | #ifdef CONFIG_PPC64 |
cd015707 ME |
90 | |
91 | #ifndef CONFIG_SPARSE_IRQ | |
1da177e4 | 92 | EXPORT_SYMBOL(irq_desc); |
cd015707 | 93 | #endif |
1da177e4 LT |
94 | |
95 | int distribute_irqs = 1; | |
d04c56f7 | 96 | |
4e491d14 | 97 | static inline notrace unsigned long get_hard_enabled(void) |
ef2b343e HD |
98 | { |
99 | unsigned long enabled; | |
100 | ||
101 | __asm__ __volatile__("lbz %0,%1(13)" | |
102 | : "=r" (enabled) : "i" (offsetof(struct paca_struct, hard_enabled))); | |
103 | ||
104 | return enabled; | |
105 | } | |
106 | ||
4e491d14 | 107 | static inline notrace void set_soft_enabled(unsigned long enable) |
ef2b343e HD |
108 | { |
109 | __asm__ __volatile__("stb %0,%1(13)" | |
110 | : : "r" (enable), "i" (offsetof(struct paca_struct, soft_enabled))); | |
111 | } | |
112 | ||
4e491d14 | 113 | notrace void raw_local_irq_restore(unsigned long en) |
d04c56f7 | 114 | { |
ef2b343e HD |
115 | /* |
116 | * get_paca()->soft_enabled = en; | |
117 | * Is it ever valid to use local_irq_restore(0) when soft_enabled is 1? | |
118 | * That was allowed before, and in such a case we do need to take care | |
119 | * that gcc will set soft_enabled directly via r13, not choose to use | |
120 | * an intermediate register, lest we're preempted to a different cpu. | |
121 | */ | |
122 | set_soft_enabled(en); | |
d04c56f7 PM |
123 | if (!en) |
124 | return; | |
125 | ||
94491685 | 126 | #ifdef CONFIG_PPC_STD_MMU_64 |
d04c56f7 | 127 | if (firmware_has_feature(FW_FEATURE_ISERIES)) { |
ef2b343e HD |
128 | /* |
129 | * Do we need to disable preemption here? Not really: in the | |
130 | * unlikely event that we're preempted to a different cpu in | |
131 | * between getting r13, loading its lppaca_ptr, and loading | |
132 | * its any_int, we might call iseries_handle_interrupts without | |
133 | * an interrupt pending on the new cpu, but that's no disaster, | |
134 | * is it? And the business of preempting us off the old cpu | |
135 | * would itself involve a local_irq_restore which handles the | |
136 | * interrupt to that cpu. | |
137 | * | |
138 | * But use "local_paca->lppaca_ptr" instead of "get_lppaca()" | |
139 | * to avoid any preemption checking added into get_paca(). | |
140 | */ | |
141 | if (local_paca->lppaca_ptr->int_dword.any_int) | |
d04c56f7 | 142 | iseries_handle_interrupts(); |
d04c56f7 | 143 | } |
94491685 | 144 | #endif /* CONFIG_PPC_STD_MMU_64 */ |
d04c56f7 | 145 | |
cdd6c482 IM |
146 | if (test_perf_event_pending()) { |
147 | clear_perf_event_pending(); | |
148 | perf_event_do_pending(); | |
b6c5a71d | 149 | } |
93a6d3ce | 150 | |
ef2b343e HD |
151 | /* |
152 | * if (get_paca()->hard_enabled) return; | |
153 | * But again we need to take care that gcc gets hard_enabled directly | |
154 | * via r13, not choose to use an intermediate register, lest we're | |
155 | * preempted to a different cpu in between the two instructions. | |
156 | */ | |
157 | if (get_hard_enabled()) | |
d04c56f7 | 158 | return; |
ef2b343e HD |
159 | |
160 | /* | |
161 | * Need to hard-enable interrupts here. Since currently disabled, | |
162 | * no need to take further asm precautions against preemption; but | |
163 | * use local_paca instead of get_paca() to avoid preemption checking. | |
164 | */ | |
165 | local_paca->hard_enabled = en; | |
d04c56f7 PM |
166 | if ((int)mfspr(SPRN_DEC) < 0) |
167 | mtspr(SPRN_DEC, 1); | |
0874dd40 TS |
168 | |
169 | /* | |
170 | * Force the delivery of pending soft-disabled interrupts on PS3. | |
171 | * Any HV call will have this side effect. | |
172 | */ | |
173 | if (firmware_has_feature(FW_FEATURE_PS3_LV1)) { | |
174 | u64 tmp; | |
175 | lv1_get_version_info(&tmp); | |
176 | } | |
177 | ||
e1fa2e13 | 178 | __hard_irq_enable(); |
d04c56f7 | 179 | } |
945feb17 | 180 | EXPORT_SYMBOL(raw_local_irq_restore); |
756e7104 | 181 | #endif /* CONFIG_PPC64 */ |
1da177e4 LT |
182 | |
183 | int show_interrupts(struct seq_file *p, void *v) | |
184 | { | |
756e7104 SR |
185 | int i = *(loff_t *)v, j; |
186 | struct irqaction *action; | |
97f7d6bc | 187 | struct irq_desc *desc; |
1da177e4 LT |
188 | unsigned long flags; |
189 | ||
190 | if (i == 0) { | |
756e7104 SR |
191 | seq_puts(p, " "); |
192 | for_each_online_cpu(j) | |
193 | seq_printf(p, "CPU%d ", j); | |
1da177e4 | 194 | seq_putc(p, '\n'); |
750ab112 | 195 | } else if (i == nr_irqs) { |
9c4cb825 | 196 | #if defined(CONFIG_PPC32) && defined(CONFIG_TAU_INT) |
756e7104 SR |
197 | if (tau_initialized){ |
198 | seq_puts(p, "TAU: "); | |
394e3902 AM |
199 | for_each_online_cpu(j) |
200 | seq_printf(p, "%10u ", tau_interrupts(j)); | |
756e7104 SR |
201 | seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n"); |
202 | } | |
9c4cb825 | 203 | #endif /* CONFIG_PPC32 && CONFIG_TAU_INT*/ |
1da177e4 | 204 | seq_printf(p, "BAD: %10u\n", ppc_spurious_interrupts); |
750ab112 ME |
205 | |
206 | return 0; | |
756e7104 | 207 | } |
750ab112 ME |
208 | |
209 | desc = irq_to_desc(i); | |
210 | if (!desc) | |
211 | return 0; | |
212 | ||
239007b8 | 213 | raw_spin_lock_irqsave(&desc->lock, flags); |
750ab112 ME |
214 | |
215 | action = desc->action; | |
216 | if (!action || !action->handler) | |
217 | goto skip; | |
218 | ||
219 | seq_printf(p, "%3d: ", i); | |
220 | #ifdef CONFIG_SMP | |
221 | for_each_online_cpu(j) | |
222 | seq_printf(p, "%10u ", kstat_irqs_cpu(i, j)); | |
223 | #else | |
224 | seq_printf(p, "%10u ", kstat_irqs(i)); | |
225 | #endif /* CONFIG_SMP */ | |
226 | ||
227 | if (desc->chip) | |
b27df672 | 228 | seq_printf(p, " %s ", desc->chip->name); |
750ab112 ME |
229 | else |
230 | seq_puts(p, " None "); | |
231 | ||
232 | seq_printf(p, "%s", (desc->status & IRQ_LEVEL) ? "Level " : "Edge "); | |
233 | seq_printf(p, " %s", action->name); | |
234 | ||
235 | for (action = action->next; action; action = action->next) | |
236 | seq_printf(p, ", %s", action->name); | |
237 | seq_putc(p, '\n'); | |
238 | ||
239 | skip: | |
239007b8 | 240 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
750ab112 | 241 | |
1da177e4 LT |
242 | return 0; |
243 | } | |
244 | ||
245 | #ifdef CONFIG_HOTPLUG_CPU | |
246 | void fixup_irqs(cpumask_t map) | |
247 | { | |
6cff46f4 | 248 | struct irq_desc *desc; |
1da177e4 LT |
249 | unsigned int irq; |
250 | static int warned; | |
251 | ||
252 | for_each_irq(irq) { | |
253 | cpumask_t mask; | |
254 | ||
6cff46f4 ME |
255 | desc = irq_to_desc(irq); |
256 | if (desc && desc->status & IRQ_PER_CPU) | |
1da177e4 LT |
257 | continue; |
258 | ||
6cff46f4 | 259 | cpumask_and(&mask, desc->affinity, &map); |
1da177e4 LT |
260 | if (any_online_cpu(mask) == NR_CPUS) { |
261 | printk("Breaking affinity for irq %i\n", irq); | |
262 | mask = map; | |
263 | } | |
6cff46f4 ME |
264 | if (desc->chip->set_affinity) |
265 | desc->chip->set_affinity(irq, &mask); | |
266 | else if (desc->action && !(warned++)) | |
1da177e4 LT |
267 | printk("Cannot set affinity for irq %i\n", irq); |
268 | } | |
269 | ||
270 | local_irq_enable(); | |
271 | mdelay(1); | |
272 | local_irq_disable(); | |
273 | } | |
274 | #endif | |
275 | ||
f2694ba5 ME |
276 | #ifdef CONFIG_IRQSTACKS |
277 | static inline void handle_one_irq(unsigned int irq) | |
278 | { | |
279 | struct thread_info *curtp, *irqtp; | |
280 | unsigned long saved_sp_limit; | |
281 | struct irq_desc *desc; | |
f2694ba5 ME |
282 | |
283 | /* Switch to the irq stack to handle this */ | |
284 | curtp = current_thread_info(); | |
285 | irqtp = hardirq_ctx[smp_processor_id()]; | |
286 | ||
287 | if (curtp == irqtp) { | |
288 | /* We're already on the irq stack, just handle it */ | |
289 | generic_handle_irq(irq); | |
290 | return; | |
291 | } | |
292 | ||
6cff46f4 | 293 | desc = irq_to_desc(irq); |
f2694ba5 ME |
294 | saved_sp_limit = current->thread.ksp_limit; |
295 | ||
f2694ba5 ME |
296 | irqtp->task = curtp->task; |
297 | irqtp->flags = 0; | |
298 | ||
299 | /* Copy the softirq bits in preempt_count so that the | |
300 | * softirq checks work in the hardirq context. */ | |
301 | irqtp->preempt_count = (irqtp->preempt_count & ~SOFTIRQ_MASK) | | |
302 | (curtp->preempt_count & SOFTIRQ_MASK); | |
303 | ||
304 | current->thread.ksp_limit = (unsigned long)irqtp + | |
305 | _ALIGN_UP(sizeof(struct thread_info), 16); | |
306 | ||
835363e6 | 307 | call_handle_irq(irq, desc, irqtp, desc->handle_irq); |
f2694ba5 ME |
308 | current->thread.ksp_limit = saved_sp_limit; |
309 | irqtp->task = NULL; | |
310 | ||
311 | /* Set any flag that may have been set on the | |
312 | * alternate stack | |
313 | */ | |
314 | if (irqtp->flags) | |
315 | set_bits(irqtp->flags, &curtp->flags); | |
316 | } | |
317 | #else | |
318 | static inline void handle_one_irq(unsigned int irq) | |
319 | { | |
320 | generic_handle_irq(irq); | |
321 | } | |
322 | #endif | |
323 | ||
d7cb10d6 ME |
324 | static inline void check_stack_overflow(void) |
325 | { | |
326 | #ifdef CONFIG_DEBUG_STACKOVERFLOW | |
327 | long sp; | |
328 | ||
329 | sp = __get_SP() & (THREAD_SIZE-1); | |
330 | ||
331 | /* check for stack overflow: is there less than 2KB free? */ | |
332 | if (unlikely(sp < (sizeof(struct thread_info) + 2048))) { | |
333 | printk("do_IRQ: stack overflow: %ld\n", | |
334 | sp - sizeof(struct thread_info)); | |
335 | dump_stack(); | |
336 | } | |
337 | #endif | |
338 | } | |
339 | ||
1da177e4 LT |
340 | void do_IRQ(struct pt_regs *regs) |
341 | { | |
7d12e780 | 342 | struct pt_regs *old_regs = set_irq_regs(regs); |
0ebfff14 | 343 | unsigned int irq; |
1da177e4 | 344 | |
1bf4af16 AB |
345 | trace_irq_entry(regs); |
346 | ||
4b218e9b | 347 | irq_enter(); |
1da177e4 | 348 | |
d7cb10d6 | 349 | check_stack_overflow(); |
1da177e4 | 350 | |
35a84c2f | 351 | irq = ppc_md.get_irq(); |
1da177e4 | 352 | |
f2694ba5 ME |
353 | if (irq != NO_IRQ && irq != NO_IRQ_IGNORE) |
354 | handle_one_irq(irq); | |
355 | else if (irq != NO_IRQ_IGNORE) | |
e199500c SR |
356 | /* That's not SMP safe ... but who cares ? */ |
357 | ppc_spurious_interrupts++; | |
358 | ||
4b218e9b | 359 | irq_exit(); |
7d12e780 | 360 | set_irq_regs(old_regs); |
756e7104 | 361 | |
e199500c | 362 | #ifdef CONFIG_PPC_ISERIES |
b06a3183 SR |
363 | if (firmware_has_feature(FW_FEATURE_ISERIES) && |
364 | get_lppaca()->int_dword.fields.decr_int) { | |
3356bb9f DG |
365 | get_lppaca()->int_dword.fields.decr_int = 0; |
366 | /* Signal a fake decrementer interrupt */ | |
367 | timer_interrupt(regs); | |
e199500c SR |
368 | } |
369 | #endif | |
1bf4af16 AB |
370 | |
371 | trace_irq_exit(regs); | |
e199500c | 372 | } |
1da177e4 LT |
373 | |
374 | void __init init_IRQ(void) | |
375 | { | |
70584578 SR |
376 | if (ppc_md.init_IRQ) |
377 | ppc_md.init_IRQ(); | |
bcf0b088 KG |
378 | |
379 | exc_lvl_ctx_init(); | |
380 | ||
1da177e4 LT |
381 | irq_ctx_init(); |
382 | } | |
383 | ||
bcf0b088 KG |
384 | #if defined(CONFIG_BOOKE) || defined(CONFIG_40x) |
385 | struct thread_info *critirq_ctx[NR_CPUS] __read_mostly; | |
386 | struct thread_info *dbgirq_ctx[NR_CPUS] __read_mostly; | |
387 | struct thread_info *mcheckirq_ctx[NR_CPUS] __read_mostly; | |
388 | ||
389 | void exc_lvl_ctx_init(void) | |
390 | { | |
391 | struct thread_info *tp; | |
392 | int i; | |
393 | ||
394 | for_each_possible_cpu(i) { | |
395 | memset((void *)critirq_ctx[i], 0, THREAD_SIZE); | |
396 | tp = critirq_ctx[i]; | |
397 | tp->cpu = i; | |
398 | tp->preempt_count = 0; | |
399 | ||
400 | #ifdef CONFIG_BOOKE | |
401 | memset((void *)dbgirq_ctx[i], 0, THREAD_SIZE); | |
402 | tp = dbgirq_ctx[i]; | |
403 | tp->cpu = i; | |
404 | tp->preempt_count = 0; | |
405 | ||
406 | memset((void *)mcheckirq_ctx[i], 0, THREAD_SIZE); | |
407 | tp = mcheckirq_ctx[i]; | |
408 | tp->cpu = i; | |
409 | tp->preempt_count = HARDIRQ_OFFSET; | |
410 | #endif | |
411 | } | |
412 | } | |
413 | #endif | |
1da177e4 | 414 | |
1da177e4 | 415 | #ifdef CONFIG_IRQSTACKS |
22722051 AM |
416 | struct thread_info *softirq_ctx[NR_CPUS] __read_mostly; |
417 | struct thread_info *hardirq_ctx[NR_CPUS] __read_mostly; | |
1da177e4 LT |
418 | |
419 | void irq_ctx_init(void) | |
420 | { | |
421 | struct thread_info *tp; | |
422 | int i; | |
423 | ||
0e551954 | 424 | for_each_possible_cpu(i) { |
1da177e4 LT |
425 | memset((void *)softirq_ctx[i], 0, THREAD_SIZE); |
426 | tp = softirq_ctx[i]; | |
427 | tp->cpu = i; | |
e6768a4f | 428 | tp->preempt_count = 0; |
1da177e4 LT |
429 | |
430 | memset((void *)hardirq_ctx[i], 0, THREAD_SIZE); | |
431 | tp = hardirq_ctx[i]; | |
432 | tp->cpu = i; | |
433 | tp->preempt_count = HARDIRQ_OFFSET; | |
434 | } | |
435 | } | |
436 | ||
c6622f63 PM |
437 | static inline void do_softirq_onstack(void) |
438 | { | |
439 | struct thread_info *curtp, *irqtp; | |
85218827 | 440 | unsigned long saved_sp_limit = current->thread.ksp_limit; |
c6622f63 PM |
441 | |
442 | curtp = current_thread_info(); | |
443 | irqtp = softirq_ctx[smp_processor_id()]; | |
444 | irqtp->task = curtp->task; | |
85218827 KG |
445 | current->thread.ksp_limit = (unsigned long)irqtp + |
446 | _ALIGN_UP(sizeof(struct thread_info), 16); | |
c6622f63 | 447 | call_do_softirq(irqtp); |
85218827 | 448 | current->thread.ksp_limit = saved_sp_limit; |
c6622f63 PM |
449 | irqtp->task = NULL; |
450 | } | |
1da177e4 | 451 | |
c6622f63 PM |
452 | #else |
453 | #define do_softirq_onstack() __do_softirq() | |
454 | #endif /* CONFIG_IRQSTACKS */ | |
455 | ||
1da177e4 LT |
456 | void do_softirq(void) |
457 | { | |
458 | unsigned long flags; | |
1da177e4 LT |
459 | |
460 | if (in_interrupt()) | |
1da177e4 LT |
461 | return; |
462 | ||
1da177e4 | 463 | local_irq_save(flags); |
1da177e4 | 464 | |
912b2539 | 465 | if (local_softirq_pending()) |
c6622f63 | 466 | do_softirq_onstack(); |
1da177e4 LT |
467 | |
468 | local_irq_restore(flags); | |
1da177e4 | 469 | } |
1da177e4 | 470 | |
1da177e4 | 471 | |
1da177e4 | 472 | /* |
0ebfff14 | 473 | * IRQ controller and virtual interrupts |
1da177e4 LT |
474 | */ |
475 | ||
0ebfff14 | 476 | static LIST_HEAD(irq_hosts); |
057b184a | 477 | static DEFINE_SPINLOCK(irq_big_lock); |
967e012e | 478 | static unsigned int revmap_trees_allocated; |
150c6c8f | 479 | static DEFINE_MUTEX(revmap_trees_mutex); |
0ebfff14 BH |
480 | struct irq_map_entry irq_map[NR_IRQS]; |
481 | static unsigned int irq_virq_count = NR_IRQS; | |
482 | static struct irq_host *irq_default_host; | |
1da177e4 | 483 | |
35923f12 OJ |
484 | irq_hw_number_t virq_to_hw(unsigned int virq) |
485 | { | |
486 | return irq_map[virq].hwirq; | |
487 | } | |
488 | EXPORT_SYMBOL_GPL(virq_to_hw); | |
489 | ||
68158006 ME |
490 | static int default_irq_host_match(struct irq_host *h, struct device_node *np) |
491 | { | |
492 | return h->of_node != NULL && h->of_node == np; | |
493 | } | |
494 | ||
5669c3cf | 495 | struct irq_host *irq_alloc_host(struct device_node *of_node, |
52964f87 ME |
496 | unsigned int revmap_type, |
497 | unsigned int revmap_arg, | |
498 | struct irq_host_ops *ops, | |
499 | irq_hw_number_t inval_irq) | |
1da177e4 | 500 | { |
0ebfff14 BH |
501 | struct irq_host *host; |
502 | unsigned int size = sizeof(struct irq_host); | |
503 | unsigned int i; | |
504 | unsigned int *rmap; | |
505 | unsigned long flags; | |
506 | ||
507 | /* Allocate structure and revmap table if using linear mapping */ | |
508 | if (revmap_type == IRQ_HOST_MAP_LINEAR) | |
509 | size += revmap_arg * sizeof(unsigned int); | |
5669c3cf | 510 | host = zalloc_maybe_bootmem(size, GFP_KERNEL); |
0ebfff14 BH |
511 | if (host == NULL) |
512 | return NULL; | |
7d01c880 | 513 | |
0ebfff14 BH |
514 | /* Fill structure */ |
515 | host->revmap_type = revmap_type; | |
516 | host->inval_irq = inval_irq; | |
517 | host->ops = ops; | |
19fc65b5 | 518 | host->of_node = of_node_get(of_node); |
7d01c880 | 519 | |
68158006 ME |
520 | if (host->ops->match == NULL) |
521 | host->ops->match = default_irq_host_match; | |
7d01c880 | 522 | |
0ebfff14 BH |
523 | spin_lock_irqsave(&irq_big_lock, flags); |
524 | ||
525 | /* If it's a legacy controller, check for duplicates and | |
526 | * mark it as allocated (we use irq 0 host pointer for that | |
527 | */ | |
528 | if (revmap_type == IRQ_HOST_MAP_LEGACY) { | |
529 | if (irq_map[0].host != NULL) { | |
530 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
531 | /* If we are early boot, we can't free the structure, | |
532 | * too bad... | |
533 | * this will be fixed once slab is made available early | |
534 | * instead of the current cruft | |
535 | */ | |
536 | if (mem_init_done) | |
537 | kfree(host); | |
538 | return NULL; | |
539 | } | |
540 | irq_map[0].host = host; | |
541 | } | |
542 | ||
543 | list_add(&host->link, &irq_hosts); | |
544 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
545 | ||
546 | /* Additional setups per revmap type */ | |
547 | switch(revmap_type) { | |
548 | case IRQ_HOST_MAP_LEGACY: | |
549 | /* 0 is always the invalid number for legacy */ | |
550 | host->inval_irq = 0; | |
551 | /* setup us as the host for all legacy interrupts */ | |
552 | for (i = 1; i < NUM_ISA_INTERRUPTS; i++) { | |
7866291d | 553 | irq_map[i].hwirq = i; |
0ebfff14 BH |
554 | smp_wmb(); |
555 | irq_map[i].host = host; | |
556 | smp_wmb(); | |
557 | ||
6e99e458 | 558 | /* Clear norequest flags */ |
6cff46f4 | 559 | irq_to_desc(i)->status &= ~IRQ_NOREQUEST; |
0ebfff14 BH |
560 | |
561 | /* Legacy flags are left to default at this point, | |
562 | * one can then use irq_create_mapping() to | |
c03983ac | 563 | * explicitly change them |
0ebfff14 | 564 | */ |
6e99e458 | 565 | ops->map(host, i, i); |
0ebfff14 BH |
566 | } |
567 | break; | |
568 | case IRQ_HOST_MAP_LINEAR: | |
569 | rmap = (unsigned int *)(host + 1); | |
570 | for (i = 0; i < revmap_arg; i++) | |
f5921697 | 571 | rmap[i] = NO_IRQ; |
0ebfff14 BH |
572 | host->revmap_data.linear.size = revmap_arg; |
573 | smp_wmb(); | |
574 | host->revmap_data.linear.revmap = rmap; | |
575 | break; | |
576 | default: | |
577 | break; | |
578 | } | |
579 | ||
580 | pr_debug("irq: Allocated host of type %d @0x%p\n", revmap_type, host); | |
581 | ||
582 | return host; | |
1da177e4 LT |
583 | } |
584 | ||
0ebfff14 | 585 | struct irq_host *irq_find_host(struct device_node *node) |
1da177e4 | 586 | { |
0ebfff14 BH |
587 | struct irq_host *h, *found = NULL; |
588 | unsigned long flags; | |
589 | ||
590 | /* We might want to match the legacy controller last since | |
591 | * it might potentially be set to match all interrupts in | |
592 | * the absence of a device node. This isn't a problem so far | |
593 | * yet though... | |
594 | */ | |
595 | spin_lock_irqsave(&irq_big_lock, flags); | |
596 | list_for_each_entry(h, &irq_hosts, link) | |
68158006 | 597 | if (h->ops->match(h, node)) { |
0ebfff14 BH |
598 | found = h; |
599 | break; | |
600 | } | |
601 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
602 | return found; | |
603 | } | |
604 | EXPORT_SYMBOL_GPL(irq_find_host); | |
605 | ||
606 | void irq_set_default_host(struct irq_host *host) | |
607 | { | |
608 | pr_debug("irq: Default host set to @0x%p\n", host); | |
1da177e4 | 609 | |
0ebfff14 BH |
610 | irq_default_host = host; |
611 | } | |
1da177e4 | 612 | |
0ebfff14 BH |
613 | void irq_set_virq_count(unsigned int count) |
614 | { | |
615 | pr_debug("irq: Trying to set virq count to %d\n", count); | |
fef1c772 | 616 | |
0ebfff14 BH |
617 | BUG_ON(count < NUM_ISA_INTERRUPTS); |
618 | if (count < NR_IRQS) | |
619 | irq_virq_count = count; | |
620 | } | |
621 | ||
6fde40f3 ME |
622 | static int irq_setup_virq(struct irq_host *host, unsigned int virq, |
623 | irq_hw_number_t hwirq) | |
624 | { | |
cd015707 ME |
625 | struct irq_desc *desc; |
626 | ||
627 | desc = irq_to_desc_alloc_node(virq, 0); | |
628 | if (!desc) { | |
629 | pr_debug("irq: -> allocating desc failed\n"); | |
630 | goto error; | |
631 | } | |
632 | ||
6fde40f3 | 633 | /* Clear IRQ_NOREQUEST flag */ |
cd015707 | 634 | desc->status &= ~IRQ_NOREQUEST; |
6fde40f3 ME |
635 | |
636 | /* map it */ | |
637 | smp_wmb(); | |
638 | irq_map[virq].hwirq = hwirq; | |
639 | smp_mb(); | |
640 | ||
641 | if (host->ops->map(host, virq, hwirq)) { | |
642 | pr_debug("irq: -> mapping failed, freeing\n"); | |
cd015707 | 643 | goto error; |
6fde40f3 ME |
644 | } |
645 | ||
646 | return 0; | |
cd015707 ME |
647 | |
648 | error: | |
649 | irq_free_virt(virq, 1); | |
650 | return -1; | |
6fde40f3 | 651 | } |
8ec8f2e8 | 652 | |
ee51de56 ME |
653 | unsigned int irq_create_direct_mapping(struct irq_host *host) |
654 | { | |
655 | unsigned int virq; | |
656 | ||
657 | if (host == NULL) | |
658 | host = irq_default_host; | |
659 | ||
660 | BUG_ON(host == NULL); | |
661 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_NOMAP); | |
662 | ||
663 | virq = irq_alloc_virt(host, 1, 0); | |
664 | if (virq == NO_IRQ) { | |
665 | pr_debug("irq: create_direct virq allocation failed\n"); | |
666 | return NO_IRQ; | |
667 | } | |
668 | ||
669 | pr_debug("irq: create_direct obtained virq %d\n", virq); | |
670 | ||
671 | if (irq_setup_virq(host, virq, virq)) | |
672 | return NO_IRQ; | |
673 | ||
674 | return virq; | |
675 | } | |
676 | ||
0ebfff14 | 677 | unsigned int irq_create_mapping(struct irq_host *host, |
6e99e458 | 678 | irq_hw_number_t hwirq) |
0ebfff14 BH |
679 | { |
680 | unsigned int virq, hint; | |
681 | ||
6e99e458 | 682 | pr_debug("irq: irq_create_mapping(0x%p, 0x%lx)\n", host, hwirq); |
0ebfff14 BH |
683 | |
684 | /* Look for default host if nececssary */ | |
685 | if (host == NULL) | |
686 | host = irq_default_host; | |
687 | if (host == NULL) { | |
688 | printk(KERN_WARNING "irq_create_mapping called for" | |
689 | " NULL host, hwirq=%lx\n", hwirq); | |
690 | WARN_ON(1); | |
691 | return NO_IRQ; | |
1da177e4 | 692 | } |
0ebfff14 | 693 | pr_debug("irq: -> using host @%p\n", host); |
1da177e4 | 694 | |
0ebfff14 BH |
695 | /* Check if mapping already exist, if it does, call |
696 | * host->ops->map() to update the flags | |
697 | */ | |
698 | virq = irq_find_mapping(host, hwirq); | |
f5921697 | 699 | if (virq != NO_IRQ) { |
acc900ef IK |
700 | if (host->ops->remap) |
701 | host->ops->remap(host, virq, hwirq); | |
0ebfff14 | 702 | pr_debug("irq: -> existing mapping on virq %d\n", virq); |
0ebfff14 | 703 | return virq; |
1da177e4 LT |
704 | } |
705 | ||
0ebfff14 BH |
706 | /* Get a virtual interrupt number */ |
707 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) { | |
708 | /* Handle legacy */ | |
709 | virq = (unsigned int)hwirq; | |
710 | if (virq == 0 || virq >= NUM_ISA_INTERRUPTS) | |
711 | return NO_IRQ; | |
712 | return virq; | |
713 | } else { | |
714 | /* Allocate a virtual interrupt number */ | |
715 | hint = hwirq % irq_virq_count; | |
716 | virq = irq_alloc_virt(host, 1, hint); | |
717 | if (virq == NO_IRQ) { | |
718 | pr_debug("irq: -> virq allocation failed\n"); | |
719 | return NO_IRQ; | |
720 | } | |
721 | } | |
0ebfff14 | 722 | |
6fde40f3 | 723 | if (irq_setup_virq(host, virq, hwirq)) |
0ebfff14 | 724 | return NO_IRQ; |
6fde40f3 | 725 | |
c7d07fdd ME |
726 | printk(KERN_DEBUG "irq: irq %lu on host %s mapped to virtual irq %u\n", |
727 | hwirq, host->of_node ? host->of_node->full_name : "null", virq); | |
728 | ||
1da177e4 | 729 | return virq; |
0ebfff14 BH |
730 | } |
731 | EXPORT_SYMBOL_GPL(irq_create_mapping); | |
732 | ||
f3d2ab41 | 733 | unsigned int irq_create_of_mapping(struct device_node *controller, |
40d50cf7 | 734 | const u32 *intspec, unsigned int intsize) |
0ebfff14 BH |
735 | { |
736 | struct irq_host *host; | |
737 | irq_hw_number_t hwirq; | |
6e99e458 BH |
738 | unsigned int type = IRQ_TYPE_NONE; |
739 | unsigned int virq; | |
1da177e4 | 740 | |
0ebfff14 BH |
741 | if (controller == NULL) |
742 | host = irq_default_host; | |
743 | else | |
744 | host = irq_find_host(controller); | |
6e99e458 BH |
745 | if (host == NULL) { |
746 | printk(KERN_WARNING "irq: no irq host found for %s !\n", | |
747 | controller->full_name); | |
0ebfff14 | 748 | return NO_IRQ; |
6e99e458 | 749 | } |
0ebfff14 BH |
750 | |
751 | /* If host has no translation, then we assume interrupt line */ | |
752 | if (host->ops->xlate == NULL) | |
753 | hwirq = intspec[0]; | |
754 | else { | |
755 | if (host->ops->xlate(host, controller, intspec, intsize, | |
6e99e458 | 756 | &hwirq, &type)) |
0ebfff14 | 757 | return NO_IRQ; |
1da177e4 | 758 | } |
0ebfff14 | 759 | |
6e99e458 BH |
760 | /* Create mapping */ |
761 | virq = irq_create_mapping(host, hwirq); | |
762 | if (virq == NO_IRQ) | |
763 | return virq; | |
764 | ||
765 | /* Set type if specified and different than the current one */ | |
766 | if (type != IRQ_TYPE_NONE && | |
6cff46f4 | 767 | type != (irq_to_desc(virq)->status & IRQF_TRIGGER_MASK)) |
6e99e458 BH |
768 | set_irq_type(virq, type); |
769 | return virq; | |
1da177e4 | 770 | } |
0ebfff14 | 771 | EXPORT_SYMBOL_GPL(irq_create_of_mapping); |
1da177e4 | 772 | |
0ebfff14 | 773 | unsigned int irq_of_parse_and_map(struct device_node *dev, int index) |
1da177e4 | 774 | { |
0ebfff14 | 775 | struct of_irq oirq; |
1da177e4 | 776 | |
0ebfff14 BH |
777 | if (of_irq_map_one(dev, index, &oirq)) |
778 | return NO_IRQ; | |
1da177e4 | 779 | |
0ebfff14 BH |
780 | return irq_create_of_mapping(oirq.controller, oirq.specifier, |
781 | oirq.size); | |
782 | } | |
783 | EXPORT_SYMBOL_GPL(irq_of_parse_and_map); | |
1da177e4 | 784 | |
0ebfff14 BH |
785 | void irq_dispose_mapping(unsigned int virq) |
786 | { | |
5414c6be | 787 | struct irq_host *host; |
0ebfff14 | 788 | irq_hw_number_t hwirq; |
1da177e4 | 789 | |
5414c6be ME |
790 | if (virq == NO_IRQ) |
791 | return; | |
792 | ||
793 | host = irq_map[virq].host; | |
0ebfff14 BH |
794 | WARN_ON (host == NULL); |
795 | if (host == NULL) | |
796 | return; | |
1da177e4 | 797 | |
0ebfff14 BH |
798 | /* Never unmap legacy interrupts */ |
799 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) | |
800 | return; | |
1da177e4 | 801 | |
0ebfff14 BH |
802 | /* remove chip and handler */ |
803 | set_irq_chip_and_handler(virq, NULL, NULL); | |
804 | ||
805 | /* Make sure it's completed */ | |
806 | synchronize_irq(virq); | |
807 | ||
808 | /* Tell the PIC about it */ | |
809 | if (host->ops->unmap) | |
810 | host->ops->unmap(host, virq); | |
811 | smp_mb(); | |
812 | ||
813 | /* Clear reverse map */ | |
814 | hwirq = irq_map[virq].hwirq; | |
815 | switch(host->revmap_type) { | |
816 | case IRQ_HOST_MAP_LINEAR: | |
817 | if (hwirq < host->revmap_data.linear.size) | |
f5921697 | 818 | host->revmap_data.linear.revmap[hwirq] = NO_IRQ; |
0ebfff14 BH |
819 | break; |
820 | case IRQ_HOST_MAP_TREE: | |
967e012e SD |
821 | /* |
822 | * Check if radix tree allocated yet, if not then nothing to | |
823 | * remove. | |
824 | */ | |
825 | smp_rmb(); | |
826 | if (revmap_trees_allocated < 1) | |
0ebfff14 | 827 | break; |
150c6c8f | 828 | mutex_lock(&revmap_trees_mutex); |
0ebfff14 | 829 | radix_tree_delete(&host->revmap_data.tree, hwirq); |
150c6c8f | 830 | mutex_unlock(&revmap_trees_mutex); |
0ebfff14 BH |
831 | break; |
832 | } | |
1da177e4 | 833 | |
0ebfff14 BH |
834 | /* Destroy map */ |
835 | smp_mb(); | |
836 | irq_map[virq].hwirq = host->inval_irq; | |
1da177e4 | 837 | |
0ebfff14 | 838 | /* Set some flags */ |
6cff46f4 | 839 | irq_to_desc(virq)->status |= IRQ_NOREQUEST; |
1da177e4 | 840 | |
0ebfff14 BH |
841 | /* Free it */ |
842 | irq_free_virt(virq, 1); | |
1da177e4 | 843 | } |
0ebfff14 | 844 | EXPORT_SYMBOL_GPL(irq_dispose_mapping); |
1da177e4 | 845 | |
0ebfff14 BH |
846 | unsigned int irq_find_mapping(struct irq_host *host, |
847 | irq_hw_number_t hwirq) | |
848 | { | |
849 | unsigned int i; | |
850 | unsigned int hint = hwirq % irq_virq_count; | |
851 | ||
852 | /* Look for default host if nececssary */ | |
853 | if (host == NULL) | |
854 | host = irq_default_host; | |
855 | if (host == NULL) | |
856 | return NO_IRQ; | |
857 | ||
858 | /* legacy -> bail early */ | |
859 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) | |
860 | return hwirq; | |
861 | ||
862 | /* Slow path does a linear search of the map */ | |
863 | if (hint < NUM_ISA_INTERRUPTS) | |
864 | hint = NUM_ISA_INTERRUPTS; | |
865 | i = hint; | |
866 | do { | |
867 | if (irq_map[i].host == host && | |
868 | irq_map[i].hwirq == hwirq) | |
869 | return i; | |
870 | i++; | |
871 | if (i >= irq_virq_count) | |
872 | i = NUM_ISA_INTERRUPTS; | |
873 | } while(i != hint); | |
874 | return NO_IRQ; | |
875 | } | |
876 | EXPORT_SYMBOL_GPL(irq_find_mapping); | |
1da177e4 | 877 | |
0ebfff14 | 878 | |
967e012e SD |
879 | unsigned int irq_radix_revmap_lookup(struct irq_host *host, |
880 | irq_hw_number_t hwirq) | |
1da177e4 | 881 | { |
0ebfff14 BH |
882 | struct irq_map_entry *ptr; |
883 | unsigned int virq; | |
1da177e4 | 884 | |
0ebfff14 | 885 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE); |
1da177e4 | 886 | |
967e012e SD |
887 | /* |
888 | * Check if the radix tree exists and has bee initialized. | |
889 | * If not, we fallback to slow mode | |
0ebfff14 | 890 | */ |
967e012e | 891 | if (revmap_trees_allocated < 2) |
0ebfff14 BH |
892 | return irq_find_mapping(host, hwirq); |
893 | ||
0ebfff14 | 894 | /* Now try to resolve */ |
150c6c8f SD |
895 | /* |
896 | * No rcu_read_lock(ing) needed, the ptr returned can't go under us | |
897 | * as it's referencing an entry in the static irq_map table. | |
898 | */ | |
967e012e | 899 | ptr = radix_tree_lookup(&host->revmap_data.tree, hwirq); |
8ec8f2e8 | 900 | |
967e012e SD |
901 | /* |
902 | * If found in radix tree, then fine. | |
903 | * Else fallback to linear lookup - this should not happen in practice | |
904 | * as it means that we failed to insert the node in the radix tree. | |
905 | */ | |
906 | if (ptr) | |
0ebfff14 | 907 | virq = ptr - irq_map; |
967e012e SD |
908 | else |
909 | virq = irq_find_mapping(host, hwirq); | |
910 | ||
911 | return virq; | |
912 | } | |
913 | ||
914 | void irq_radix_revmap_insert(struct irq_host *host, unsigned int virq, | |
915 | irq_hw_number_t hwirq) | |
916 | { | |
967e012e SD |
917 | |
918 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE); | |
919 | ||
920 | /* | |
921 | * Check if the radix tree exists yet. | |
922 | * If not, then the irq will be inserted into the tree when it gets | |
923 | * initialized. | |
924 | */ | |
925 | smp_rmb(); | |
926 | if (revmap_trees_allocated < 1) | |
927 | return; | |
0ebfff14 | 928 | |
8ec8f2e8 | 929 | if (virq != NO_IRQ) { |
150c6c8f | 930 | mutex_lock(&revmap_trees_mutex); |
967e012e SD |
931 | radix_tree_insert(&host->revmap_data.tree, hwirq, |
932 | &irq_map[virq]); | |
150c6c8f | 933 | mutex_unlock(&revmap_trees_mutex); |
8ec8f2e8 | 934 | } |
1da177e4 LT |
935 | } |
936 | ||
0ebfff14 BH |
937 | unsigned int irq_linear_revmap(struct irq_host *host, |
938 | irq_hw_number_t hwirq) | |
c6622f63 | 939 | { |
0ebfff14 | 940 | unsigned int *revmap; |
c6622f63 | 941 | |
0ebfff14 BH |
942 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_LINEAR); |
943 | ||
944 | /* Check revmap bounds */ | |
945 | if (unlikely(hwirq >= host->revmap_data.linear.size)) | |
946 | return irq_find_mapping(host, hwirq); | |
947 | ||
948 | /* Check if revmap was allocated */ | |
949 | revmap = host->revmap_data.linear.revmap; | |
950 | if (unlikely(revmap == NULL)) | |
951 | return irq_find_mapping(host, hwirq); | |
952 | ||
953 | /* Fill up revmap with slow path if no mapping found */ | |
954 | if (unlikely(revmap[hwirq] == NO_IRQ)) | |
955 | revmap[hwirq] = irq_find_mapping(host, hwirq); | |
956 | ||
957 | return revmap[hwirq]; | |
c6622f63 PM |
958 | } |
959 | ||
0ebfff14 BH |
960 | unsigned int irq_alloc_virt(struct irq_host *host, |
961 | unsigned int count, | |
962 | unsigned int hint) | |
963 | { | |
964 | unsigned long flags; | |
965 | unsigned int i, j, found = NO_IRQ; | |
c6622f63 | 966 | |
0ebfff14 BH |
967 | if (count == 0 || count > (irq_virq_count - NUM_ISA_INTERRUPTS)) |
968 | return NO_IRQ; | |
969 | ||
970 | spin_lock_irqsave(&irq_big_lock, flags); | |
971 | ||
972 | /* Use hint for 1 interrupt if any */ | |
973 | if (count == 1 && hint >= NUM_ISA_INTERRUPTS && | |
974 | hint < irq_virq_count && irq_map[hint].host == NULL) { | |
975 | found = hint; | |
976 | goto hint_found; | |
977 | } | |
978 | ||
979 | /* Look for count consecutive numbers in the allocatable | |
980 | * (non-legacy) space | |
981 | */ | |
e1251465 ME |
982 | for (i = NUM_ISA_INTERRUPTS, j = 0; i < irq_virq_count; i++) { |
983 | if (irq_map[i].host != NULL) | |
984 | j = 0; | |
985 | else | |
986 | j++; | |
987 | ||
988 | if (j == count) { | |
989 | found = i - count + 1; | |
990 | break; | |
991 | } | |
0ebfff14 BH |
992 | } |
993 | if (found == NO_IRQ) { | |
994 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
995 | return NO_IRQ; | |
996 | } | |
997 | hint_found: | |
998 | for (i = found; i < (found + count); i++) { | |
999 | irq_map[i].hwirq = host->inval_irq; | |
1000 | smp_wmb(); | |
1001 | irq_map[i].host = host; | |
1002 | } | |
1003 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
1004 | return found; | |
1005 | } | |
1006 | ||
1007 | void irq_free_virt(unsigned int virq, unsigned int count) | |
1da177e4 LT |
1008 | { |
1009 | unsigned long flags; | |
0ebfff14 | 1010 | unsigned int i; |
1da177e4 | 1011 | |
0ebfff14 BH |
1012 | WARN_ON (virq < NUM_ISA_INTERRUPTS); |
1013 | WARN_ON (count == 0 || (virq + count) > irq_virq_count); | |
1da177e4 | 1014 | |
0ebfff14 BH |
1015 | spin_lock_irqsave(&irq_big_lock, flags); |
1016 | for (i = virq; i < (virq + count); i++) { | |
1017 | struct irq_host *host; | |
1da177e4 | 1018 | |
0ebfff14 BH |
1019 | if (i < NUM_ISA_INTERRUPTS || |
1020 | (virq + count) > irq_virq_count) | |
1021 | continue; | |
1da177e4 | 1022 | |
0ebfff14 BH |
1023 | host = irq_map[i].host; |
1024 | irq_map[i].hwirq = host->inval_irq; | |
1025 | smp_wmb(); | |
1026 | irq_map[i].host = NULL; | |
1027 | } | |
1028 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
1da177e4 | 1029 | } |
0ebfff14 | 1030 | |
cd015707 | 1031 | int arch_early_irq_init(void) |
0ebfff14 | 1032 | { |
cd015707 ME |
1033 | struct irq_desc *desc; |
1034 | int i; | |
0ebfff14 | 1035 | |
cd015707 ME |
1036 | for (i = 0; i < NR_IRQS; i++) { |
1037 | desc = irq_to_desc(i); | |
1038 | if (desc) | |
1039 | desc->status |= IRQ_NOREQUEST; | |
1040 | } | |
1041 | ||
1042 | return 0; | |
1043 | } | |
1044 | ||
1045 | int arch_init_chip_data(struct irq_desc *desc, int node) | |
1046 | { | |
1047 | desc->status |= IRQ_NOREQUEST; | |
1048 | return 0; | |
0ebfff14 BH |
1049 | } |
1050 | ||
1051 | /* We need to create the radix trees late */ | |
1052 | static int irq_late_init(void) | |
1053 | { | |
1054 | struct irq_host *h; | |
967e012e | 1055 | unsigned int i; |
0ebfff14 | 1056 | |
967e012e SD |
1057 | /* |
1058 | * No mutual exclusion with respect to accessors of the tree is needed | |
1059 | * here as the synchronization is done via the state variable | |
1060 | * revmap_trees_allocated. | |
1061 | */ | |
0ebfff14 BH |
1062 | list_for_each_entry(h, &irq_hosts, link) { |
1063 | if (h->revmap_type == IRQ_HOST_MAP_TREE) | |
967e012e SD |
1064 | INIT_RADIX_TREE(&h->revmap_data.tree, GFP_KERNEL); |
1065 | } | |
1066 | ||
1067 | /* | |
1068 | * Make sure the radix trees inits are visible before setting | |
1069 | * the flag | |
1070 | */ | |
1071 | smp_wmb(); | |
1072 | revmap_trees_allocated = 1; | |
1073 | ||
1074 | /* | |
1075 | * Insert the reverse mapping for those interrupts already present | |
1076 | * in irq_map[]. | |
1077 | */ | |
150c6c8f | 1078 | mutex_lock(&revmap_trees_mutex); |
967e012e SD |
1079 | for (i = 0; i < irq_virq_count; i++) { |
1080 | if (irq_map[i].host && | |
1081 | (irq_map[i].host->revmap_type == IRQ_HOST_MAP_TREE)) | |
1082 | radix_tree_insert(&irq_map[i].host->revmap_data.tree, | |
1083 | irq_map[i].hwirq, &irq_map[i]); | |
0ebfff14 | 1084 | } |
150c6c8f | 1085 | mutex_unlock(&revmap_trees_mutex); |
0ebfff14 | 1086 | |
967e012e SD |
1087 | /* |
1088 | * Make sure the radix trees insertions are visible before setting | |
1089 | * the flag | |
1090 | */ | |
1091 | smp_wmb(); | |
1092 | revmap_trees_allocated = 2; | |
1093 | ||
0ebfff14 BH |
1094 | return 0; |
1095 | } | |
1096 | arch_initcall(irq_late_init); | |
1097 | ||
60b332e7 ME |
1098 | #ifdef CONFIG_VIRQ_DEBUG |
1099 | static int virq_debug_show(struct seq_file *m, void *private) | |
1100 | { | |
1101 | unsigned long flags; | |
97f7d6bc | 1102 | struct irq_desc *desc; |
60b332e7 ME |
1103 | const char *p; |
1104 | char none[] = "none"; | |
1105 | int i; | |
1106 | ||
1107 | seq_printf(m, "%-5s %-7s %-15s %s\n", "virq", "hwirq", | |
1108 | "chip name", "host name"); | |
1109 | ||
76f1d94f | 1110 | for (i = 1; i < nr_irqs; i++) { |
6cff46f4 | 1111 | desc = irq_to_desc(i); |
76f1d94f ME |
1112 | if (!desc) |
1113 | continue; | |
1114 | ||
239007b8 | 1115 | raw_spin_lock_irqsave(&desc->lock, flags); |
60b332e7 ME |
1116 | |
1117 | if (desc->action && desc->action->handler) { | |
1118 | seq_printf(m, "%5d ", i); | |
1119 | seq_printf(m, "0x%05lx ", virq_to_hw(i)); | |
1120 | ||
b27df672 TG |
1121 | if (desc->chip && desc->chip->name) |
1122 | p = desc->chip->name; | |
60b332e7 ME |
1123 | else |
1124 | p = none; | |
1125 | seq_printf(m, "%-15s ", p); | |
1126 | ||
1127 | if (irq_map[i].host && irq_map[i].host->of_node) | |
1128 | p = irq_map[i].host->of_node->full_name; | |
1129 | else | |
1130 | p = none; | |
1131 | seq_printf(m, "%s\n", p); | |
1132 | } | |
1133 | ||
239007b8 | 1134 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
60b332e7 ME |
1135 | } |
1136 | ||
1137 | return 0; | |
1138 | } | |
1139 | ||
1140 | static int virq_debug_open(struct inode *inode, struct file *file) | |
1141 | { | |
1142 | return single_open(file, virq_debug_show, inode->i_private); | |
1143 | } | |
1144 | ||
1145 | static const struct file_operations virq_debug_fops = { | |
1146 | .open = virq_debug_open, | |
1147 | .read = seq_read, | |
1148 | .llseek = seq_lseek, | |
1149 | .release = single_release, | |
1150 | }; | |
1151 | ||
1152 | static int __init irq_debugfs_init(void) | |
1153 | { | |
1154 | if (debugfs_create_file("virq_mapping", S_IRUGO, powerpc_debugfs_root, | |
476ff8a0 | 1155 | NULL, &virq_debug_fops) == NULL) |
60b332e7 ME |
1156 | return -ENOMEM; |
1157 | ||
1158 | return 0; | |
1159 | } | |
1160 | __initcall(irq_debugfs_init); | |
1161 | #endif /* CONFIG_VIRQ_DEBUG */ | |
1162 | ||
c6622f63 | 1163 | #ifdef CONFIG_PPC64 |
1da177e4 LT |
1164 | static int __init setup_noirqdistrib(char *str) |
1165 | { | |
1166 | distribute_irqs = 0; | |
1167 | return 1; | |
1168 | } | |
1169 | ||
1170 | __setup("noirqdistrib", setup_noirqdistrib); | |
756e7104 | 1171 | #endif /* CONFIG_PPC64 */ |