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Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Derived from arch/i386/kernel/irq.c |
3 | * Copyright (C) 1992 Linus Torvalds | |
4 | * Adapted from arch/i386 by Gary Thomas | |
5 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
756e7104 SR |
6 | * Updated and modified by Cort Dougan <cort@fsmlabs.com> |
7 | * Copyright (C) 1996-2001 Cort Dougan | |
1da177e4 LT |
8 | * Adapted for Power Macintosh by Paul Mackerras |
9 | * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au) | |
756e7104 | 10 | * |
1da177e4 LT |
11 | * This program is free software; you can redistribute it and/or |
12 | * modify it under the terms of the GNU General Public License | |
13 | * as published by the Free Software Foundation; either version | |
14 | * 2 of the License, or (at your option) any later version. | |
15 | * | |
16 | * This file contains the code used by various IRQ handling routines: | |
17 | * asking for different IRQ's should be done through these routines | |
18 | * instead of just grabbing them. Thus setups with different IRQ numbers | |
19 | * shouldn't result in any weird surprises, and installing new handlers | |
20 | * should be easier. | |
756e7104 SR |
21 | * |
22 | * The MPC8xx has an interrupt mask in the SIU. If a bit is set, the | |
23 | * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit | |
24 | * mask register (of which only 16 are defined), hence the weird shifting | |
25 | * and complement of the cached_irq_mask. I want to be able to stuff | |
26 | * this right into the SIU SMASK register. | |
27 | * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx | |
28 | * to reduce code space and undefined function references. | |
1da177e4 LT |
29 | */ |
30 | ||
0ebfff14 BH |
31 | #undef DEBUG |
32 | ||
1da177e4 LT |
33 | #include <linux/module.h> |
34 | #include <linux/threads.h> | |
35 | #include <linux/kernel_stat.h> | |
36 | #include <linux/signal.h> | |
37 | #include <linux/sched.h> | |
756e7104 | 38 | #include <linux/ptrace.h> |
1da177e4 LT |
39 | #include <linux/ioport.h> |
40 | #include <linux/interrupt.h> | |
41 | #include <linux/timex.h> | |
1da177e4 LT |
42 | #include <linux/init.h> |
43 | #include <linux/slab.h> | |
1da177e4 LT |
44 | #include <linux/delay.h> |
45 | #include <linux/irq.h> | |
756e7104 SR |
46 | #include <linux/seq_file.h> |
47 | #include <linux/cpumask.h> | |
1da177e4 LT |
48 | #include <linux/profile.h> |
49 | #include <linux/bitops.h> | |
0ebfff14 BH |
50 | #include <linux/list.h> |
51 | #include <linux/radix-tree.h> | |
52 | #include <linux/mutex.h> | |
53 | #include <linux/bootmem.h> | |
45934c47 | 54 | #include <linux/pci.h> |
60b332e7 | 55 | #include <linux/debugfs.h> |
1da177e4 LT |
56 | |
57 | #include <asm/uaccess.h> | |
58 | #include <asm/system.h> | |
59 | #include <asm/io.h> | |
60 | #include <asm/pgtable.h> | |
61 | #include <asm/irq.h> | |
62 | #include <asm/cache.h> | |
63 | #include <asm/prom.h> | |
64 | #include <asm/ptrace.h> | |
1da177e4 | 65 | #include <asm/machdep.h> |
0ebfff14 | 66 | #include <asm/udbg.h> |
d04c56f7 | 67 | #ifdef CONFIG_PPC64 |
1da177e4 | 68 | #include <asm/paca.h> |
d04c56f7 | 69 | #include <asm/firmware.h> |
0874dd40 | 70 | #include <asm/lv1call.h> |
756e7104 | 71 | #endif |
1bf4af16 AB |
72 | #define CREATE_TRACE_POINTS |
73 | #include <asm/trace.h> | |
1da177e4 | 74 | |
8c007bfd AB |
75 | DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat); |
76 | EXPORT_PER_CPU_SYMBOL(irq_stat); | |
77 | ||
868accb7 | 78 | int __irq_offset_value; |
756e7104 | 79 | |
756e7104 | 80 | #ifdef CONFIG_PPC32 |
b9e5b4e6 BH |
81 | EXPORT_SYMBOL(__irq_offset_value); |
82 | atomic_t ppc_n_lost_interrupts; | |
756e7104 | 83 | |
756e7104 SR |
84 | #ifdef CONFIG_TAU_INT |
85 | extern int tau_initialized; | |
86 | extern int tau_interrupts(int); | |
87 | #endif | |
b9e5b4e6 | 88 | #endif /* CONFIG_PPC32 */ |
756e7104 | 89 | |
756e7104 | 90 | #ifdef CONFIG_PPC64 |
cd015707 ME |
91 | |
92 | #ifndef CONFIG_SPARSE_IRQ | |
1da177e4 | 93 | EXPORT_SYMBOL(irq_desc); |
cd015707 | 94 | #endif |
1da177e4 LT |
95 | |
96 | int distribute_irqs = 1; | |
d04c56f7 | 97 | |
4e491d14 | 98 | static inline notrace unsigned long get_hard_enabled(void) |
ef2b343e HD |
99 | { |
100 | unsigned long enabled; | |
101 | ||
102 | __asm__ __volatile__("lbz %0,%1(13)" | |
103 | : "=r" (enabled) : "i" (offsetof(struct paca_struct, hard_enabled))); | |
104 | ||
105 | return enabled; | |
106 | } | |
107 | ||
4e491d14 | 108 | static inline notrace void set_soft_enabled(unsigned long enable) |
ef2b343e HD |
109 | { |
110 | __asm__ __volatile__("stb %0,%1(13)" | |
111 | : : "r" (enable), "i" (offsetof(struct paca_struct, soft_enabled))); | |
112 | } | |
113 | ||
4e491d14 | 114 | notrace void raw_local_irq_restore(unsigned long en) |
d04c56f7 | 115 | { |
ef2b343e HD |
116 | /* |
117 | * get_paca()->soft_enabled = en; | |
118 | * Is it ever valid to use local_irq_restore(0) when soft_enabled is 1? | |
119 | * That was allowed before, and in such a case we do need to take care | |
120 | * that gcc will set soft_enabled directly via r13, not choose to use | |
121 | * an intermediate register, lest we're preempted to a different cpu. | |
122 | */ | |
123 | set_soft_enabled(en); | |
d04c56f7 PM |
124 | if (!en) |
125 | return; | |
126 | ||
94491685 | 127 | #ifdef CONFIG_PPC_STD_MMU_64 |
d04c56f7 | 128 | if (firmware_has_feature(FW_FEATURE_ISERIES)) { |
ef2b343e HD |
129 | /* |
130 | * Do we need to disable preemption here? Not really: in the | |
131 | * unlikely event that we're preempted to a different cpu in | |
132 | * between getting r13, loading its lppaca_ptr, and loading | |
133 | * its any_int, we might call iseries_handle_interrupts without | |
134 | * an interrupt pending on the new cpu, but that's no disaster, | |
135 | * is it? And the business of preempting us off the old cpu | |
136 | * would itself involve a local_irq_restore which handles the | |
137 | * interrupt to that cpu. | |
138 | * | |
139 | * But use "local_paca->lppaca_ptr" instead of "get_lppaca()" | |
140 | * to avoid any preemption checking added into get_paca(). | |
141 | */ | |
142 | if (local_paca->lppaca_ptr->int_dword.any_int) | |
d04c56f7 | 143 | iseries_handle_interrupts(); |
d04c56f7 | 144 | } |
94491685 | 145 | #endif /* CONFIG_PPC_STD_MMU_64 */ |
d04c56f7 | 146 | |
ef2b343e HD |
147 | /* |
148 | * if (get_paca()->hard_enabled) return; | |
149 | * But again we need to take care that gcc gets hard_enabled directly | |
150 | * via r13, not choose to use an intermediate register, lest we're | |
151 | * preempted to a different cpu in between the two instructions. | |
152 | */ | |
153 | if (get_hard_enabled()) | |
d04c56f7 | 154 | return; |
ef2b343e HD |
155 | |
156 | /* | |
157 | * Need to hard-enable interrupts here. Since currently disabled, | |
158 | * no need to take further asm precautions against preemption; but | |
159 | * use local_paca instead of get_paca() to avoid preemption checking. | |
160 | */ | |
161 | local_paca->hard_enabled = en; | |
d04c56f7 PM |
162 | if ((int)mfspr(SPRN_DEC) < 0) |
163 | mtspr(SPRN_DEC, 1); | |
0874dd40 TS |
164 | |
165 | /* | |
166 | * Force the delivery of pending soft-disabled interrupts on PS3. | |
167 | * Any HV call will have this side effect. | |
168 | */ | |
169 | if (firmware_has_feature(FW_FEATURE_PS3_LV1)) { | |
170 | u64 tmp; | |
171 | lv1_get_version_info(&tmp); | |
172 | } | |
173 | ||
e1fa2e13 | 174 | __hard_irq_enable(); |
d04c56f7 | 175 | } |
945feb17 | 176 | EXPORT_SYMBOL(raw_local_irq_restore); |
756e7104 | 177 | #endif /* CONFIG_PPC64 */ |
1da177e4 | 178 | |
c86845ed AB |
179 | static int show_other_interrupts(struct seq_file *p, int prec) |
180 | { | |
181 | int j; | |
182 | ||
183 | #if defined(CONFIG_PPC32) && defined(CONFIG_TAU_INT) | |
184 | if (tau_initialized) { | |
185 | seq_printf(p, "%*s: ", prec, "TAU"); | |
186 | for_each_online_cpu(j) | |
187 | seq_printf(p, "%10u ", tau_interrupts(j)); | |
188 | seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n"); | |
189 | } | |
190 | #endif /* CONFIG_PPC32 && CONFIG_TAU_INT */ | |
191 | ||
89713ed1 AB |
192 | seq_printf(p, "%*s: ", prec, "LOC"); |
193 | for_each_online_cpu(j) | |
194 | seq_printf(p, "%10u ", per_cpu(irq_stat, j).timer_irqs); | |
195 | seq_printf(p, " Local timer interrupts\n"); | |
196 | ||
17081102 AB |
197 | seq_printf(p, "%*s: ", prec, "SPU"); |
198 | for_each_online_cpu(j) | |
199 | seq_printf(p, "%10u ", per_cpu(irq_stat, j).spurious_irqs); | |
200 | seq_printf(p, " Spurious interrupts\n"); | |
201 | ||
89713ed1 AB |
202 | seq_printf(p, "%*s: ", prec, "CNT"); |
203 | for_each_online_cpu(j) | |
204 | seq_printf(p, "%10u ", per_cpu(irq_stat, j).pmu_irqs); | |
205 | seq_printf(p, " Performance monitoring interrupts\n"); | |
206 | ||
207 | seq_printf(p, "%*s: ", prec, "MCE"); | |
208 | for_each_online_cpu(j) | |
209 | seq_printf(p, "%10u ", per_cpu(irq_stat, j).mce_exceptions); | |
210 | seq_printf(p, " Machine check exceptions\n"); | |
211 | ||
c86845ed AB |
212 | return 0; |
213 | } | |
214 | ||
1da177e4 LT |
215 | int show_interrupts(struct seq_file *p, void *v) |
216 | { | |
c86845ed AB |
217 | unsigned long flags, any_count = 0; |
218 | int i = *(loff_t *) v, j, prec; | |
756e7104 | 219 | struct irqaction *action; |
97f7d6bc | 220 | struct irq_desc *desc; |
1da177e4 | 221 | |
c86845ed AB |
222 | if (i > nr_irqs) |
223 | return 0; | |
224 | ||
225 | for (prec = 3, j = 1000; prec < 10 && j <= nr_irqs; ++prec) | |
226 | j *= 10; | |
227 | ||
228 | if (i == nr_irqs) | |
229 | return show_other_interrupts(p, prec); | |
230 | ||
231 | /* print header */ | |
1da177e4 | 232 | if (i == 0) { |
c86845ed | 233 | seq_printf(p, "%*s", prec + 8, ""); |
756e7104 | 234 | for_each_online_cpu(j) |
c86845ed | 235 | seq_printf(p, "CPU%-8d", j); |
1da177e4 | 236 | seq_putc(p, '\n'); |
756e7104 | 237 | } |
750ab112 ME |
238 | |
239 | desc = irq_to_desc(i); | |
240 | if (!desc) | |
241 | return 0; | |
242 | ||
239007b8 | 243 | raw_spin_lock_irqsave(&desc->lock, flags); |
c86845ed AB |
244 | for_each_online_cpu(j) |
245 | any_count |= kstat_irqs_cpu(i, j); | |
750ab112 | 246 | action = desc->action; |
c86845ed AB |
247 | if (!action && !any_count) |
248 | goto out; | |
750ab112 | 249 | |
c86845ed | 250 | seq_printf(p, "%*d: ", prec, i); |
750ab112 ME |
251 | for_each_online_cpu(j) |
252 | seq_printf(p, "%10u ", kstat_irqs_cpu(i, j)); | |
750ab112 ME |
253 | |
254 | if (desc->chip) | |
c86845ed | 255 | seq_printf(p, " %-16s", desc->chip->name); |
750ab112 | 256 | else |
c86845ed AB |
257 | seq_printf(p, " %-16s", "None"); |
258 | seq_printf(p, " %-8s", (desc->status & IRQ_LEVEL) ? "Level" : "Edge"); | |
750ab112 | 259 | |
c86845ed AB |
260 | if (action) { |
261 | seq_printf(p, " %s", action->name); | |
262 | while ((action = action->next) != NULL) | |
263 | seq_printf(p, ", %s", action->name); | |
264 | } | |
750ab112 | 265 | |
750ab112 | 266 | seq_putc(p, '\n'); |
c86845ed | 267 | out: |
239007b8 | 268 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
1da177e4 LT |
269 | return 0; |
270 | } | |
271 | ||
89713ed1 AB |
272 | /* |
273 | * /proc/stat helpers | |
274 | */ | |
275 | u64 arch_irq_stat_cpu(unsigned int cpu) | |
276 | { | |
277 | u64 sum = per_cpu(irq_stat, cpu).timer_irqs; | |
278 | ||
279 | sum += per_cpu(irq_stat, cpu).pmu_irqs; | |
280 | sum += per_cpu(irq_stat, cpu).mce_exceptions; | |
17081102 | 281 | sum += per_cpu(irq_stat, cpu).spurious_irqs; |
89713ed1 AB |
282 | |
283 | return sum; | |
284 | } | |
285 | ||
1da177e4 | 286 | #ifdef CONFIG_HOTPLUG_CPU |
b6decb70 | 287 | void fixup_irqs(const struct cpumask *map) |
1da177e4 | 288 | { |
6cff46f4 | 289 | struct irq_desc *desc; |
1da177e4 LT |
290 | unsigned int irq; |
291 | static int warned; | |
b6decb70 | 292 | cpumask_var_t mask; |
1da177e4 | 293 | |
b6decb70 | 294 | alloc_cpumask_var(&mask, GFP_KERNEL); |
1da177e4 | 295 | |
b6decb70 | 296 | for_each_irq(irq) { |
6cff46f4 ME |
297 | desc = irq_to_desc(irq); |
298 | if (desc && desc->status & IRQ_PER_CPU) | |
1da177e4 LT |
299 | continue; |
300 | ||
b6decb70 AB |
301 | cpumask_and(mask, desc->affinity, map); |
302 | if (cpumask_any(mask) >= nr_cpu_ids) { | |
1da177e4 | 303 | printk("Breaking affinity for irq %i\n", irq); |
b6decb70 | 304 | cpumask_copy(mask, map); |
1da177e4 | 305 | } |
6cff46f4 | 306 | if (desc->chip->set_affinity) |
b6decb70 | 307 | desc->chip->set_affinity(irq, mask); |
6cff46f4 | 308 | else if (desc->action && !(warned++)) |
1da177e4 LT |
309 | printk("Cannot set affinity for irq %i\n", irq); |
310 | } | |
311 | ||
b6decb70 AB |
312 | free_cpumask_var(mask); |
313 | ||
1da177e4 LT |
314 | local_irq_enable(); |
315 | mdelay(1); | |
316 | local_irq_disable(); | |
317 | } | |
318 | #endif | |
319 | ||
f2694ba5 ME |
320 | static inline void handle_one_irq(unsigned int irq) |
321 | { | |
322 | struct thread_info *curtp, *irqtp; | |
323 | unsigned long saved_sp_limit; | |
324 | struct irq_desc *desc; | |
f2694ba5 ME |
325 | |
326 | /* Switch to the irq stack to handle this */ | |
327 | curtp = current_thread_info(); | |
328 | irqtp = hardirq_ctx[smp_processor_id()]; | |
329 | ||
330 | if (curtp == irqtp) { | |
331 | /* We're already on the irq stack, just handle it */ | |
332 | generic_handle_irq(irq); | |
333 | return; | |
334 | } | |
335 | ||
6cff46f4 | 336 | desc = irq_to_desc(irq); |
f2694ba5 ME |
337 | saved_sp_limit = current->thread.ksp_limit; |
338 | ||
f2694ba5 ME |
339 | irqtp->task = curtp->task; |
340 | irqtp->flags = 0; | |
341 | ||
342 | /* Copy the softirq bits in preempt_count so that the | |
343 | * softirq checks work in the hardirq context. */ | |
344 | irqtp->preempt_count = (irqtp->preempt_count & ~SOFTIRQ_MASK) | | |
345 | (curtp->preempt_count & SOFTIRQ_MASK); | |
346 | ||
347 | current->thread.ksp_limit = (unsigned long)irqtp + | |
348 | _ALIGN_UP(sizeof(struct thread_info), 16); | |
349 | ||
835363e6 | 350 | call_handle_irq(irq, desc, irqtp, desc->handle_irq); |
f2694ba5 ME |
351 | current->thread.ksp_limit = saved_sp_limit; |
352 | irqtp->task = NULL; | |
353 | ||
354 | /* Set any flag that may have been set on the | |
355 | * alternate stack | |
356 | */ | |
357 | if (irqtp->flags) | |
358 | set_bits(irqtp->flags, &curtp->flags); | |
359 | } | |
f2694ba5 | 360 | |
d7cb10d6 ME |
361 | static inline void check_stack_overflow(void) |
362 | { | |
363 | #ifdef CONFIG_DEBUG_STACKOVERFLOW | |
364 | long sp; | |
365 | ||
366 | sp = __get_SP() & (THREAD_SIZE-1); | |
367 | ||
368 | /* check for stack overflow: is there less than 2KB free? */ | |
369 | if (unlikely(sp < (sizeof(struct thread_info) + 2048))) { | |
370 | printk("do_IRQ: stack overflow: %ld\n", | |
371 | sp - sizeof(struct thread_info)); | |
372 | dump_stack(); | |
373 | } | |
374 | #endif | |
375 | } | |
376 | ||
1da177e4 LT |
377 | void do_IRQ(struct pt_regs *regs) |
378 | { | |
7d12e780 | 379 | struct pt_regs *old_regs = set_irq_regs(regs); |
0ebfff14 | 380 | unsigned int irq; |
1da177e4 | 381 | |
1bf4af16 AB |
382 | trace_irq_entry(regs); |
383 | ||
4b218e9b | 384 | irq_enter(); |
1da177e4 | 385 | |
d7cb10d6 | 386 | check_stack_overflow(); |
1da177e4 | 387 | |
35a84c2f | 388 | irq = ppc_md.get_irq(); |
1da177e4 | 389 | |
f2694ba5 ME |
390 | if (irq != NO_IRQ && irq != NO_IRQ_IGNORE) |
391 | handle_one_irq(irq); | |
392 | else if (irq != NO_IRQ_IGNORE) | |
17081102 | 393 | __get_cpu_var(irq_stat).spurious_irqs++; |
e199500c | 394 | |
4b218e9b | 395 | irq_exit(); |
7d12e780 | 396 | set_irq_regs(old_regs); |
756e7104 | 397 | |
e199500c | 398 | #ifdef CONFIG_PPC_ISERIES |
b06a3183 SR |
399 | if (firmware_has_feature(FW_FEATURE_ISERIES) && |
400 | get_lppaca()->int_dword.fields.decr_int) { | |
3356bb9f DG |
401 | get_lppaca()->int_dword.fields.decr_int = 0; |
402 | /* Signal a fake decrementer interrupt */ | |
403 | timer_interrupt(regs); | |
e199500c SR |
404 | } |
405 | #endif | |
1bf4af16 AB |
406 | |
407 | trace_irq_exit(regs); | |
e199500c | 408 | } |
1da177e4 LT |
409 | |
410 | void __init init_IRQ(void) | |
411 | { | |
70584578 SR |
412 | if (ppc_md.init_IRQ) |
413 | ppc_md.init_IRQ(); | |
bcf0b088 KG |
414 | |
415 | exc_lvl_ctx_init(); | |
416 | ||
1da177e4 LT |
417 | irq_ctx_init(); |
418 | } | |
419 | ||
bcf0b088 KG |
420 | #if defined(CONFIG_BOOKE) || defined(CONFIG_40x) |
421 | struct thread_info *critirq_ctx[NR_CPUS] __read_mostly; | |
422 | struct thread_info *dbgirq_ctx[NR_CPUS] __read_mostly; | |
423 | struct thread_info *mcheckirq_ctx[NR_CPUS] __read_mostly; | |
424 | ||
425 | void exc_lvl_ctx_init(void) | |
426 | { | |
427 | struct thread_info *tp; | |
428 | int i; | |
429 | ||
430 | for_each_possible_cpu(i) { | |
431 | memset((void *)critirq_ctx[i], 0, THREAD_SIZE); | |
432 | tp = critirq_ctx[i]; | |
433 | tp->cpu = i; | |
434 | tp->preempt_count = 0; | |
435 | ||
436 | #ifdef CONFIG_BOOKE | |
437 | memset((void *)dbgirq_ctx[i], 0, THREAD_SIZE); | |
438 | tp = dbgirq_ctx[i]; | |
439 | tp->cpu = i; | |
440 | tp->preempt_count = 0; | |
441 | ||
442 | memset((void *)mcheckirq_ctx[i], 0, THREAD_SIZE); | |
443 | tp = mcheckirq_ctx[i]; | |
444 | tp->cpu = i; | |
445 | tp->preempt_count = HARDIRQ_OFFSET; | |
446 | #endif | |
447 | } | |
448 | } | |
449 | #endif | |
1da177e4 | 450 | |
22722051 AM |
451 | struct thread_info *softirq_ctx[NR_CPUS] __read_mostly; |
452 | struct thread_info *hardirq_ctx[NR_CPUS] __read_mostly; | |
1da177e4 LT |
453 | |
454 | void irq_ctx_init(void) | |
455 | { | |
456 | struct thread_info *tp; | |
457 | int i; | |
458 | ||
0e551954 | 459 | for_each_possible_cpu(i) { |
1da177e4 LT |
460 | memset((void *)softirq_ctx[i], 0, THREAD_SIZE); |
461 | tp = softirq_ctx[i]; | |
462 | tp->cpu = i; | |
e6768a4f | 463 | tp->preempt_count = 0; |
1da177e4 LT |
464 | |
465 | memset((void *)hardirq_ctx[i], 0, THREAD_SIZE); | |
466 | tp = hardirq_ctx[i]; | |
467 | tp->cpu = i; | |
468 | tp->preempt_count = HARDIRQ_OFFSET; | |
469 | } | |
470 | } | |
471 | ||
c6622f63 PM |
472 | static inline void do_softirq_onstack(void) |
473 | { | |
474 | struct thread_info *curtp, *irqtp; | |
85218827 | 475 | unsigned long saved_sp_limit = current->thread.ksp_limit; |
c6622f63 PM |
476 | |
477 | curtp = current_thread_info(); | |
478 | irqtp = softirq_ctx[smp_processor_id()]; | |
479 | irqtp->task = curtp->task; | |
85218827 KG |
480 | current->thread.ksp_limit = (unsigned long)irqtp + |
481 | _ALIGN_UP(sizeof(struct thread_info), 16); | |
c6622f63 | 482 | call_do_softirq(irqtp); |
85218827 | 483 | current->thread.ksp_limit = saved_sp_limit; |
c6622f63 PM |
484 | irqtp->task = NULL; |
485 | } | |
1da177e4 | 486 | |
1da177e4 LT |
487 | void do_softirq(void) |
488 | { | |
489 | unsigned long flags; | |
1da177e4 LT |
490 | |
491 | if (in_interrupt()) | |
1da177e4 LT |
492 | return; |
493 | ||
1da177e4 | 494 | local_irq_save(flags); |
1da177e4 | 495 | |
912b2539 | 496 | if (local_softirq_pending()) |
c6622f63 | 497 | do_softirq_onstack(); |
1da177e4 LT |
498 | |
499 | local_irq_restore(flags); | |
1da177e4 | 500 | } |
1da177e4 | 501 | |
1da177e4 | 502 | |
1da177e4 | 503 | /* |
0ebfff14 | 504 | * IRQ controller and virtual interrupts |
1da177e4 LT |
505 | */ |
506 | ||
0ebfff14 | 507 | static LIST_HEAD(irq_hosts); |
f95e085b | 508 | static DEFINE_RAW_SPINLOCK(irq_big_lock); |
967e012e | 509 | static unsigned int revmap_trees_allocated; |
150c6c8f | 510 | static DEFINE_MUTEX(revmap_trees_mutex); |
0ebfff14 BH |
511 | struct irq_map_entry irq_map[NR_IRQS]; |
512 | static unsigned int irq_virq_count = NR_IRQS; | |
513 | static struct irq_host *irq_default_host; | |
1da177e4 | 514 | |
35923f12 OJ |
515 | irq_hw_number_t virq_to_hw(unsigned int virq) |
516 | { | |
517 | return irq_map[virq].hwirq; | |
518 | } | |
519 | EXPORT_SYMBOL_GPL(virq_to_hw); | |
520 | ||
68158006 ME |
521 | static int default_irq_host_match(struct irq_host *h, struct device_node *np) |
522 | { | |
523 | return h->of_node != NULL && h->of_node == np; | |
524 | } | |
525 | ||
5669c3cf | 526 | struct irq_host *irq_alloc_host(struct device_node *of_node, |
52964f87 ME |
527 | unsigned int revmap_type, |
528 | unsigned int revmap_arg, | |
529 | struct irq_host_ops *ops, | |
530 | irq_hw_number_t inval_irq) | |
1da177e4 | 531 | { |
0ebfff14 BH |
532 | struct irq_host *host; |
533 | unsigned int size = sizeof(struct irq_host); | |
534 | unsigned int i; | |
535 | unsigned int *rmap; | |
536 | unsigned long flags; | |
537 | ||
538 | /* Allocate structure and revmap table if using linear mapping */ | |
539 | if (revmap_type == IRQ_HOST_MAP_LINEAR) | |
540 | size += revmap_arg * sizeof(unsigned int); | |
5669c3cf | 541 | host = zalloc_maybe_bootmem(size, GFP_KERNEL); |
0ebfff14 BH |
542 | if (host == NULL) |
543 | return NULL; | |
7d01c880 | 544 | |
0ebfff14 BH |
545 | /* Fill structure */ |
546 | host->revmap_type = revmap_type; | |
547 | host->inval_irq = inval_irq; | |
548 | host->ops = ops; | |
19fc65b5 | 549 | host->of_node = of_node_get(of_node); |
7d01c880 | 550 | |
68158006 ME |
551 | if (host->ops->match == NULL) |
552 | host->ops->match = default_irq_host_match; | |
7d01c880 | 553 | |
f95e085b | 554 | raw_spin_lock_irqsave(&irq_big_lock, flags); |
0ebfff14 BH |
555 | |
556 | /* If it's a legacy controller, check for duplicates and | |
557 | * mark it as allocated (we use irq 0 host pointer for that | |
558 | */ | |
559 | if (revmap_type == IRQ_HOST_MAP_LEGACY) { | |
560 | if (irq_map[0].host != NULL) { | |
f95e085b | 561 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
0ebfff14 BH |
562 | /* If we are early boot, we can't free the structure, |
563 | * too bad... | |
564 | * this will be fixed once slab is made available early | |
565 | * instead of the current cruft | |
566 | */ | |
567 | if (mem_init_done) | |
568 | kfree(host); | |
569 | return NULL; | |
570 | } | |
571 | irq_map[0].host = host; | |
572 | } | |
573 | ||
574 | list_add(&host->link, &irq_hosts); | |
f95e085b | 575 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
0ebfff14 BH |
576 | |
577 | /* Additional setups per revmap type */ | |
578 | switch(revmap_type) { | |
579 | case IRQ_HOST_MAP_LEGACY: | |
580 | /* 0 is always the invalid number for legacy */ | |
581 | host->inval_irq = 0; | |
582 | /* setup us as the host for all legacy interrupts */ | |
583 | for (i = 1; i < NUM_ISA_INTERRUPTS; i++) { | |
7866291d | 584 | irq_map[i].hwirq = i; |
0ebfff14 BH |
585 | smp_wmb(); |
586 | irq_map[i].host = host; | |
587 | smp_wmb(); | |
588 | ||
6e99e458 | 589 | /* Clear norequest flags */ |
6cff46f4 | 590 | irq_to_desc(i)->status &= ~IRQ_NOREQUEST; |
0ebfff14 BH |
591 | |
592 | /* Legacy flags are left to default at this point, | |
593 | * one can then use irq_create_mapping() to | |
c03983ac | 594 | * explicitly change them |
0ebfff14 | 595 | */ |
6e99e458 | 596 | ops->map(host, i, i); |
0ebfff14 BH |
597 | } |
598 | break; | |
599 | case IRQ_HOST_MAP_LINEAR: | |
600 | rmap = (unsigned int *)(host + 1); | |
601 | for (i = 0; i < revmap_arg; i++) | |
f5921697 | 602 | rmap[i] = NO_IRQ; |
0ebfff14 BH |
603 | host->revmap_data.linear.size = revmap_arg; |
604 | smp_wmb(); | |
605 | host->revmap_data.linear.revmap = rmap; | |
606 | break; | |
607 | default: | |
608 | break; | |
609 | } | |
610 | ||
611 | pr_debug("irq: Allocated host of type %d @0x%p\n", revmap_type, host); | |
612 | ||
613 | return host; | |
1da177e4 LT |
614 | } |
615 | ||
0ebfff14 | 616 | struct irq_host *irq_find_host(struct device_node *node) |
1da177e4 | 617 | { |
0ebfff14 BH |
618 | struct irq_host *h, *found = NULL; |
619 | unsigned long flags; | |
620 | ||
621 | /* We might want to match the legacy controller last since | |
622 | * it might potentially be set to match all interrupts in | |
623 | * the absence of a device node. This isn't a problem so far | |
624 | * yet though... | |
625 | */ | |
f95e085b | 626 | raw_spin_lock_irqsave(&irq_big_lock, flags); |
0ebfff14 | 627 | list_for_each_entry(h, &irq_hosts, link) |
68158006 | 628 | if (h->ops->match(h, node)) { |
0ebfff14 BH |
629 | found = h; |
630 | break; | |
631 | } | |
f95e085b | 632 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
0ebfff14 BH |
633 | return found; |
634 | } | |
635 | EXPORT_SYMBOL_GPL(irq_find_host); | |
636 | ||
637 | void irq_set_default_host(struct irq_host *host) | |
638 | { | |
639 | pr_debug("irq: Default host set to @0x%p\n", host); | |
1da177e4 | 640 | |
0ebfff14 BH |
641 | irq_default_host = host; |
642 | } | |
1da177e4 | 643 | |
0ebfff14 BH |
644 | void irq_set_virq_count(unsigned int count) |
645 | { | |
646 | pr_debug("irq: Trying to set virq count to %d\n", count); | |
fef1c772 | 647 | |
0ebfff14 BH |
648 | BUG_ON(count < NUM_ISA_INTERRUPTS); |
649 | if (count < NR_IRQS) | |
650 | irq_virq_count = count; | |
651 | } | |
652 | ||
6fde40f3 ME |
653 | static int irq_setup_virq(struct irq_host *host, unsigned int virq, |
654 | irq_hw_number_t hwirq) | |
655 | { | |
cd015707 ME |
656 | struct irq_desc *desc; |
657 | ||
658 | desc = irq_to_desc_alloc_node(virq, 0); | |
659 | if (!desc) { | |
660 | pr_debug("irq: -> allocating desc failed\n"); | |
661 | goto error; | |
662 | } | |
663 | ||
6fde40f3 | 664 | /* Clear IRQ_NOREQUEST flag */ |
cd015707 | 665 | desc->status &= ~IRQ_NOREQUEST; |
6fde40f3 ME |
666 | |
667 | /* map it */ | |
668 | smp_wmb(); | |
669 | irq_map[virq].hwirq = hwirq; | |
670 | smp_mb(); | |
671 | ||
672 | if (host->ops->map(host, virq, hwirq)) { | |
673 | pr_debug("irq: -> mapping failed, freeing\n"); | |
cd015707 | 674 | goto error; |
6fde40f3 ME |
675 | } |
676 | ||
677 | return 0; | |
cd015707 ME |
678 | |
679 | error: | |
680 | irq_free_virt(virq, 1); | |
681 | return -1; | |
6fde40f3 | 682 | } |
8ec8f2e8 | 683 | |
ee51de56 ME |
684 | unsigned int irq_create_direct_mapping(struct irq_host *host) |
685 | { | |
686 | unsigned int virq; | |
687 | ||
688 | if (host == NULL) | |
689 | host = irq_default_host; | |
690 | ||
691 | BUG_ON(host == NULL); | |
692 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_NOMAP); | |
693 | ||
694 | virq = irq_alloc_virt(host, 1, 0); | |
695 | if (virq == NO_IRQ) { | |
696 | pr_debug("irq: create_direct virq allocation failed\n"); | |
697 | return NO_IRQ; | |
698 | } | |
699 | ||
700 | pr_debug("irq: create_direct obtained virq %d\n", virq); | |
701 | ||
702 | if (irq_setup_virq(host, virq, virq)) | |
703 | return NO_IRQ; | |
704 | ||
705 | return virq; | |
706 | } | |
707 | ||
0ebfff14 | 708 | unsigned int irq_create_mapping(struct irq_host *host, |
6e99e458 | 709 | irq_hw_number_t hwirq) |
0ebfff14 BH |
710 | { |
711 | unsigned int virq, hint; | |
712 | ||
6e99e458 | 713 | pr_debug("irq: irq_create_mapping(0x%p, 0x%lx)\n", host, hwirq); |
0ebfff14 BH |
714 | |
715 | /* Look for default host if nececssary */ | |
716 | if (host == NULL) | |
717 | host = irq_default_host; | |
718 | if (host == NULL) { | |
719 | printk(KERN_WARNING "irq_create_mapping called for" | |
720 | " NULL host, hwirq=%lx\n", hwirq); | |
721 | WARN_ON(1); | |
722 | return NO_IRQ; | |
1da177e4 | 723 | } |
0ebfff14 | 724 | pr_debug("irq: -> using host @%p\n", host); |
1da177e4 | 725 | |
0ebfff14 BH |
726 | /* Check if mapping already exist, if it does, call |
727 | * host->ops->map() to update the flags | |
728 | */ | |
729 | virq = irq_find_mapping(host, hwirq); | |
f5921697 | 730 | if (virq != NO_IRQ) { |
acc900ef IK |
731 | if (host->ops->remap) |
732 | host->ops->remap(host, virq, hwirq); | |
0ebfff14 | 733 | pr_debug("irq: -> existing mapping on virq %d\n", virq); |
0ebfff14 | 734 | return virq; |
1da177e4 LT |
735 | } |
736 | ||
0ebfff14 BH |
737 | /* Get a virtual interrupt number */ |
738 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) { | |
739 | /* Handle legacy */ | |
740 | virq = (unsigned int)hwirq; | |
741 | if (virq == 0 || virq >= NUM_ISA_INTERRUPTS) | |
742 | return NO_IRQ; | |
743 | return virq; | |
744 | } else { | |
745 | /* Allocate a virtual interrupt number */ | |
746 | hint = hwirq % irq_virq_count; | |
747 | virq = irq_alloc_virt(host, 1, hint); | |
748 | if (virq == NO_IRQ) { | |
749 | pr_debug("irq: -> virq allocation failed\n"); | |
750 | return NO_IRQ; | |
751 | } | |
752 | } | |
0ebfff14 | 753 | |
6fde40f3 | 754 | if (irq_setup_virq(host, virq, hwirq)) |
0ebfff14 | 755 | return NO_IRQ; |
6fde40f3 | 756 | |
c7d07fdd ME |
757 | printk(KERN_DEBUG "irq: irq %lu on host %s mapped to virtual irq %u\n", |
758 | hwirq, host->of_node ? host->of_node->full_name : "null", virq); | |
759 | ||
1da177e4 | 760 | return virq; |
0ebfff14 BH |
761 | } |
762 | EXPORT_SYMBOL_GPL(irq_create_mapping); | |
763 | ||
f3d2ab41 | 764 | unsigned int irq_create_of_mapping(struct device_node *controller, |
40d50cf7 | 765 | const u32 *intspec, unsigned int intsize) |
0ebfff14 BH |
766 | { |
767 | struct irq_host *host; | |
768 | irq_hw_number_t hwirq; | |
6e99e458 BH |
769 | unsigned int type = IRQ_TYPE_NONE; |
770 | unsigned int virq; | |
1da177e4 | 771 | |
0ebfff14 BH |
772 | if (controller == NULL) |
773 | host = irq_default_host; | |
774 | else | |
775 | host = irq_find_host(controller); | |
6e99e458 BH |
776 | if (host == NULL) { |
777 | printk(KERN_WARNING "irq: no irq host found for %s !\n", | |
778 | controller->full_name); | |
0ebfff14 | 779 | return NO_IRQ; |
6e99e458 | 780 | } |
0ebfff14 BH |
781 | |
782 | /* If host has no translation, then we assume interrupt line */ | |
783 | if (host->ops->xlate == NULL) | |
784 | hwirq = intspec[0]; | |
785 | else { | |
786 | if (host->ops->xlate(host, controller, intspec, intsize, | |
6e99e458 | 787 | &hwirq, &type)) |
0ebfff14 | 788 | return NO_IRQ; |
1da177e4 | 789 | } |
0ebfff14 | 790 | |
6e99e458 BH |
791 | /* Create mapping */ |
792 | virq = irq_create_mapping(host, hwirq); | |
793 | if (virq == NO_IRQ) | |
794 | return virq; | |
795 | ||
796 | /* Set type if specified and different than the current one */ | |
797 | if (type != IRQ_TYPE_NONE && | |
6cff46f4 | 798 | type != (irq_to_desc(virq)->status & IRQF_TRIGGER_MASK)) |
6e99e458 BH |
799 | set_irq_type(virq, type); |
800 | return virq; | |
1da177e4 | 801 | } |
0ebfff14 | 802 | EXPORT_SYMBOL_GPL(irq_create_of_mapping); |
1da177e4 | 803 | |
0ebfff14 | 804 | unsigned int irq_of_parse_and_map(struct device_node *dev, int index) |
1da177e4 | 805 | { |
0ebfff14 | 806 | struct of_irq oirq; |
1da177e4 | 807 | |
0ebfff14 BH |
808 | if (of_irq_map_one(dev, index, &oirq)) |
809 | return NO_IRQ; | |
1da177e4 | 810 | |
0ebfff14 BH |
811 | return irq_create_of_mapping(oirq.controller, oirq.specifier, |
812 | oirq.size); | |
813 | } | |
814 | EXPORT_SYMBOL_GPL(irq_of_parse_and_map); | |
1da177e4 | 815 | |
0ebfff14 BH |
816 | void irq_dispose_mapping(unsigned int virq) |
817 | { | |
5414c6be | 818 | struct irq_host *host; |
0ebfff14 | 819 | irq_hw_number_t hwirq; |
1da177e4 | 820 | |
5414c6be ME |
821 | if (virq == NO_IRQ) |
822 | return; | |
823 | ||
824 | host = irq_map[virq].host; | |
0ebfff14 BH |
825 | WARN_ON (host == NULL); |
826 | if (host == NULL) | |
827 | return; | |
1da177e4 | 828 | |
0ebfff14 BH |
829 | /* Never unmap legacy interrupts */ |
830 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) | |
831 | return; | |
1da177e4 | 832 | |
0ebfff14 BH |
833 | /* remove chip and handler */ |
834 | set_irq_chip_and_handler(virq, NULL, NULL); | |
835 | ||
836 | /* Make sure it's completed */ | |
837 | synchronize_irq(virq); | |
838 | ||
839 | /* Tell the PIC about it */ | |
840 | if (host->ops->unmap) | |
841 | host->ops->unmap(host, virq); | |
842 | smp_mb(); | |
843 | ||
844 | /* Clear reverse map */ | |
845 | hwirq = irq_map[virq].hwirq; | |
846 | switch(host->revmap_type) { | |
847 | case IRQ_HOST_MAP_LINEAR: | |
848 | if (hwirq < host->revmap_data.linear.size) | |
f5921697 | 849 | host->revmap_data.linear.revmap[hwirq] = NO_IRQ; |
0ebfff14 BH |
850 | break; |
851 | case IRQ_HOST_MAP_TREE: | |
967e012e SD |
852 | /* |
853 | * Check if radix tree allocated yet, if not then nothing to | |
854 | * remove. | |
855 | */ | |
856 | smp_rmb(); | |
857 | if (revmap_trees_allocated < 1) | |
0ebfff14 | 858 | break; |
150c6c8f | 859 | mutex_lock(&revmap_trees_mutex); |
0ebfff14 | 860 | radix_tree_delete(&host->revmap_data.tree, hwirq); |
150c6c8f | 861 | mutex_unlock(&revmap_trees_mutex); |
0ebfff14 BH |
862 | break; |
863 | } | |
1da177e4 | 864 | |
0ebfff14 BH |
865 | /* Destroy map */ |
866 | smp_mb(); | |
867 | irq_map[virq].hwirq = host->inval_irq; | |
1da177e4 | 868 | |
0ebfff14 | 869 | /* Set some flags */ |
6cff46f4 | 870 | irq_to_desc(virq)->status |= IRQ_NOREQUEST; |
1da177e4 | 871 | |
0ebfff14 BH |
872 | /* Free it */ |
873 | irq_free_virt(virq, 1); | |
1da177e4 | 874 | } |
0ebfff14 | 875 | EXPORT_SYMBOL_GPL(irq_dispose_mapping); |
1da177e4 | 876 | |
0ebfff14 BH |
877 | unsigned int irq_find_mapping(struct irq_host *host, |
878 | irq_hw_number_t hwirq) | |
879 | { | |
880 | unsigned int i; | |
881 | unsigned int hint = hwirq % irq_virq_count; | |
882 | ||
883 | /* Look for default host if nececssary */ | |
884 | if (host == NULL) | |
885 | host = irq_default_host; | |
886 | if (host == NULL) | |
887 | return NO_IRQ; | |
888 | ||
889 | /* legacy -> bail early */ | |
890 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) | |
891 | return hwirq; | |
892 | ||
893 | /* Slow path does a linear search of the map */ | |
894 | if (hint < NUM_ISA_INTERRUPTS) | |
895 | hint = NUM_ISA_INTERRUPTS; | |
896 | i = hint; | |
897 | do { | |
898 | if (irq_map[i].host == host && | |
899 | irq_map[i].hwirq == hwirq) | |
900 | return i; | |
901 | i++; | |
902 | if (i >= irq_virq_count) | |
903 | i = NUM_ISA_INTERRUPTS; | |
904 | } while(i != hint); | |
905 | return NO_IRQ; | |
906 | } | |
907 | EXPORT_SYMBOL_GPL(irq_find_mapping); | |
1da177e4 | 908 | |
0ebfff14 | 909 | |
967e012e SD |
910 | unsigned int irq_radix_revmap_lookup(struct irq_host *host, |
911 | irq_hw_number_t hwirq) | |
1da177e4 | 912 | { |
0ebfff14 BH |
913 | struct irq_map_entry *ptr; |
914 | unsigned int virq; | |
1da177e4 | 915 | |
0ebfff14 | 916 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE); |
1da177e4 | 917 | |
967e012e SD |
918 | /* |
919 | * Check if the radix tree exists and has bee initialized. | |
920 | * If not, we fallback to slow mode | |
0ebfff14 | 921 | */ |
967e012e | 922 | if (revmap_trees_allocated < 2) |
0ebfff14 BH |
923 | return irq_find_mapping(host, hwirq); |
924 | ||
0ebfff14 | 925 | /* Now try to resolve */ |
150c6c8f SD |
926 | /* |
927 | * No rcu_read_lock(ing) needed, the ptr returned can't go under us | |
928 | * as it's referencing an entry in the static irq_map table. | |
929 | */ | |
967e012e | 930 | ptr = radix_tree_lookup(&host->revmap_data.tree, hwirq); |
8ec8f2e8 | 931 | |
967e012e SD |
932 | /* |
933 | * If found in radix tree, then fine. | |
934 | * Else fallback to linear lookup - this should not happen in practice | |
935 | * as it means that we failed to insert the node in the radix tree. | |
936 | */ | |
937 | if (ptr) | |
0ebfff14 | 938 | virq = ptr - irq_map; |
967e012e SD |
939 | else |
940 | virq = irq_find_mapping(host, hwirq); | |
941 | ||
942 | return virq; | |
943 | } | |
944 | ||
945 | void irq_radix_revmap_insert(struct irq_host *host, unsigned int virq, | |
946 | irq_hw_number_t hwirq) | |
947 | { | |
967e012e SD |
948 | |
949 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE); | |
950 | ||
951 | /* | |
952 | * Check if the radix tree exists yet. | |
953 | * If not, then the irq will be inserted into the tree when it gets | |
954 | * initialized. | |
955 | */ | |
956 | smp_rmb(); | |
957 | if (revmap_trees_allocated < 1) | |
958 | return; | |
0ebfff14 | 959 | |
8ec8f2e8 | 960 | if (virq != NO_IRQ) { |
150c6c8f | 961 | mutex_lock(&revmap_trees_mutex); |
967e012e SD |
962 | radix_tree_insert(&host->revmap_data.tree, hwirq, |
963 | &irq_map[virq]); | |
150c6c8f | 964 | mutex_unlock(&revmap_trees_mutex); |
8ec8f2e8 | 965 | } |
1da177e4 LT |
966 | } |
967 | ||
0ebfff14 BH |
968 | unsigned int irq_linear_revmap(struct irq_host *host, |
969 | irq_hw_number_t hwirq) | |
c6622f63 | 970 | { |
0ebfff14 | 971 | unsigned int *revmap; |
c6622f63 | 972 | |
0ebfff14 BH |
973 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_LINEAR); |
974 | ||
975 | /* Check revmap bounds */ | |
976 | if (unlikely(hwirq >= host->revmap_data.linear.size)) | |
977 | return irq_find_mapping(host, hwirq); | |
978 | ||
979 | /* Check if revmap was allocated */ | |
980 | revmap = host->revmap_data.linear.revmap; | |
981 | if (unlikely(revmap == NULL)) | |
982 | return irq_find_mapping(host, hwirq); | |
983 | ||
984 | /* Fill up revmap with slow path if no mapping found */ | |
985 | if (unlikely(revmap[hwirq] == NO_IRQ)) | |
986 | revmap[hwirq] = irq_find_mapping(host, hwirq); | |
987 | ||
988 | return revmap[hwirq]; | |
c6622f63 PM |
989 | } |
990 | ||
0ebfff14 BH |
991 | unsigned int irq_alloc_virt(struct irq_host *host, |
992 | unsigned int count, | |
993 | unsigned int hint) | |
994 | { | |
995 | unsigned long flags; | |
996 | unsigned int i, j, found = NO_IRQ; | |
c6622f63 | 997 | |
0ebfff14 BH |
998 | if (count == 0 || count > (irq_virq_count - NUM_ISA_INTERRUPTS)) |
999 | return NO_IRQ; | |
1000 | ||
f95e085b | 1001 | raw_spin_lock_irqsave(&irq_big_lock, flags); |
0ebfff14 BH |
1002 | |
1003 | /* Use hint for 1 interrupt if any */ | |
1004 | if (count == 1 && hint >= NUM_ISA_INTERRUPTS && | |
1005 | hint < irq_virq_count && irq_map[hint].host == NULL) { | |
1006 | found = hint; | |
1007 | goto hint_found; | |
1008 | } | |
1009 | ||
1010 | /* Look for count consecutive numbers in the allocatable | |
1011 | * (non-legacy) space | |
1012 | */ | |
e1251465 ME |
1013 | for (i = NUM_ISA_INTERRUPTS, j = 0; i < irq_virq_count; i++) { |
1014 | if (irq_map[i].host != NULL) | |
1015 | j = 0; | |
1016 | else | |
1017 | j++; | |
1018 | ||
1019 | if (j == count) { | |
1020 | found = i - count + 1; | |
1021 | break; | |
1022 | } | |
0ebfff14 BH |
1023 | } |
1024 | if (found == NO_IRQ) { | |
f95e085b | 1025 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
0ebfff14 BH |
1026 | return NO_IRQ; |
1027 | } | |
1028 | hint_found: | |
1029 | for (i = found; i < (found + count); i++) { | |
1030 | irq_map[i].hwirq = host->inval_irq; | |
1031 | smp_wmb(); | |
1032 | irq_map[i].host = host; | |
1033 | } | |
f95e085b | 1034 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
0ebfff14 BH |
1035 | return found; |
1036 | } | |
1037 | ||
1038 | void irq_free_virt(unsigned int virq, unsigned int count) | |
1da177e4 LT |
1039 | { |
1040 | unsigned long flags; | |
0ebfff14 | 1041 | unsigned int i; |
1da177e4 | 1042 | |
0ebfff14 BH |
1043 | WARN_ON (virq < NUM_ISA_INTERRUPTS); |
1044 | WARN_ON (count == 0 || (virq + count) > irq_virq_count); | |
1da177e4 | 1045 | |
f95e085b | 1046 | raw_spin_lock_irqsave(&irq_big_lock, flags); |
0ebfff14 BH |
1047 | for (i = virq; i < (virq + count); i++) { |
1048 | struct irq_host *host; | |
1da177e4 | 1049 | |
0ebfff14 BH |
1050 | if (i < NUM_ISA_INTERRUPTS || |
1051 | (virq + count) > irq_virq_count) | |
1052 | continue; | |
1da177e4 | 1053 | |
0ebfff14 BH |
1054 | host = irq_map[i].host; |
1055 | irq_map[i].hwirq = host->inval_irq; | |
1056 | smp_wmb(); | |
1057 | irq_map[i].host = NULL; | |
1058 | } | |
f95e085b | 1059 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
1da177e4 | 1060 | } |
0ebfff14 | 1061 | |
cd015707 | 1062 | int arch_early_irq_init(void) |
0ebfff14 | 1063 | { |
cd015707 ME |
1064 | struct irq_desc *desc; |
1065 | int i; | |
0ebfff14 | 1066 | |
cd015707 ME |
1067 | for (i = 0; i < NR_IRQS; i++) { |
1068 | desc = irq_to_desc(i); | |
1069 | if (desc) | |
1070 | desc->status |= IRQ_NOREQUEST; | |
1071 | } | |
1072 | ||
1073 | return 0; | |
1074 | } | |
1075 | ||
1076 | int arch_init_chip_data(struct irq_desc *desc, int node) | |
1077 | { | |
1078 | desc->status |= IRQ_NOREQUEST; | |
1079 | return 0; | |
0ebfff14 BH |
1080 | } |
1081 | ||
1082 | /* We need to create the radix trees late */ | |
1083 | static int irq_late_init(void) | |
1084 | { | |
1085 | struct irq_host *h; | |
967e012e | 1086 | unsigned int i; |
0ebfff14 | 1087 | |
967e012e SD |
1088 | /* |
1089 | * No mutual exclusion with respect to accessors of the tree is needed | |
1090 | * here as the synchronization is done via the state variable | |
1091 | * revmap_trees_allocated. | |
1092 | */ | |
0ebfff14 BH |
1093 | list_for_each_entry(h, &irq_hosts, link) { |
1094 | if (h->revmap_type == IRQ_HOST_MAP_TREE) | |
967e012e SD |
1095 | INIT_RADIX_TREE(&h->revmap_data.tree, GFP_KERNEL); |
1096 | } | |
1097 | ||
1098 | /* | |
1099 | * Make sure the radix trees inits are visible before setting | |
1100 | * the flag | |
1101 | */ | |
1102 | smp_wmb(); | |
1103 | revmap_trees_allocated = 1; | |
1104 | ||
1105 | /* | |
1106 | * Insert the reverse mapping for those interrupts already present | |
1107 | * in irq_map[]. | |
1108 | */ | |
150c6c8f | 1109 | mutex_lock(&revmap_trees_mutex); |
967e012e SD |
1110 | for (i = 0; i < irq_virq_count; i++) { |
1111 | if (irq_map[i].host && | |
1112 | (irq_map[i].host->revmap_type == IRQ_HOST_MAP_TREE)) | |
1113 | radix_tree_insert(&irq_map[i].host->revmap_data.tree, | |
1114 | irq_map[i].hwirq, &irq_map[i]); | |
0ebfff14 | 1115 | } |
150c6c8f | 1116 | mutex_unlock(&revmap_trees_mutex); |
0ebfff14 | 1117 | |
967e012e SD |
1118 | /* |
1119 | * Make sure the radix trees insertions are visible before setting | |
1120 | * the flag | |
1121 | */ | |
1122 | smp_wmb(); | |
1123 | revmap_trees_allocated = 2; | |
1124 | ||
0ebfff14 BH |
1125 | return 0; |
1126 | } | |
1127 | arch_initcall(irq_late_init); | |
1128 | ||
60b332e7 ME |
1129 | #ifdef CONFIG_VIRQ_DEBUG |
1130 | static int virq_debug_show(struct seq_file *m, void *private) | |
1131 | { | |
1132 | unsigned long flags; | |
97f7d6bc | 1133 | struct irq_desc *desc; |
60b332e7 ME |
1134 | const char *p; |
1135 | char none[] = "none"; | |
1136 | int i; | |
1137 | ||
1138 | seq_printf(m, "%-5s %-7s %-15s %s\n", "virq", "hwirq", | |
1139 | "chip name", "host name"); | |
1140 | ||
76f1d94f | 1141 | for (i = 1; i < nr_irqs; i++) { |
6cff46f4 | 1142 | desc = irq_to_desc(i); |
76f1d94f ME |
1143 | if (!desc) |
1144 | continue; | |
1145 | ||
239007b8 | 1146 | raw_spin_lock_irqsave(&desc->lock, flags); |
60b332e7 ME |
1147 | |
1148 | if (desc->action && desc->action->handler) { | |
1149 | seq_printf(m, "%5d ", i); | |
1150 | seq_printf(m, "0x%05lx ", virq_to_hw(i)); | |
1151 | ||
b27df672 TG |
1152 | if (desc->chip && desc->chip->name) |
1153 | p = desc->chip->name; | |
60b332e7 ME |
1154 | else |
1155 | p = none; | |
1156 | seq_printf(m, "%-15s ", p); | |
1157 | ||
1158 | if (irq_map[i].host && irq_map[i].host->of_node) | |
1159 | p = irq_map[i].host->of_node->full_name; | |
1160 | else | |
1161 | p = none; | |
1162 | seq_printf(m, "%s\n", p); | |
1163 | } | |
1164 | ||
239007b8 | 1165 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
60b332e7 ME |
1166 | } |
1167 | ||
1168 | return 0; | |
1169 | } | |
1170 | ||
1171 | static int virq_debug_open(struct inode *inode, struct file *file) | |
1172 | { | |
1173 | return single_open(file, virq_debug_show, inode->i_private); | |
1174 | } | |
1175 | ||
1176 | static const struct file_operations virq_debug_fops = { | |
1177 | .open = virq_debug_open, | |
1178 | .read = seq_read, | |
1179 | .llseek = seq_lseek, | |
1180 | .release = single_release, | |
1181 | }; | |
1182 | ||
1183 | static int __init irq_debugfs_init(void) | |
1184 | { | |
1185 | if (debugfs_create_file("virq_mapping", S_IRUGO, powerpc_debugfs_root, | |
476ff8a0 | 1186 | NULL, &virq_debug_fops) == NULL) |
60b332e7 ME |
1187 | return -ENOMEM; |
1188 | ||
1189 | return 0; | |
1190 | } | |
1191 | __initcall(irq_debugfs_init); | |
1192 | #endif /* CONFIG_VIRQ_DEBUG */ | |
1193 | ||
c6622f63 | 1194 | #ifdef CONFIG_PPC64 |
1da177e4 LT |
1195 | static int __init setup_noirqdistrib(char *str) |
1196 | { | |
1197 | distribute_irqs = 0; | |
1198 | return 1; | |
1199 | } | |
1200 | ||
1201 | __setup("noirqdistrib", setup_noirqdistrib); | |
756e7104 | 1202 | #endif /* CONFIG_PPC64 */ |