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b13e9309 AV |
1 | /* |
2 | * MPC8360E RDK Device Tree Source | |
3 | * | |
4 | * Copyright 2006 Freescale Semiconductor Inc. | |
5 | * Copyright 2007-2008 MontaVista Software, Inc. | |
6 | * | |
7 | * Author: Anton Vorontsov <avorontsov@ru.mvista.com> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify it | |
10 | * under the terms of the GNU General Public License as published by the | |
11 | * Free Software Foundation; either version 2 of the License, or (at your | |
12 | * option) any later version. | |
13 | */ | |
14 | ||
15 | /dts-v1/; | |
16 | ||
17 | / { | |
18 | #address-cells = <1>; | |
19 | #size-cells = <1>; | |
20 | compatible = "fsl,mpc8360rdk"; | |
21 | ||
22 | aliases { | |
23 | serial0 = &serial0; | |
24 | serial1 = &serial1; | |
25 | serial2 = &serial2; | |
26 | serial3 = &serial3; | |
27 | ethernet0 = &enet0; | |
28 | ethernet1 = &enet1; | |
29 | ethernet2 = &enet2; | |
30 | ethernet3 = &enet3; | |
31 | pci0 = &pci0; | |
32 | }; | |
33 | ||
34 | cpus { | |
35 | #address-cells = <1>; | |
36 | #size-cells = <0>; | |
37 | ||
38 | PowerPC,8360@0 { | |
39 | device_type = "cpu"; | |
40 | reg = <0>; | |
41 | d-cache-line-size = <32>; | |
42 | i-cache-line-size = <32>; | |
43 | d-cache-size = <32768>; | |
44 | i-cache-size = <32768>; | |
45 | /* filled by u-boot */ | |
46 | timebase-frequency = <0>; | |
47 | bus-frequency = <0>; | |
48 | clock-frequency = <0>; | |
49 | }; | |
50 | }; | |
51 | ||
52 | memory { | |
53 | device_type = "memory"; | |
54 | /* filled by u-boot */ | |
55 | reg = <0 0>; | |
56 | }; | |
57 | ||
58 | soc@e0000000 { | |
59 | #address-cells = <1>; | |
60 | #size-cells = <1>; | |
61 | device_type = "soc"; | |
62 | compatible = "fsl,mpc8360-immr", "fsl,immr", "fsl,soc", | |
63 | "simple-bus"; | |
64 | ranges = <0 0xe0000000 0x200000>; | |
65 | reg = <0xe0000000 0x200>; | |
66 | /* filled by u-boot */ | |
67 | bus-frequency = <0>; | |
68 | ||
69 | wdt@200 { | |
70 | compatible = "mpc83xx_wdt"; | |
71 | reg = <0x200 0x100>; | |
72 | }; | |
73 | ||
1f8a25d4 AV |
74 | pmc: power@b00 { |
75 | compatible = "fsl,mpc8360-pmc", "fsl,mpc8349-pmc"; | |
76 | reg = <0xb00 0x100 0xa00 0x100>; | |
77 | interrupts = <80 0x8>; | |
78 | interrupt-parent = <&ipic>; | |
79 | }; | |
80 | ||
b13e9309 AV |
81 | i2c@3000 { |
82 | #address-cells = <1>; | |
83 | #size-cells = <0>; | |
84 | cell-index = <0>; | |
85 | compatible = "fsl-i2c"; | |
86 | reg = <0x3000 0x100>; | |
87 | interrupts = <14 8>; | |
88 | interrupt-parent = <&ipic>; | |
89 | dfsrr; | |
90 | }; | |
91 | ||
92 | i2c@3100 { | |
93 | #address-cells = <1>; | |
94 | #size-cells = <0>; | |
95 | cell-index = <1>; | |
96 | compatible = "fsl-i2c"; | |
97 | reg = <0x3100 0x100>; | |
98 | interrupts = <16 8>; | |
99 | interrupt-parent = <&ipic>; | |
100 | dfsrr; | |
101 | }; | |
102 | ||
103 | serial0: serial@4500 { | |
104 | device_type = "serial"; | |
105 | compatible = "ns16550"; | |
106 | reg = <0x4500 0x100>; | |
107 | interrupts = <9 8>; | |
108 | interrupt-parent = <&ipic>; | |
109 | /* filled by u-boot */ | |
110 | clock-frequency = <0>; | |
111 | }; | |
112 | ||
113 | serial1: serial@4600 { | |
114 | device_type = "serial"; | |
115 | compatible = "ns16550"; | |
116 | reg = <0x4600 0x100>; | |
117 | interrupts = <10 8>; | |
118 | interrupt-parent = <&ipic>; | |
119 | /* filled by u-boot */ | |
120 | clock-frequency = <0>; | |
121 | }; | |
122 | ||
dee80553 KG |
123 | dma@82a8 { |
124 | #address-cells = <1>; | |
125 | #size-cells = <1>; | |
126 | compatible = "fsl,mpc8360-dma", "fsl,elo-dma"; | |
127 | reg = <0x82a8 4>; | |
128 | ranges = <0 0x8100 0x1a8>; | |
129 | interrupt-parent = <&ipic>; | |
130 | interrupts = <71 8>; | |
131 | cell-index = <0>; | |
132 | dma-channel@0 { | |
133 | compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; | |
134 | reg = <0 0x80>; | |
aeb42762 | 135 | cell-index = <0>; |
dee80553 KG |
136 | interrupt-parent = <&ipic>; |
137 | interrupts = <71 8>; | |
138 | }; | |
139 | dma-channel@80 { | |
140 | compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; | |
141 | reg = <0x80 0x80>; | |
aeb42762 | 142 | cell-index = <1>; |
dee80553 KG |
143 | interrupt-parent = <&ipic>; |
144 | interrupts = <71 8>; | |
145 | }; | |
146 | dma-channel@100 { | |
147 | compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; | |
148 | reg = <0x100 0x80>; | |
aeb42762 | 149 | cell-index = <2>; |
dee80553 KG |
150 | interrupt-parent = <&ipic>; |
151 | interrupts = <71 8>; | |
152 | }; | |
153 | dma-channel@180 { | |
154 | compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; | |
155 | reg = <0x180 0x28>; | |
aeb42762 | 156 | cell-index = <3>; |
dee80553 KG |
157 | interrupt-parent = <&ipic>; |
158 | interrupts = <71 8>; | |
159 | }; | |
160 | }; | |
161 | ||
b13e9309 | 162 | crypto@30000 { |
cf0d19fb | 163 | compatible = "fsl,sec2.0"; |
b13e9309 | 164 | reg = <0x30000 0x10000>; |
cf0d19fb | 165 | interrupts = <11 0x8>; |
b13e9309 | 166 | interrupt-parent = <&ipic>; |
cf0d19fb KP |
167 | fsl,num-channels = <4>; |
168 | fsl,channel-fifo-len = <24>; | |
169 | fsl,exec-units-mask = <0x7e>; | |
170 | fsl,descriptor-types-mask = <0x01010ebf>; | |
1f8a25d4 | 171 | sleep = <&pmc 0x03000000>; |
b13e9309 AV |
172 | }; |
173 | ||
174 | ipic: interrupt-controller@700 { | |
175 | #address-cells = <0>; | |
176 | #interrupt-cells = <2>; | |
177 | compatible = "fsl,pq2pro-pic", "fsl,ipic"; | |
178 | interrupt-controller; | |
179 | reg = <0x700 0x100>; | |
180 | }; | |
181 | ||
182 | qe_pio_b: gpio-controller@1418 { | |
183 | #gpio-cells = <2>; | |
184 | compatible = "fsl,mpc8360-qe-pario-bank", | |
185 | "fsl,mpc8323-qe-pario-bank"; | |
186 | reg = <0x1418 0x18>; | |
187 | gpio-controller; | |
188 | }; | |
189 | ||
190 | qe_pio_e: gpio-controller@1460 { | |
191 | #gpio-cells = <2>; | |
192 | compatible = "fsl,mpc8360-qe-pario-bank", | |
193 | "fsl,mpc8323-qe-pario-bank"; | |
194 | reg = <0x1460 0x18>; | |
195 | gpio-controller; | |
196 | }; | |
197 | ||
198 | qe@100000 { | |
199 | #address-cells = <1>; | |
200 | #size-cells = <1>; | |
201 | device_type = "qe"; | |
202 | compatible = "fsl,qe", "simple-bus"; | |
203 | ranges = <0 0x100000 0x100000>; | |
204 | reg = <0x100000 0x480>; | |
205 | /* filled by u-boot */ | |
206 | clock-frequency = <0>; | |
207 | bus-frequency = <0>; | |
208 | brg-frequency = <0>; | |
01b14a90 HW |
209 | fsl,qe-num-riscs = <2>; |
210 | fsl,qe-num-snums = <28>; | |
b13e9309 AV |
211 | |
212 | muram@10000 { | |
213 | #address-cells = <1>; | |
214 | #size-cells = <1>; | |
215 | compatible = "fsl,qe-muram", "fsl,cpm-muram"; | |
216 | ranges = <0 0x10000 0xc000>; | |
217 | ||
218 | data-only@0 { | |
219 | compatible = "fsl,qe-muram-data", | |
220 | "fsl,cpm-muram-data"; | |
221 | reg = <0 0xc000>; | |
222 | }; | |
223 | }; | |
224 | ||
225 | timer@440 { | |
226 | compatible = "fsl,mpc8360-qe-gtm", | |
227 | "fsl,qe-gtm", "fsl,gtm"; | |
228 | reg = <0x440 0x40>; | |
229 | interrupts = <12 13 14 15>; | |
230 | interrupt-parent = <&qeic>; | |
25adde18 AV |
231 | clock-frequency = <166666666>; |
232 | }; | |
233 | ||
234 | usb@6c0 { | |
235 | compatible = "fsl,mpc8360-qe-usb", | |
236 | "fsl,mpc8323-qe-usb"; | |
237 | reg = <0x6c0 0x40 0x8b00 0x100>; | |
238 | interrupts = <11>; | |
239 | interrupt-parent = <&qeic>; | |
240 | fsl,fullspeed-clock = "clk21"; | |
241 | gpios = <&qe_pio_b 2 0 /* USBOE */ | |
242 | &qe_pio_b 3 0 /* USBTP */ | |
243 | &qe_pio_b 8 0 /* USBTN */ | |
244 | &qe_pio_b 9 0 /* USBRP */ | |
245 | &qe_pio_b 11 0 /* USBRN */ | |
246 | &qe_pio_e 20 0 /* SPEED */ | |
247 | &qe_pio_e 21 1 /* POWER */>; | |
b13e9309 AV |
248 | }; |
249 | ||
250 | spi@4c0 { | |
251 | cell-index = <0>; | |
252 | compatible = "fsl,spi"; | |
253 | reg = <0x4c0 0x40>; | |
254 | interrupts = <2>; | |
255 | interrupt-parent = <&qeic>; | |
256 | mode = "cpu-qe"; | |
257 | }; | |
258 | ||
259 | spi@500 { | |
260 | cell-index = <1>; | |
261 | compatible = "fsl,spi"; | |
262 | reg = <0x500 0x40>; | |
263 | interrupts = <1>; | |
264 | interrupt-parent = <&qeic>; | |
265 | mode = "cpu-qe"; | |
266 | }; | |
267 | ||
268 | enet0: ucc@2000 { | |
269 | device_type = "network"; | |
270 | compatible = "ucc_geth"; | |
271 | cell-index = <1>; | |
272 | reg = <0x2000 0x200>; | |
273 | interrupts = <32>; | |
274 | interrupt-parent = <&qeic>; | |
275 | rx-clock-name = "none"; | |
276 | tx-clock-name = "clk9"; | |
277 | phy-handle = <&phy2>; | |
278 | phy-connection-type = "rgmii-rxid"; | |
279 | /* filled by u-boot */ | |
280 | local-mac-address = [ 00 00 00 00 00 00 ]; | |
281 | }; | |
282 | ||
283 | enet1: ucc@3000 { | |
284 | device_type = "network"; | |
285 | compatible = "ucc_geth"; | |
286 | cell-index = <2>; | |
287 | reg = <0x3000 0x200>; | |
288 | interrupts = <33>; | |
289 | interrupt-parent = <&qeic>; | |
290 | rx-clock-name = "none"; | |
291 | tx-clock-name = "clk4"; | |
292 | phy-handle = <&phy4>; | |
293 | phy-connection-type = "rgmii-rxid"; | |
294 | /* filled by u-boot */ | |
295 | local-mac-address = [ 00 00 00 00 00 00 ]; | |
296 | }; | |
297 | ||
298 | enet2: ucc@2600 { | |
299 | device_type = "network"; | |
300 | compatible = "ucc_geth"; | |
301 | cell-index = <7>; | |
302 | reg = <0x2600 0x200>; | |
303 | interrupts = <42>; | |
304 | interrupt-parent = <&qeic>; | |
305 | rx-clock-name = "clk20"; | |
306 | tx-clock-name = "clk19"; | |
307 | phy-handle = <&phy1>; | |
308 | phy-connection-type = "mii"; | |
309 | /* filled by u-boot */ | |
310 | local-mac-address = [ 00 00 00 00 00 00 ]; | |
311 | }; | |
312 | ||
313 | enet3: ucc@3200 { | |
314 | device_type = "network"; | |
315 | compatible = "ucc_geth"; | |
316 | cell-index = <4>; | |
317 | reg = <0x3200 0x200>; | |
318 | interrupts = <35>; | |
319 | interrupt-parent = <&qeic>; | |
320 | rx-clock-name = "clk8"; | |
321 | tx-clock-name = "clk7"; | |
322 | phy-handle = <&phy3>; | |
323 | phy-connection-type = "mii"; | |
324 | /* filled by u-boot */ | |
325 | local-mac-address = [ 00 00 00 00 00 00 ]; | |
326 | }; | |
327 | ||
328 | mdio@2120 { | |
329 | #address-cells = <1>; | |
330 | #size-cells = <0>; | |
331 | compatible = "fsl,ucc-mdio"; | |
332 | reg = <0x2120 0x18>; | |
333 | ||
334 | phy1: ethernet-phy@1 { | |
335 | device_type = "ethernet-phy"; | |
336 | compatible = "national,DP83848VV"; | |
337 | reg = <1>; | |
338 | }; | |
339 | ||
340 | phy2: ethernet-phy@2 { | |
341 | device_type = "ethernet-phy"; | |
342 | compatible = "broadcom,BCM5481UA2KMLG"; | |
343 | reg = <2>; | |
344 | }; | |
345 | ||
346 | phy3: ethernet-phy@3 { | |
347 | device_type = "ethernet-phy"; | |
348 | compatible = "national,DP83848VV"; | |
349 | reg = <3>; | |
350 | }; | |
351 | ||
352 | phy4: ethernet-phy@4 { | |
353 | device_type = "ethernet-phy"; | |
354 | compatible = "broadcom,BCM5481UA2KMLG"; | |
355 | reg = <4>; | |
356 | }; | |
357 | }; | |
358 | ||
359 | serial2: ucc@2400 { | |
360 | device_type = "serial"; | |
361 | compatible = "ucc_uart"; | |
362 | reg = <0x2400 0x200>; | |
363 | cell-index = <5>; | |
364 | port-number = <0>; | |
365 | rx-clock-name = "brg7"; | |
366 | tx-clock-name = "brg8"; | |
367 | interrupts = <40>; | |
368 | interrupt-parent = <&qeic>; | |
369 | soft-uart; | |
370 | }; | |
371 | ||
372 | serial3: ucc@3400 { | |
373 | device_type = "serial"; | |
374 | compatible = "ucc_uart"; | |
375 | reg = <0x3400 0x200>; | |
376 | cell-index = <6>; | |
377 | port-number = <1>; | |
378 | rx-clock-name = "brg13"; | |
379 | tx-clock-name = "brg14"; | |
380 | interrupts = <41>; | |
381 | interrupt-parent = <&qeic>; | |
382 | soft-uart; | |
383 | }; | |
384 | ||
385 | qeic: interrupt-controller@80 { | |
386 | #address-cells = <0>; | |
387 | #interrupt-cells = <1>; | |
388 | compatible = "fsl,qe-ic"; | |
389 | interrupt-controller; | |
390 | reg = <0x80 0x80>; | |
391 | big-endian; | |
392 | interrupts = <32 8 33 8>; | |
393 | interrupt-parent = <&ipic>; | |
394 | }; | |
395 | }; | |
396 | }; | |
397 | ||
398 | localbus@e0005000 { | |
399 | #address-cells = <2>; | |
400 | #size-cells = <1>; | |
401 | compatible = "fsl,mpc8360-localbus", "fsl,pq2pro-localbus", | |
402 | "simple-bus"; | |
403 | reg = <0xe0005000 0xd8>; | |
404 | ranges = <0 0 0xff800000 0x0800000 | |
405 | 1 0 0x60000000 0x0001000 | |
406 | 2 0 0x70000000 0x4000000>; | |
407 | ||
408 | flash@0,0 { | |
409 | compatible = "intel,PC28F640P30T85", "cfi-flash"; | |
410 | reg = <0 0 0x800000>; | |
411 | bank-width = <2>; | |
412 | device-width = <1>; | |
413 | }; | |
414 | ||
1fb25be1 AV |
415 | upm@1,0 { |
416 | compatible = "fsl,upm-nand"; | |
417 | reg = <1 0 1>; | |
418 | fsl,upm-addr-offset = <16>; | |
419 | fsl,upm-cmd-offset = <8>; | |
420 | gpios = <&qe_pio_e 18 0>; | |
421 | ||
422 | flash { | |
423 | compatible = "stm,nand512-a"; | |
424 | }; | |
425 | }; | |
426 | ||
b13e9309 AV |
427 | display@2,0 { |
428 | device_type = "display"; | |
429 | compatible = "fujitsu,MB86277", "fujitsu,mint"; | |
430 | reg = <2 0 0x4000000>; | |
431 | fujitsu,sh3; | |
432 | little-endian; | |
433 | /* filled by u-boot */ | |
434 | address = <0>; | |
435 | depth = <0>; | |
436 | width = <0>; | |
437 | height = <0>; | |
438 | linebytes = <0>; | |
439 | /* linux,opened; - added by uboot */ | |
440 | }; | |
441 | }; | |
442 | ||
443 | pci0: pci@e0008500 { | |
444 | #address-cells = <3>; | |
445 | #size-cells = <2>; | |
446 | #interrupt-cells = <1>; | |
447 | device_type = "pci"; | |
448 | compatible = "fsl,mpc8360-pci", "fsl,mpc8349-pci"; | |
5b70a097 JR |
449 | reg = <0xe0008500 0x100 /* internal registers */ |
450 | 0xe0008300 0x8>; /* config space access registers */ | |
b13e9309 AV |
451 | ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000 |
452 | 0x42000000 0 0x80000000 0x80000000 0 0x10000000 | |
453 | 0x01000000 0 0xe0300000 0xe0300000 0 0x00100000>; | |
454 | interrupts = <66 8>; | |
455 | interrupt-parent = <&ipic>; | |
456 | interrupt-map-mask = <0xf800 0 0 7>; | |
457 | interrupt-map = </* miniPCI0 IDSEL 0x14 AD20 */ | |
458 | 0xa000 0 0 1 &ipic 18 8 | |
459 | 0xa000 0 0 2 &ipic 19 8 | |
460 | ||
461 | /* PCI1 IDSEL 0x15 AD21 */ | |
462 | 0xa800 0 0 1 &ipic 19 8 | |
463 | 0xa800 0 0 2 &ipic 20 8 | |
464 | 0xa800 0 0 3 &ipic 21 8 | |
465 | 0xa800 0 0 4 &ipic 18 8>; | |
1f8a25d4 | 466 | sleep = <&pmc 0x00010000>; |
b13e9309 AV |
467 | /* filled by u-boot */ |
468 | bus-range = <0 0>; | |
469 | clock-frequency = <0>; | |
470 | }; | |
471 | }; |