]> bbs.cooldavid.org Git - net-next-2.6.git/blame - arch/parisc/include/asm/cacheflush.h
Merge git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging-2.6
[net-next-2.6.git] / arch / parisc / include / asm / cacheflush.h
CommitLineData
1da177e4
LT
1#ifndef _PARISC_CACHEFLUSH_H
2#define _PARISC_CACHEFLUSH_H
3
1da177e4 4#include <linux/mm.h>
210501aa 5#include <linux/uaccess.h>
1da177e4
LT
6
7/* The usual comment is "Caches aren't brain-dead on the <architecture>".
8 * Unfortunately, that doesn't apply to PA-RISC. */
9
d6ce8626
RC
10/* Internal implementation */
11void flush_data_cache_local(void *); /* flushes local data-cache only */
12void flush_instruction_cache_local(void *); /* flushes local code-cache only */
1da177e4 13#ifdef CONFIG_SMP
d6ce8626
RC
14void flush_data_cache(void); /* flushes data-cache only (all processors) */
15void flush_instruction_cache(void); /* flushes i-cache only (all processors) */
1da177e4 16#else
d6ce8626
RC
17#define flush_data_cache() flush_data_cache_local(NULL)
18#define flush_instruction_cache() flush_instruction_cache_local(NULL)
1da177e4
LT
19#endif
20
ec8c0446
RB
21#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
22
d6ce8626
RC
23void flush_user_icache_range_asm(unsigned long, unsigned long);
24void flush_kernel_icache_range_asm(unsigned long, unsigned long);
25void flush_user_dcache_range_asm(unsigned long, unsigned long);
26void flush_kernel_dcache_range_asm(unsigned long, unsigned long);
27void flush_kernel_dcache_page_asm(void *);
28void flush_kernel_icache_page(void *);
29void flush_user_dcache_page(unsigned long);
30void flush_user_icache_page(unsigned long);
3735313a
MW
31void flush_user_dcache_range(unsigned long, unsigned long);
32void flush_user_icache_range(unsigned long, unsigned long);
1da177e4 33
d6ce8626 34/* Cache flush operations */
1da177e4 35
d6ce8626
RC
36void flush_cache_all_local(void);
37void flush_cache_all(void);
38void flush_cache_mm(struct mm_struct *mm);
1da177e4 39
d6ce8626
RC
40#define flush_kernel_dcache_range(start,size) \
41 flush_kernel_dcache_range_asm((start), (start)+(size));
ef7cc35b
JB
42/* vmap range flushes and invalidates. Architecturally, we don't need
43 * the invalidate, because the CPU should refuse to speculate once an
44 * area has been flushed, so invalidate is left empty */
45static inline void flush_kernel_vmap_range(void *vaddr, int size)
46{
47 unsigned long start = (unsigned long)vaddr;
48
49 flush_kernel_dcache_range_asm(start, start + size);
50}
51static inline void invalidate_kernel_vmap_range(void *vaddr, int size)
52{
53}
1da177e4
LT
54
55#define flush_cache_vmap(start, end) flush_cache_all()
56#define flush_cache_vunmap(start, end) flush_cache_all()
57
2d4dc890 58#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
1da177e4
LT
59extern void flush_dcache_page(struct page *page);
60
61#define flush_dcache_mmap_lock(mapping) \
19fd6231 62 spin_lock_irq(&(mapping)->tree_lock)
1da177e4 63#define flush_dcache_mmap_unlock(mapping) \
19fd6231 64 spin_unlock_irq(&(mapping)->tree_lock)
1da177e4 65
d6ce8626
RC
66#define flush_icache_page(vma,page) do { \
67 flush_kernel_dcache_page(page); \
68 flush_kernel_icache_page(page_address(page)); \
69} while (0)
1da177e4 70
d6ce8626
RC
71#define flush_icache_range(s,e) do { \
72 flush_kernel_dcache_range_asm(s,e); \
73 flush_kernel_icache_range_asm(s,e); \
74} while (0)
1da177e4
LT
75
76#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
77do { \
78 flush_cache_page(vma, vaddr, page_to_pfn(page)); \
79 memcpy(dst, src, len); \
80 flush_kernel_dcache_range_asm((unsigned long)dst, (unsigned long)dst + len); \
81} while (0)
82
83#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
84do { \
85 flush_cache_page(vma, vaddr, page_to_pfn(page)); \
86 memcpy(dst, src, len); \
87} while (0)
88
d6ce8626
RC
89void flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long pfn);
90void flush_cache_range(struct vm_area_struct *vma,
91 unsigned long start, unsigned long end);
1bcdd854 92
d6ce8626 93#define ARCH_HAS_FLUSH_ANON_PAGE
ab43227c 94static inline void
a6f36be3 95flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr)
ab43227c
JB
96{
97 if (PageAnon(page))
98 flush_user_dcache_page(vmaddr);
99}
ab43227c 100
20f4d3cb
JB
101#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE
102void flush_kernel_dcache_page_addr(void *addr);
103static inline void flush_kernel_dcache_page(struct page *page)
ba575833 104{
20f4d3cb 105 flush_kernel_dcache_page_addr(page_address(page));
ba575833 106}
ba575833 107
1bcdd854
HD
108#ifdef CONFIG_DEBUG_RODATA
109void mark_rodata_ro(void);
1da177e4 110#endif
1bcdd854 111
20f4d3cb
JB
112#ifdef CONFIG_PA8X00
113/* Only pa8800, pa8900 needs this */
bb735019
KM
114
115#include <asm/kmap_types.h>
116
20f4d3cb
JB
117#define ARCH_HAS_KMAP
118
119void kunmap_parisc(void *addr);
120
121static inline void *kmap(struct page *page)
122{
123 might_sleep();
124 return page_address(page);
125}
126
127#define kunmap(page) kunmap_parisc(page_address(page))
128
765aaafe 129static inline void *__kmap_atomic(struct page *page)
210501aa
JDA
130{
131 pagefault_disable();
132 return page_address(page);
133}
20f4d3cb 134
765aaafe 135static inline void __kunmap_atomic(void *addr)
210501aa
JDA
136{
137 kunmap_parisc(addr);
138 pagefault_enable();
139}
20f4d3cb 140
765aaafe
JB
141#define kmap_atomic_prot(page, prot) kmap_atomic(page)
142#define kmap_atomic_pfn(pfn) kmap_atomic(pfn_to_page(pfn))
20f4d3cb
JB
143#define kmap_atomic_to_page(ptr) virt_to_page(ptr)
144#endif
145
1bcdd854
HD
146#endif /* _PARISC_CACHEFLUSH_H */
147