[net-next-2.6.git] / arch / mn10300 / mm / Kconfig.cache

#
# MN10300 CPU cache options
#

choice
	prompt "CPU Caching mode"
	default MN10300_CACHE_WBACK
	help
	  This option determines the caching mode for the kernel.

	  Write-Back caching mode involves the all reads and writes causing
	  the affected cacheline to be read into the cache first before being
	  operated upon. Memory is not then updated by a write until the cache
	  is filled and a cacheline needs to be displaced from the cache to
	  make room. Only at that point is it written back.

	  Write-Through caching only fetches cachelines from memory on a
	  read. Writes always get written directly to memory. If the affected
	  cacheline is also in cache, it will be updated too.

	  The final option is to turn of caching entirely.

config MN10300_CACHE_WBACK
	bool "Write-Back"

config MN10300_CACHE_WTHRU
	bool "Write-Through"

config MN10300_CACHE_DISABLED
	bool "Disabled"

endchoice

config MN10300_CACHE_ENABLED
	def_bool y if !MN10300_CACHE_DISABLED


choice
	prompt "CPU cache flush/invalidate method"
	default MN10300_CACHE_MANAGE_BY_TAG if !AM34_2
	default MN10300_CACHE_MANAGE_BY_REG if AM34_2
	depends on MN10300_CACHE_ENABLED
	help
	  This determines the method by which CPU cache flushing and
	  invalidation is performed.

config MN10300_CACHE_MANAGE_BY_TAG
	bool "Use the cache tag registers directly"

config MN10300_CACHE_MANAGE_BY_REG
	bool "Flush areas by way of automatic purge registers (AM34 only)"
	depends on AM34_2

endchoice

config MN10300_CACHE_INV_BY_TAG
	def_bool y if MN10300_CACHE_MANAGE_BY_TAG && MN10300_CACHE_ENABLED

config MN10300_CACHE_INV_BY_REG
	def_bool y if MN10300_CACHE_MANAGE_BY_REG && MN10300_CACHE_ENABLED

config MN10300_CACHE_FLUSH_BY_TAG
	def_bool y if MN10300_CACHE_MANAGE_BY_TAG && MN10300_CACHE_WBACK

config MN10300_CACHE_FLUSH_BY_REG
	def_bool y if MN10300_CACHE_MANAGE_BY_REG && MN10300_CACHE_WBACK
Commit	Line	Data
0bc42d7f DH	1	#
	2	# MN10300 CPU cache options
	3	#
	4
	5	choice
	6	prompt "CPU Caching mode"
	7	default MN10300_CACHE_WBACK
	8	help
	9	This option determines the caching mode for the kernel.
	10
	11	Write-Back caching mode involves the all reads and writes causing
	12	the affected cacheline to be read into the cache first before being
	13	operated upon. Memory is not then updated by a write until the cache
	14	is filled and a cacheline needs to be displaced from the cache to
	15	make room. Only at that point is it written back.
	16
	17	Write-Through caching only fetches cachelines from memory on a
	18	read. Writes always get written directly to memory. If the affected
	19	cacheline is also in cache, it will be updated too.
	20
	21	The final option is to turn of caching entirely.
	22
	23	config MN10300_CACHE_WBACK
	24	bool "Write-Back"
	25
	26	config MN10300_CACHE_WTHRU
	27	bool "Write-Through"
	28
	29	config MN10300_CACHE_DISABLED
	30	bool "Disabled"
	31
	32	endchoice
344af921 DH	33
	34	config MN10300_CACHE_ENABLED
	35	def_bool y if !MN10300_CACHE_DISABLED
518d4bb7 DH	36
	37
	38	choice
	39	prompt "CPU cache flush/invalidate method"
9731d237 AT	40	default MN10300_CACHE_MANAGE_BY_TAG if !AM34_2
9731d237 AT	41	default MN10300_CACHE_MANAGE_BY_REG if AM34_2
518d4bb7 DH	42	depends on MN10300_CACHE_ENABLED
	43	help
	44	This determines the method by which CPU cache flushing and
	45	invalidation is performed.
	46
	47	config MN10300_CACHE_MANAGE_BY_TAG
	48	bool "Use the cache tag registers directly"
	49
9731d237 AT	50	config MN10300_CACHE_MANAGE_BY_REG
	51	bool "Flush areas by way of automatic purge registers (AM34 only)"
	52	depends on AM34_2
	53
518d4bb7 DH	54	endchoice
	55
	56	config MN10300_CACHE_INV_BY_TAG
	57	def_bool y if MN10300_CACHE_MANAGE_BY_TAG && MN10300_CACHE_ENABLED
	58
9731d237 AT	59	config MN10300_CACHE_INV_BY_REG
	60	def_bool y if MN10300_CACHE_MANAGE_BY_REG && MN10300_CACHE_ENABLED
	61
518d4bb7 DH	62	config MN10300_CACHE_FLUSH_BY_TAG
518d4bb7 DH	63	def_bool y if MN10300_CACHE_MANAGE_BY_TAG && MN10300_CACHE_WBACK
9731d237 AT	64
	65	config MN10300_CACHE_FLUSH_BY_REG
	66	def_bool y if MN10300_CACHE_MANAGE_BY_REG && MN10300_CACHE_WBACK