]> bbs.cooldavid.org Git - net-next-2.6.git/blame - arch/mips/sibyte/sb1250/setup.c
Merge branch 'master' of git://dev.medozas.de/linux
[net-next-2.6.git] / arch / mips / sibyte / sb1250 / setup.c
CommitLineData
1da177e4
LT
1/*
2 * Copyright (C) 2000, 2001, 2002, 2003 Broadcom Corporation
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */
5ac71fd1 18#include <linux/init.h>
bb9b813b 19#include <linux/module.h>
1da177e4
LT
20#include <linux/kernel.h>
21#include <linux/reboot.h>
22#include <linux/string.h>
23
24#include <asm/bootinfo.h>
25#include <asm/mipsregs.h>
26#include <asm/io.h>
27#include <asm/sibyte/sb1250.h>
28#include <asm/sibyte/sb1250_regs.h>
29#include <asm/sibyte/sb1250_scd.h>
30
31unsigned int sb1_pass;
32unsigned int soc_pass;
33unsigned int soc_type;
b45d5279 34EXPORT_SYMBOL(soc_type);
1da177e4
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35unsigned int periph_rev;
36unsigned int zbbus_mhz;
bb9b813b 37EXPORT_SYMBOL(zbbus_mhz);
1da177e4
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38
39static char *soc_str;
40static char *pass_str;
41static unsigned int war_pass; /* XXXKW don't overload PASS defines? */
42
5ac71fd1 43static int __init setup_bcm1250(void)
1da177e4
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44{
45 int ret = 0;
46
47 switch (soc_pass) {
48 case K_SYS_REVISION_BCM1250_PASS1:
49 periph_rev = 1;
50 pass_str = "Pass 1";
51 break;
52 case K_SYS_REVISION_BCM1250_A10:
53 periph_rev = 2;
54 pass_str = "A8/A10";
55 /* XXXKW different war_pass? */
56 war_pass = K_SYS_REVISION_BCM1250_PASS2;
57 break;
58 case K_SYS_REVISION_BCM1250_PASS2_2:
59 periph_rev = 2;
60 pass_str = "B1";
61 break;
62 case K_SYS_REVISION_BCM1250_B2:
63 periph_rev = 2;
64 pass_str = "B2";
65 war_pass = K_SYS_REVISION_BCM1250_PASS2_2;
66 break;
67 case K_SYS_REVISION_BCM1250_PASS3:
68 periph_rev = 3;
69 pass_str = "C0";
70 break;
71 case K_SYS_REVISION_BCM1250_C1:
72 periph_rev = 3;
73 pass_str = "C1";
74 break;
75 default:
76 if (soc_pass < K_SYS_REVISION_BCM1250_PASS2_2) {
77 periph_rev = 2;
78 pass_str = "A0-A6";
79 war_pass = K_SYS_REVISION_BCM1250_PASS2;
80 } else {
36a88530 81 printk("Unknown BCM1250 rev %x\n", soc_pass);
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82 ret = 1;
83 }
84 break;
85 }
7c4b4773 86
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87 return ret;
88}
89
8d9df29d
RB
90int sb1250_m3_workaround_needed(void)
91{
92 switch (soc_type) {
93 case K_SYS_SOC_TYPE_BCM1250:
94 case K_SYS_SOC_TYPE_BCM1250_ALT:
95 case K_SYS_SOC_TYPE_BCM1250_ALT2:
96 case K_SYS_SOC_TYPE_BCM1125:
97 case K_SYS_SOC_TYPE_BCM1125H:
98 return soc_pass < K_SYS_REVISION_BCM1250_C0;
99
100 default:
101 return 0;
102 }
103}
104
5ac71fd1 105static int __init setup_bcm112x(void)
1da177e4
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106{
107 int ret = 0;
108
109 switch (soc_pass) {
110 case 0:
111 /* Early build didn't have revid set */
112 periph_rev = 3;
113 pass_str = "A1";
114 war_pass = K_SYS_REVISION_BCM112x_A1;
115 break;
116 case K_SYS_REVISION_BCM112x_A1:
117 periph_rev = 3;
118 pass_str = "A1";
119 break;
120 case K_SYS_REVISION_BCM112x_A2:
121 periph_rev = 3;
122 pass_str = "A2";
123 break;
9a994357
MM
124 case K_SYS_REVISION_BCM112x_A3:
125 periph_rev = 3;
126 pass_str = "A3";
127 break;
128 case K_SYS_REVISION_BCM112x_A4:
129 periph_rev = 3;
130 pass_str = "A4";
131 break;
132 case K_SYS_REVISION_BCM112x_B0:
133 periph_rev = 3;
134 pass_str = "B0";
135 break;
1da177e4 136 default:
36a88530 137 printk("Unknown %s rev %x\n", soc_str, soc_pass);
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138 ret = 1;
139 }
7c4b4773
RB
140
141 return ret;
142}
143
144/* Setup code likely to be common to all SiByte platforms */
145
146static int __init sys_rev_decode(void)
147{
148 int ret = 0;
149
150 war_pass = soc_pass;
151 switch (soc_type) {
152 case K_SYS_SOC_TYPE_BCM1250:
153 case K_SYS_SOC_TYPE_BCM1250_ALT:
154 case K_SYS_SOC_TYPE_BCM1250_ALT2:
155 soc_str = "BCM1250";
156 ret = setup_bcm1250();
157 break;
158 case K_SYS_SOC_TYPE_BCM1120:
159 soc_str = "BCM1120";
160 ret = setup_bcm112x();
161 break;
162 case K_SYS_SOC_TYPE_BCM1125:
163 soc_str = "BCM1125";
164 ret = setup_bcm112x();
165 break;
166 case K_SYS_SOC_TYPE_BCM1125H:
167 soc_str = "BCM1125H";
168 ret = setup_bcm112x();
169 break;
170 default:
171 printk("Unknown SOC type %x\n", soc_type);
172 ret = 1;
173 break;
174 }
175
1da177e4
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176 return ret;
177}
178
5ac71fd1 179void __init sb1250_setup(void)
1da177e4
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180{
181 uint64_t sys_rev;
182 int plldiv;
183 int bad_config = 0;
184
185 sb1_pass = read_c0_prid() & 0xff;
65bda1a9 186 sys_rev = __raw_readq(IOADDR(A_SCD_SYSTEM_REVISION));
1da177e4
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187 soc_type = SYS_SOC_TYPE(sys_rev);
188 soc_pass = G_SYS_REVISION(sys_rev);
189
190 if (sys_rev_decode()) {
36a88530 191 printk("Restart after failure to identify SiByte chip\n");
1da177e4
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192 machine_restart(NULL);
193 }
194
65bda1a9 195 plldiv = G_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG)));
1da177e4
LT
196 zbbus_mhz = ((plldiv >> 1) * 50) + ((plldiv & 1) * 25);
197
36a88530 198 printk("Broadcom SiByte %s %s @ %d MHz (SB1 rev %d)\n",
1da177e4 199 soc_str, pass_str, zbbus_mhz * 2, sb1_pass);
36a88530 200 printk("Board type: %s\n", get_system_type());
1da177e4 201
b6f7880b 202 switch (war_pass) {
1da177e4
LT
203 case K_SYS_REVISION_BCM1250_PASS1:
204#ifndef CONFIG_SB1_PASS_1_WORKAROUNDS
36a88530 205 printk("@@@@ This is a BCM1250 A0-A2 (Pass 1) board, "
b6f7880b
RB
206 "and the kernel doesn't have the proper "
207 "workarounds compiled in. @@@@\n");
1da177e4
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208 bad_config = 1;
209#endif
210 break;
211 case K_SYS_REVISION_BCM1250_PASS2:
212 /* Pass 2 - easiest as default for now - so many numbers */
b6f7880b
RB
213#if !defined(CONFIG_SB1_PASS_2_WORKAROUNDS) || \
214 !defined(CONFIG_SB1_PASS_2_1_WORKAROUNDS)
36a88530 215 printk("@@@@ This is a BCM1250 A3-A10 board, and the "
b6f7880b
RB
216 "kernel doesn't have the proper workarounds "
217 "compiled in. @@@@\n");
1da177e4
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218 bad_config = 1;
219#endif
220#ifdef CONFIG_CPU_HAS_PREFETCH
36a88530 221 printk("@@@@ Prefetches may be enabled in this kernel, "
b6f7880b 222 "but are buggy on this board. @@@@\n");
1da177e4
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223 bad_config = 1;
224#endif
225 break;
226 case K_SYS_REVISION_BCM1250_PASS2_2:
227#ifndef CONFIG_SB1_PASS_2_WORKAROUNDS
36a88530 228 printk("@@@@ This is a BCM1250 B1/B2. board, and the "
b6f7880b
RB
229 "kernel doesn't have the proper workarounds "
230 "compiled in. @@@@\n");
1da177e4
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231 bad_config = 1;
232#endif
b6f7880b
RB
233#if defined(CONFIG_SB1_PASS_2_1_WORKAROUNDS) || \
234 !defined(CONFIG_CPU_HAS_PREFETCH)
36a88530 235 printk("@@@@ This is a BCM1250 B1/B2, but the kernel is "
b6f7880b
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236 "conservatively configured for an 'A' stepping. "
237 "@@@@\n");
1da177e4
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238#endif
239 break;
240 default:
241 break;
242 }
243 if (bad_config) {
36a88530 244 printk("Invalid configuration for this chip.\n");
1da177e4
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245 machine_restart(NULL);
246 }
247}