]> bbs.cooldavid.org Git - net-next-2.6.git/blame - arch/mips/include/asm/octeon/cvmx-l2d-defs.h
Merge branches 'sh/pio-death', 'sh/nommu', 'sh/clkfwk', 'sh/core' and 'sh/intc-extens...
[net-next-2.6.git] / arch / mips / include / asm / octeon / cvmx-l2d-defs.h
CommitLineData
54293ec3
DD
1/***********************license start***************
2 * Author: Cavium Networks
3 *
4 * Contact: support@caviumnetworks.com
5 * This file is part of the OCTEON SDK
6 *
aa32a955 7 * Copyright (c) 2003-2010 Cavium Networks
54293ec3
DD
8 *
9 * This file is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License, Version 2, as
11 * published by the Free Software Foundation.
12 *
13 * This file is distributed in the hope that it will be useful, but
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16 * NONINFRINGEMENT. See the GNU General Public License for more
17 * details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this file; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 * or visit http://www.gnu.org/licenses/.
23 *
24 * This file may also be available under a different license from Cavium.
25 * Contact Cavium Networks for more information
26 ***********************license end**************************************/
27
28#ifndef __CVMX_L2D_DEFS_H__
29#define __CVMX_L2D_DEFS_H__
30
aa32a955
DD
31#define CVMX_L2D_BST0 (CVMX_ADD_IO_SEG(0x0001180080000780ull))
32#define CVMX_L2D_BST1 (CVMX_ADD_IO_SEG(0x0001180080000788ull))
33#define CVMX_L2D_BST2 (CVMX_ADD_IO_SEG(0x0001180080000790ull))
34#define CVMX_L2D_BST3 (CVMX_ADD_IO_SEG(0x0001180080000798ull))
35#define CVMX_L2D_ERR (CVMX_ADD_IO_SEG(0x0001180080000010ull))
36#define CVMX_L2D_FADR (CVMX_ADD_IO_SEG(0x0001180080000018ull))
37#define CVMX_L2D_FSYN0 (CVMX_ADD_IO_SEG(0x0001180080000020ull))
38#define CVMX_L2D_FSYN1 (CVMX_ADD_IO_SEG(0x0001180080000028ull))
39#define CVMX_L2D_FUS0 (CVMX_ADD_IO_SEG(0x00011800800007A0ull))
40#define CVMX_L2D_FUS1 (CVMX_ADD_IO_SEG(0x00011800800007A8ull))
41#define CVMX_L2D_FUS2 (CVMX_ADD_IO_SEG(0x00011800800007B0ull))
42#define CVMX_L2D_FUS3 (CVMX_ADD_IO_SEG(0x00011800800007B8ull))
54293ec3
DD
43
44union cvmx_l2d_bst0 {
45 uint64_t u64;
46 struct cvmx_l2d_bst0_s {
47 uint64_t reserved_35_63:29;
48 uint64_t ftl:1;
49 uint64_t q0stat:34;
50 } s;
51 struct cvmx_l2d_bst0_s cn30xx;
52 struct cvmx_l2d_bst0_s cn31xx;
53 struct cvmx_l2d_bst0_s cn38xx;
54 struct cvmx_l2d_bst0_s cn38xxp2;
55 struct cvmx_l2d_bst0_s cn50xx;
56 struct cvmx_l2d_bst0_s cn52xx;
57 struct cvmx_l2d_bst0_s cn52xxp1;
58 struct cvmx_l2d_bst0_s cn56xx;
59 struct cvmx_l2d_bst0_s cn56xxp1;
60 struct cvmx_l2d_bst0_s cn58xx;
61 struct cvmx_l2d_bst0_s cn58xxp1;
62};
63
64union cvmx_l2d_bst1 {
65 uint64_t u64;
66 struct cvmx_l2d_bst1_s {
67 uint64_t reserved_34_63:30;
68 uint64_t q1stat:34;
69 } s;
70 struct cvmx_l2d_bst1_s cn30xx;
71 struct cvmx_l2d_bst1_s cn31xx;
72 struct cvmx_l2d_bst1_s cn38xx;
73 struct cvmx_l2d_bst1_s cn38xxp2;
74 struct cvmx_l2d_bst1_s cn50xx;
75 struct cvmx_l2d_bst1_s cn52xx;
76 struct cvmx_l2d_bst1_s cn52xxp1;
77 struct cvmx_l2d_bst1_s cn56xx;
78 struct cvmx_l2d_bst1_s cn56xxp1;
79 struct cvmx_l2d_bst1_s cn58xx;
80 struct cvmx_l2d_bst1_s cn58xxp1;
81};
82
83union cvmx_l2d_bst2 {
84 uint64_t u64;
85 struct cvmx_l2d_bst2_s {
86 uint64_t reserved_34_63:30;
87 uint64_t q2stat:34;
88 } s;
89 struct cvmx_l2d_bst2_s cn30xx;
90 struct cvmx_l2d_bst2_s cn31xx;
91 struct cvmx_l2d_bst2_s cn38xx;
92 struct cvmx_l2d_bst2_s cn38xxp2;
93 struct cvmx_l2d_bst2_s cn50xx;
94 struct cvmx_l2d_bst2_s cn52xx;
95 struct cvmx_l2d_bst2_s cn52xxp1;
96 struct cvmx_l2d_bst2_s cn56xx;
97 struct cvmx_l2d_bst2_s cn56xxp1;
98 struct cvmx_l2d_bst2_s cn58xx;
99 struct cvmx_l2d_bst2_s cn58xxp1;
100};
101
102union cvmx_l2d_bst3 {
103 uint64_t u64;
104 struct cvmx_l2d_bst3_s {
105 uint64_t reserved_34_63:30;
106 uint64_t q3stat:34;
107 } s;
108 struct cvmx_l2d_bst3_s cn30xx;
109 struct cvmx_l2d_bst3_s cn31xx;
110 struct cvmx_l2d_bst3_s cn38xx;
111 struct cvmx_l2d_bst3_s cn38xxp2;
112 struct cvmx_l2d_bst3_s cn50xx;
113 struct cvmx_l2d_bst3_s cn52xx;
114 struct cvmx_l2d_bst3_s cn52xxp1;
115 struct cvmx_l2d_bst3_s cn56xx;
116 struct cvmx_l2d_bst3_s cn56xxp1;
117 struct cvmx_l2d_bst3_s cn58xx;
118 struct cvmx_l2d_bst3_s cn58xxp1;
119};
120
121union cvmx_l2d_err {
122 uint64_t u64;
123 struct cvmx_l2d_err_s {
124 uint64_t reserved_6_63:58;
125 uint64_t bmhclsel:1;
126 uint64_t ded_err:1;
127 uint64_t sec_err:1;
128 uint64_t ded_intena:1;
129 uint64_t sec_intena:1;
130 uint64_t ecc_ena:1;
131 } s;
132 struct cvmx_l2d_err_s cn30xx;
133 struct cvmx_l2d_err_s cn31xx;
134 struct cvmx_l2d_err_s cn38xx;
135 struct cvmx_l2d_err_s cn38xxp2;
136 struct cvmx_l2d_err_s cn50xx;
137 struct cvmx_l2d_err_s cn52xx;
138 struct cvmx_l2d_err_s cn52xxp1;
139 struct cvmx_l2d_err_s cn56xx;
140 struct cvmx_l2d_err_s cn56xxp1;
141 struct cvmx_l2d_err_s cn58xx;
142 struct cvmx_l2d_err_s cn58xxp1;
143};
144
145union cvmx_l2d_fadr {
146 uint64_t u64;
147 struct cvmx_l2d_fadr_s {
148 uint64_t reserved_19_63:45;
149 uint64_t fadru:1;
150 uint64_t fowmsk:4;
151 uint64_t fset:3;
152 uint64_t fadr:11;
153 } s;
154 struct cvmx_l2d_fadr_cn30xx {
155 uint64_t reserved_18_63:46;
156 uint64_t fowmsk:4;
157 uint64_t reserved_13_13:1;
158 uint64_t fset:2;
159 uint64_t reserved_9_10:2;
160 uint64_t fadr:9;
161 } cn30xx;
162 struct cvmx_l2d_fadr_cn31xx {
163 uint64_t reserved_18_63:46;
164 uint64_t fowmsk:4;
165 uint64_t reserved_13_13:1;
166 uint64_t fset:2;
167 uint64_t reserved_10_10:1;
168 uint64_t fadr:10;
169 } cn31xx;
170 struct cvmx_l2d_fadr_cn38xx {
171 uint64_t reserved_18_63:46;
172 uint64_t fowmsk:4;
173 uint64_t fset:3;
174 uint64_t fadr:11;
175 } cn38xx;
176 struct cvmx_l2d_fadr_cn38xx cn38xxp2;
177 struct cvmx_l2d_fadr_cn50xx {
178 uint64_t reserved_18_63:46;
179 uint64_t fowmsk:4;
180 uint64_t fset:3;
181 uint64_t reserved_8_10:3;
182 uint64_t fadr:8;
183 } cn50xx;
184 struct cvmx_l2d_fadr_cn52xx {
185 uint64_t reserved_18_63:46;
186 uint64_t fowmsk:4;
187 uint64_t fset:3;
188 uint64_t reserved_10_10:1;
189 uint64_t fadr:10;
190 } cn52xx;
191 struct cvmx_l2d_fadr_cn52xx cn52xxp1;
192 struct cvmx_l2d_fadr_s cn56xx;
193 struct cvmx_l2d_fadr_s cn56xxp1;
194 struct cvmx_l2d_fadr_s cn58xx;
195 struct cvmx_l2d_fadr_s cn58xxp1;
196};
197
198union cvmx_l2d_fsyn0 {
199 uint64_t u64;
200 struct cvmx_l2d_fsyn0_s {
201 uint64_t reserved_20_63:44;
202 uint64_t fsyn_ow1:10;
203 uint64_t fsyn_ow0:10;
204 } s;
205 struct cvmx_l2d_fsyn0_s cn30xx;
206 struct cvmx_l2d_fsyn0_s cn31xx;
207 struct cvmx_l2d_fsyn0_s cn38xx;
208 struct cvmx_l2d_fsyn0_s cn38xxp2;
209 struct cvmx_l2d_fsyn0_s cn50xx;
210 struct cvmx_l2d_fsyn0_s cn52xx;
211 struct cvmx_l2d_fsyn0_s cn52xxp1;
212 struct cvmx_l2d_fsyn0_s cn56xx;
213 struct cvmx_l2d_fsyn0_s cn56xxp1;
214 struct cvmx_l2d_fsyn0_s cn58xx;
215 struct cvmx_l2d_fsyn0_s cn58xxp1;
216};
217
218union cvmx_l2d_fsyn1 {
219 uint64_t u64;
220 struct cvmx_l2d_fsyn1_s {
221 uint64_t reserved_20_63:44;
222 uint64_t fsyn_ow3:10;
223 uint64_t fsyn_ow2:10;
224 } s;
225 struct cvmx_l2d_fsyn1_s cn30xx;
226 struct cvmx_l2d_fsyn1_s cn31xx;
227 struct cvmx_l2d_fsyn1_s cn38xx;
228 struct cvmx_l2d_fsyn1_s cn38xxp2;
229 struct cvmx_l2d_fsyn1_s cn50xx;
230 struct cvmx_l2d_fsyn1_s cn52xx;
231 struct cvmx_l2d_fsyn1_s cn52xxp1;
232 struct cvmx_l2d_fsyn1_s cn56xx;
233 struct cvmx_l2d_fsyn1_s cn56xxp1;
234 struct cvmx_l2d_fsyn1_s cn58xx;
235 struct cvmx_l2d_fsyn1_s cn58xxp1;
236};
237
238union cvmx_l2d_fus0 {
239 uint64_t u64;
240 struct cvmx_l2d_fus0_s {
241 uint64_t reserved_34_63:30;
242 uint64_t q0fus:34;
243 } s;
244 struct cvmx_l2d_fus0_s cn30xx;
245 struct cvmx_l2d_fus0_s cn31xx;
246 struct cvmx_l2d_fus0_s cn38xx;
247 struct cvmx_l2d_fus0_s cn38xxp2;
248 struct cvmx_l2d_fus0_s cn50xx;
249 struct cvmx_l2d_fus0_s cn52xx;
250 struct cvmx_l2d_fus0_s cn52xxp1;
251 struct cvmx_l2d_fus0_s cn56xx;
252 struct cvmx_l2d_fus0_s cn56xxp1;
253 struct cvmx_l2d_fus0_s cn58xx;
254 struct cvmx_l2d_fus0_s cn58xxp1;
255};
256
257union cvmx_l2d_fus1 {
258 uint64_t u64;
259 struct cvmx_l2d_fus1_s {
260 uint64_t reserved_34_63:30;
261 uint64_t q1fus:34;
262 } s;
263 struct cvmx_l2d_fus1_s cn30xx;
264 struct cvmx_l2d_fus1_s cn31xx;
265 struct cvmx_l2d_fus1_s cn38xx;
266 struct cvmx_l2d_fus1_s cn38xxp2;
267 struct cvmx_l2d_fus1_s cn50xx;
268 struct cvmx_l2d_fus1_s cn52xx;
269 struct cvmx_l2d_fus1_s cn52xxp1;
270 struct cvmx_l2d_fus1_s cn56xx;
271 struct cvmx_l2d_fus1_s cn56xxp1;
272 struct cvmx_l2d_fus1_s cn58xx;
273 struct cvmx_l2d_fus1_s cn58xxp1;
274};
275
276union cvmx_l2d_fus2 {
277 uint64_t u64;
278 struct cvmx_l2d_fus2_s {
279 uint64_t reserved_34_63:30;
280 uint64_t q2fus:34;
281 } s;
282 struct cvmx_l2d_fus2_s cn30xx;
283 struct cvmx_l2d_fus2_s cn31xx;
284 struct cvmx_l2d_fus2_s cn38xx;
285 struct cvmx_l2d_fus2_s cn38xxp2;
286 struct cvmx_l2d_fus2_s cn50xx;
287 struct cvmx_l2d_fus2_s cn52xx;
288 struct cvmx_l2d_fus2_s cn52xxp1;
289 struct cvmx_l2d_fus2_s cn56xx;
290 struct cvmx_l2d_fus2_s cn56xxp1;
291 struct cvmx_l2d_fus2_s cn58xx;
292 struct cvmx_l2d_fus2_s cn58xxp1;
293};
294
295union cvmx_l2d_fus3 {
296 uint64_t u64;
297 struct cvmx_l2d_fus3_s {
298 uint64_t reserved_40_63:24;
299 uint64_t ema_ctl:3;
300 uint64_t reserved_34_36:3;
301 uint64_t q3fus:34;
302 } s;
303 struct cvmx_l2d_fus3_cn30xx {
304 uint64_t reserved_35_63:29;
305 uint64_t crip_64k:1;
306 uint64_t q3fus:34;
307 } cn30xx;
308 struct cvmx_l2d_fus3_cn31xx {
309 uint64_t reserved_35_63:29;
310 uint64_t crip_128k:1;
311 uint64_t q3fus:34;
312 } cn31xx;
313 struct cvmx_l2d_fus3_cn38xx {
314 uint64_t reserved_36_63:28;
315 uint64_t crip_256k:1;
316 uint64_t crip_512k:1;
317 uint64_t q3fus:34;
318 } cn38xx;
319 struct cvmx_l2d_fus3_cn38xx cn38xxp2;
320 struct cvmx_l2d_fus3_cn50xx {
321 uint64_t reserved_40_63:24;
322 uint64_t ema_ctl:3;
323 uint64_t reserved_36_36:1;
324 uint64_t crip_32k:1;
325 uint64_t crip_64k:1;
326 uint64_t q3fus:34;
327 } cn50xx;
328 struct cvmx_l2d_fus3_cn52xx {
329 uint64_t reserved_40_63:24;
330 uint64_t ema_ctl:3;
331 uint64_t reserved_36_36:1;
332 uint64_t crip_128k:1;
333 uint64_t crip_256k:1;
334 uint64_t q3fus:34;
335 } cn52xx;
336 struct cvmx_l2d_fus3_cn52xx cn52xxp1;
337 struct cvmx_l2d_fus3_cn56xx {
338 uint64_t reserved_40_63:24;
339 uint64_t ema_ctl:3;
340 uint64_t reserved_36_36:1;
341 uint64_t crip_512k:1;
342 uint64_t crip_1024k:1;
343 uint64_t q3fus:34;
344 } cn56xx;
345 struct cvmx_l2d_fus3_cn56xx cn56xxp1;
346 struct cvmx_l2d_fus3_cn58xx {
347 uint64_t reserved_39_63:25;
348 uint64_t ema_ctl:2;
349 uint64_t reserved_36_36:1;
350 uint64_t crip_512k:1;
351 uint64_t crip_1024k:1;
352 uint64_t q3fus:34;
353 } cn58xx;
354 struct cvmx_l2d_fus3_cn58xx cn58xxp1;
355};
356
357#endif