git://bbs.cooldavid.org / net-next-2.6.git / blame
| Commit | Line | Data |
|---|---|---|
| 1da177e4 LT |
1 | /* |
| 2 | * Copyright 2000 MontaVista Software Inc. | |
| 3 | * Author: MontaVista Software, Inc. | |
| 4 | * ppopov@mvista.com or source@mvista.com | |
| 5 | * | |
| 6 | * This program is free software; you can redistribute it and/or modify it | |
| 7 | * under the terms of the GNU General Public License as published by the | |
| 8 | * Free Software Foundation; either version 2 of the License, or (at your | |
| 9 | * option) any later version. | |
| 10 | * | |
| 11 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED | |
| 12 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | |
| 13 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN | |
| 14 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | |
| 15 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | |
| 16 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF | |
| 17 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | |
| 18 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
| 19 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | |
| 20 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
| 21 | * | |
| 22 | * You should have received a copy of the GNU General Public License along | |
| 23 | * with this program; if not, write to the Free Software Foundation, Inc., | |
| 24 | * 675 Mass Ave, Cambridge, MA 02139, USA. | |
| 25 | */ | |
| 26 | #include <linux/config.h> | |
| 27 | #include <linux/init.h> | |
| 28 | #include <linux/sched.h> | |
| 29 | #include <linux/ioport.h> | |
| 30 | #include <linux/mm.h> | |
| 31 | #include <linux/console.h> | |
| 32 | #include <linux/delay.h> | |
| 33 | ||
| 34 | #include <asm/cpu.h> | |
| 35 | #include <asm/bootinfo.h> | |
| 36 | #include <asm/irq.h> | |
| 37 | #include <asm/mipsregs.h> | |
| 38 | #include <asm/reboot.h> | |
| 39 | #include <asm/pgtable.h> | |
| 40 | #include <asm/mach-au1x00/au1000.h> | |
| 41 | #include <asm/mach-pb1x00/pb1500.h> | |
| 42 | ||
| 43 | void board_reset (void) | |
| 44 | { | |
| 45 | /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */ | |
| 46 | au_writel(0x00000000, 0xAE00001C); | |
| 47 | } | |
| 48 | ||
| 49 | void __init board_setup(void) | |
| 50 | { | |
| 51 | u32 pin_func; | |
| 52 | u32 sys_freqctrl, sys_clksrc; | |
| 53 | ||
| 54 | sys_clksrc = sys_freqctrl = pin_func = 0; | |
| 55 | // set AUX clock to 12MHz * 8 = 96 MHz | |
| 56 | au_writel(8, SYS_AUXPLL); | |
| 57 | au_writel(0, SYS_PINSTATERD); | |
| 58 | udelay(100); | |
| 59 | ||
| 60 | #if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE) | |
| 61 | ||
| 62 | /* GPIO201 is input for PCMCIA card detect */ | |
| 63 | /* GPIO203 is input for PCMCIA interrupt request */ | |
| 64 | au_writel(au_readl(GPIO2_DIR) & (u32)(~((1<<1)|(1<<3))), GPIO2_DIR); | |
| 65 | ||
| 66 | /* zero and disable FREQ2 */ | |
| 67 | sys_freqctrl = au_readl(SYS_FREQCTRL0); | |
| 68 | sys_freqctrl &= ~0xFFF00000; | |
| 69 | au_writel(sys_freqctrl, SYS_FREQCTRL0); | |
| 70 | ||
| 71 | /* zero and disable USBH/USBD clocks */ | |
| 72 | sys_clksrc = au_readl(SYS_CLKSRC); | |
| 73 | sys_clksrc &= ~0x00007FE0; | |
| 74 | au_writel(sys_clksrc, SYS_CLKSRC); | |
| 75 | ||
| 76 | sys_freqctrl = au_readl(SYS_FREQCTRL0); | |
| 77 | sys_freqctrl &= ~0xFFF00000; | |
| 78 | ||
| 79 | sys_clksrc = au_readl(SYS_CLKSRC); | |
| 80 | sys_clksrc &= ~0x00007FE0; | |
| 81 | ||
| 82 | // FREQ2 = aux/2 = 48 MHz | |
| 83 | sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20)); | |
| 84 | au_writel(sys_freqctrl, SYS_FREQCTRL0); | |
| 85 | ||
| 86 | /* | |
| 87 | * Route 48MHz FREQ2 into USB Host and/or Device | |
| 88 | */ | |
| 89 | #ifdef CONFIG_USB_OHCI | |
| 90 | sys_clksrc |= ((4<<12) | (0<<11) | (0<<10)); | |
| 91 | #endif | |
| 92 | #ifdef CONFIG_AU1X00_USB_DEVICE | |
| 93 | sys_clksrc |= ((4<<7) | (0<<6) | (0<<5)); | |
| 94 | #endif | |
| 95 | au_writel(sys_clksrc, SYS_CLKSRC); | |
| 96 | ||
| 97 | ||
| 98 | pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000); | |
| 99 | #ifndef CONFIG_AU1X00_USB_DEVICE | |
| 100 | // 2nd USB port is USB host | |
| 101 | pin_func |= 0x8000; | |
| 102 | #endif | |
| 103 | au_writel(pin_func, SYS_PINFUNC); | |
| 104 | #endif // defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE) | |
| 105 | ||
| 106 | ||
| 107 | ||
| 108 | #ifdef CONFIG_PCI | |
| 109 | // Setup PCI bus controller | |
| 110 | au_writel(0, Au1500_PCI_CMEM); | |
| 111 | au_writel(0x00003fff, Au1500_CFG_BASE); | |
| 112 | #if defined(__MIPSEB__) | |
| 113 | au_writel(0xf | (2<<6) | (1<<4), Au1500_PCI_CFG); | |
| 114 | #else | |
| 115 | au_writel(0xf, Au1500_PCI_CFG); | |
| 116 | #endif | |
| 117 | au_writel(0xf0000000, Au1500_PCI_MWMASK_DEV); | |
| 118 | au_writel(0, Au1500_PCI_MWBASE_REV_CCL); | |
| 119 | au_writel(0x02a00356, Au1500_PCI_STATCMD); | |
| 120 | au_writel(0x00003c04, Au1500_PCI_HDRTYPE); | |
| 121 | au_writel(0x00000008, Au1500_PCI_MBAR); | |
| 122 | au_sync(); | |
| 123 | #endif | |
| 124 | ||
| 125 | /* Enable sys bus clock divider when IDLE state or no bus activity. */ | |
| 126 | au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL); | |
| 127 | ||
| 128 | /* Enable the RTC if not already enabled */ | |
| 129 | if (!(au_readl(0xac000028) & 0x20)) { | |
| 130 | printk("enabling clock ...\n"); | |
| 131 | au_writel((au_readl(0xac000028) | 0x20), 0xac000028); | |
| 132 | } | |
| 133 | /* Put the clock in BCD mode */ | |
| 134 | if (readl(0xac00002C) & 0x4) { /* reg B */ | |
| 135 | au_writel(au_readl(0xac00002c) & ~0x4, 0xac00002c); | |
| 136 | au_sync(); | |
| 137 | } | |
| 138 | } |