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Merge branch 'fix/hda' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6
[net-next-2.6.git] / arch / mips / alchemy / mtx-1 / board_setup.c
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1da177e4
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1/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 * 4G Systems MTX-1 board setup.
5 *
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6 * Copyright 2003, 2008 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc. <source@mvista.com>
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8 * Bruno Randolf <bruno.randolf@4g-systems.biz>
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 *
15 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
16 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
18 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
21 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
22 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * You should have received a copy of the GNU General Public License along
27 * with this program; if not, write to the Free Software Foundation, Inc.,
28 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 */
ce28f94c 30
bb706b28 31#include <linux/gpio.h>
1da177e4 32#include <linux/init.h>
7e50b2b7 33#include <linux/interrupt.h>
32fd6901 34#include <linux/pm.h>
1da177e4 35
32fd6901 36#include <asm/reboot.h>
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37#include <asm/mach-au1x00/au1000.h>
38
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39#include <prom.h>
40
7e50b2b7 41char irq_tab_alchemy[][5] __initdata = {
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42 [0] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTA, 0xff, 0xff }, /* IDSEL 00 - AdapterA-Slot0 (top) */
43 [1] = { -1, AU1500_PCI_INTB, AU1500_PCI_INTA, 0xff, 0xff }, /* IDSEL 01 - AdapterA-Slot1 (bottom) */
44 [2] = { -1, AU1500_PCI_INTC, AU1500_PCI_INTD, 0xff, 0xff }, /* IDSEL 02 - AdapterB-Slot0 (top) */
45 [3] = { -1, AU1500_PCI_INTD, AU1500_PCI_INTC, 0xff, 0xff }, /* IDSEL 03 - AdapterB-Slot1 (bottom) */
46 [4] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, 0xff, 0xff }, /* IDSEL 04 - AdapterC-Slot0 (top) */
47 [5] = { -1, AU1500_PCI_INTB, AU1500_PCI_INTA, 0xff, 0xff }, /* IDSEL 05 - AdapterC-Slot1 (bottom) */
48 [6] = { -1, AU1500_PCI_INTC, AU1500_PCI_INTD, 0xff, 0xff }, /* IDSEL 06 - AdapterD-Slot0 (top) */
49 [7] = { -1, AU1500_PCI_INTD, AU1500_PCI_INTC, 0xff, 0xff }, /* IDSEL 07 - AdapterD-Slot1 (bottom) */
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50};
51
baa545fd 52extern int (*board_pci_idsel)(unsigned int devsel, int assert);
1ff1a78c 53int mtx1_pci_idsel(unsigned int devsel, int assert);
baa545fd 54
32fd6901 55static void mtx1_reset(char *c)
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56{
57 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
58 au_writel(0x00000000, 0xAE00001C);
59}
60
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61static void mtx1_power_off(void)
62{
63 printk(KERN_ALERT "It's now safe to remove power\n");
64 while (1)
65 asm volatile (".set mips3 ; wait ; .set mips1");
66}
67
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68void __init board_setup(void)
69{
f708631a 70#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
1ff1a78c 71 /* Enable USB power switch */
bb706b28 72 alchemy_gpio_direction_output(204, 0);
f708631a 73#endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */
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74
75#ifdef CONFIG_PCI
76#if defined(__MIPSEB__)
1ff1a78c 77 au_writel(0xf | (2 << 6) | (1 << 4), Au1500_PCI_CFG);
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78#else
79 au_writel(0xf, Au1500_PCI_CFG);
80#endif
39d2211d 81 board_pci_idsel = mtx1_pci_idsel;
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82#endif
83
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84 /* Initialize sys_pinfunc */
85 au_writel(SYS_PF_NI2, SYS_PINFUNC);
1da177e4 86
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87 /* Initialize GPIO */
88 au_writel(0xFFFFFFFF, SYS_TRIOUTCLR);
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89 alchemy_gpio_direction_output(0, 0); /* Disable M66EN (PCI 66MHz) */
90 alchemy_gpio_direction_output(3, 1); /* Disable PCI CLKRUN# */
91 alchemy_gpio_direction_output(1, 1); /* Enable EXT_IO3 */
92 alchemy_gpio_direction_output(5, 0); /* Disable eth PHY TX_ER */
1da177e4 93
1ff1a78c 94 /* Enable LED and set it to green */
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95 alchemy_gpio_direction_output(211, 1); /* green on */
96 alchemy_gpio_direction_output(212, 0); /* red off */
1da177e4 97
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98 pm_power_off = mtx1_power_off;
99 _machine_halt = mtx1_power_off;
100 _machine_restart = mtx1_reset;
101
1ff1a78c 102 printk(KERN_INFO "4G Systems MTX-1 Board\n");
1da177e4 103}
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104
105int
106mtx1_pci_idsel(unsigned int devsel, int assert)
107{
108#define MTX_IDSEL_ONLY_0_AND_3 0
109#if MTX_IDSEL_ONLY_0_AND_3
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110 if (devsel != 0 && devsel != 3) {
111 printk(KERN_ERR "*** not 0 or 3\n");
112 return 0;
113 }
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114#endif
115
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116 if (assert && devsel != 0)
117 /* Suppress signal to Cardbus */
98a0f86a 118 alchemy_gpio_set_value(1, 0); /* set EXT_IO3 OFF */
1ff1a78c 119 else
98a0f86a 120 alchemy_gpio_set_value(1, 1); /* set EXT_IO3 ON */
bb706b28 121
98a0f86a 122 udelay(1);
1ff1a78c 123 return 1;
baa545fd 124}
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125
126static int __init mtx1_init_irq(void)
127{
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128 set_irq_type(AU1500_GPIO204_INT, IRQF_TRIGGER_HIGH);
129 set_irq_type(AU1500_GPIO201_INT, IRQF_TRIGGER_LOW);
130 set_irq_type(AU1500_GPIO202_INT, IRQF_TRIGGER_LOW);
131 set_irq_type(AU1500_GPIO203_INT, IRQF_TRIGGER_LOW);
132 set_irq_type(AU1500_GPIO205_INT, IRQF_TRIGGER_LOW);
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133
134 return 0;
135}
136arch_initcall(mtx1_init_irq);