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[MIPS] Convert init_thread initialization to ISO C initializers.
[net-next-2.6.git] / arch / mips / Makefile
CommitLineData
1da177e4
LT		 1#
2# This file is subject to the terms and conditions of the GNU General Public
3# License. See the file "COPYING" in the main directory of this archive
4# for more details.
5#
6# Copyright (C) 1994, 95, 96, 2003 by Ralf Baechle
7# DECStation modifications by Paul M. Antoine, 1996
8# Copyright (C) 2002, 2003, 2004 Maciej W. Rozycki
9#
10# This file is included by the global makefile so that you can add your own
11# architecture-specific flags and dependencies. Remember to do have actions
12# for "archclean" cleaning up for this architecture.
13#
14
1da177e4
LT		 15cflags-y :=
16
17#
18# Select the object file format to substitute into the linker script.
19#
20ifdef CONFIG_CPU_LITTLE_ENDIAN
2132bit-tool-prefix = mipsel-linux-
2264bit-tool-prefix = mips64el-linux-
2332bit-bfd = elf32-tradlittlemips
2464bit-bfd = elf64-tradlittlemips
2532bit-emul = elf32ltsmip
2664bit-emul = elf64ltsmip
27else
2832bit-tool-prefix = mips-linux-
2964bit-tool-prefix = mips64-linux-
3032bit-bfd = elf32-tradbigmips
3164bit-bfd = elf64-tradbigmips
3232bit-emul = elf32btsmip
3364bit-emul = elf64btsmip
34endif
35
875d43e7 36ifdef CONFIG_32BIT
1da177e4
LT		 37tool-prefix = $(32bit-tool-prefix)
38UTS_MACHINE := mips
39endif
875d43e7 40ifdef CONFIG_64BIT
1da177e4
LT		 41tool-prefix = $(64bit-tool-prefix)
42UTS_MACHINE := mips64
43endif
44
45ifdef CONFIG_CROSSCOMPILE
46CROSS_COMPILE := $(tool-prefix)
47endif
48
8145095c 49ifdef CONFIG_32BIT
1da177e4
LT		 50ld-emul = $(32bit-emul)
51vmlinux-32 = vmlinux
52vmlinux-64 = vmlinux.64
59b3e8e9
RB		 53
54cflags-y += -mabi=32
8145095c 55endif
1da177e4 56
8145095c 57ifdef CONFIG_64BIT
8145095c
RB		 58ld-emul = $(64bit-emul)
59vmlinux-32 = vmlinux.32
60vmlinux-64 = vmlinux
61
59b3e8e9
RB		 62cflags-y += -mabi=64
63ifdef CONFIG_BUILD_ELF64
8145095c 64cflags-y += $(call cc-option,-mno-explicit-relocs)
59b3e8e9 65else
656be92f 66cflags-y += $(call cc-option,-msym32)
59b3e8e9 67endif
1da177e4
LT		 68endif
69
59b3e8e9 70
1da177e4
LT		 71#
72# GCC uses -G 0 -mabicalls -fpic as default. We don't want PIC in the kernel
73# code since it only slows down the whole thing. At some point we might make
74# use of global pointer optimizations but their use of $28 conflicts with
75# the current pointer optimization.
76#
77# The DECStation requires an ECOFF kernel for remote booting, other MIPS
78# machines may also. Since BFD is incredibly buggy with respect to
79# crossformat linking we rely on the elf2ecoff tool for format conversion.
80#
1da177e4 81cflags-y += -G 0 -mno-abicalls -fno-pic -pipe
6218cf44 82cflags-y += -msoft-float
9f83d839 83LDFLAGS_vmlinux += -G 0 -static -n -nostdlib
1da177e4
LT		 84MODFLAGS += -mlong-calls
85
72fbfb26
RB		 86cflags-y += -ffreestanding
87
f425a6dc
TS		 88#
89# We explicitly add the endianness specifier if needed, this allows
90# to compile kernels with a toolchain for the other endianness. We
91# carefully avoid to add it redundantly because gcc 3.3/3.4 complains
92# when fed the toolchain default!
93#
f9405412 94# Certain gcc versions upto gcc 4.1.1 (probably 4.2-subversion as of
59c51591 95# 2006-10-10 don't properly change the predefined symbols if -EB / -EL
f9405412
RB		 96# are used, so we kludge that here. A bug has been filed at
97# http://gcc.gnu.org/bugzilla/show_bug.cgi?id=29413.
98#
99undef-all += -UMIPSEB -U_MIPSEB -U__MIPSEB -U__MIPSEB__
100undef-all += -UMIPSEL -U_MIPSEL -U__MIPSEL -U__MIPSEL__
101predef-be += -DMIPSEB -D_MIPSEB -D__MIPSEB -D__MIPSEB__
102predef-le += -DMIPSEL -D_MIPSEL -D__MIPSEL -D__MIPSEL__
103cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' && echo -EB $(undef-all) $(predef-be))
104cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' || echo -EL $(undef-all) $(predef-le))
f425a6dc 105
9693a853
FBH		 106cflags-$(CONFIG_CPU_HAS_SMARTMIPS) += $(call cc-option,-msmartmips)
107
9007c9a2
RB		 108cflags-$(CONFIG_SB1XXX_CORELIS) += $(call cc-option,-mno-sched-prolog) \
109 -fno-omit-frame-pointer
1da177e4 110
1da177e4
LT		 111#
112# CPU-dependent compiler/assembler options for optimization.
113#
59b3e8e9
RB		 114cflags-$(CONFIG_CPU_R3000) += -march=r3000
115cflags-$(CONFIG_CPU_TX39XX) += -march=r3900
116cflags-$(CONFIG_CPU_R6000) += -march=r6000 -Wa,--trap
117cflags-$(CONFIG_CPU_R4300) += -march=r4300 -Wa,--trap
118cflags-$(CONFIG_CPU_VR41XX) += -march=r4100 -Wa,--trap
119cflags-$(CONFIG_CPU_R4X00) += -march=r4600 -Wa,--trap
120cflags-$(CONFIG_CPU_TX49XX) += -march=r4600 -Wa,--trap
9200c0b2 121cflags-$(CONFIG_CPU_MIPS32_R1) += $(call cc-option,-march=mips32,-mips32 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
59b3e8e9 122 -Wa,-mips32 -Wa,--trap
9200c0b2 123cflags-$(CONFIG_CPU_MIPS32_R2) += $(call cc-option,-march=mips32r2,-mips32r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
59b3e8e9 124 -Wa,-mips32r2 -Wa,--trap
9200c0b2 125cflags-$(CONFIG_CPU_MIPS64_R1) += $(call cc-option,-march=mips64,-mips64 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) \
59b3e8e9 126 -Wa,-mips64 -Wa,--trap
9200c0b2 127cflags-$(CONFIG_CPU_MIPS64_R2) += $(call cc-option,-march=mips64r2,-mips64r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) \
59b3e8e9
RB		 128 -Wa,-mips64r2 -Wa,--trap
129cflags-$(CONFIG_CPU_R5000) += -march=r5000 -Wa,--trap
c9e321e0 130cflags-$(CONFIG_CPU_R5432) += $(call cc-option,-march=r5400,-march=r5000) \
1da177e4 131 -Wa,--trap
c9e321e0 132cflags-$(CONFIG_CPU_NEVADA) += $(call cc-option,-march=rm5200,-march=r5000) \
1da177e4 133 -Wa,--trap
59b3e8e9 134cflags-$(CONFIG_CPU_RM7000) += $(call cc-option,-march=rm7000,-march=r5000) \
1da177e4 135 -Wa,--trap
59b3e8e9 136cflags-$(CONFIG_CPU_RM9000) += $(call cc-option,-march=rm9000,-march=r5000) \
1da177e4 137 -Wa,--trap
59b3e8e9 138cflags-$(CONFIG_CPU_SB1) += $(call cc-option,-march=sb1,-march=r5000) \
1da177e4 139 -Wa,--trap
59b3e8e9
RB		 140cflags-$(CONFIG_CPU_R8000) += -march=r8000 -Wa,--trap
141cflags-$(CONFIG_CPU_R10000) += $(call cc-option,-march=r10000,-march=r8000) \
1da177e4
LT		 142 -Wa,--trap
143
144ifdef CONFIG_CPU_SB1
145ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
146MODFLAGS += -msb1-pass1-workarounds
147endif
148endif
149
150#
151# Firmware support
152#
153libs-$(CONFIG_ARC) += arch/mips/arc/
154libs-$(CONFIG_SIBYTE_CFE) += arch/mips/sibyte/cfe/
155
156#
157# Board-dependent options and extra files
158#
159
160#
161# Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
162#
163core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
164cflags-$(CONFIG_MACH_JAZZ) += -Iinclude/asm-mips/mach-jazz
165load-$(CONFIG_MACH_JAZZ) += 0xffffffff80080000
166
167#
168# Common Alchemy Au1x00 stuff
169#
170core-$(CONFIG_SOC_AU1X00) += arch/mips/au1000/common/
171cflags-$(CONFIG_SOC_AU1X00) += -Iinclude/asm-mips/mach-au1x00
172
173#
174# AMD Alchemy Pb1000 eval board
175#
176libs-$(CONFIG_MIPS_PB1000) += arch/mips/au1000/pb1000/
177cflags-$(CONFIG_MIPS_PB1000) += -Iinclude/asm-mips/mach-pb1x00
178load-$(CONFIG_MIPS_PB1000) += 0xffffffff80100000
179
180#
181# AMD Alchemy Pb1100 eval board
182#
183libs-$(CONFIG_MIPS_PB1100) += arch/mips/au1000/pb1100/
184cflags-$(CONFIG_MIPS_PB1100) += -Iinclude/asm-mips/mach-pb1x00
185load-$(CONFIG_MIPS_PB1100) += 0xffffffff80100000
186
187#
188# AMD Alchemy Pb1500 eval board
189#
190libs-$(CONFIG_MIPS_PB1500) += arch/mips/au1000/pb1500/
191cflags-$(CONFIG_MIPS_PB1500) += -Iinclude/asm-mips/mach-pb1x00
192load-$(CONFIG_MIPS_PB1500) += 0xffffffff80100000
193
194#
195# AMD Alchemy Pb1550 eval board
196#
197libs-$(CONFIG_MIPS_PB1550) += arch/mips/au1000/pb1550/
198cflags-$(CONFIG_MIPS_PB1550) += -Iinclude/asm-mips/mach-pb1x00
199load-$(CONFIG_MIPS_PB1550) += 0xffffffff80100000
200
e3ad1c23
PP		 201#
202# AMD Alchemy Pb1200 eval board
203#
204libs-$(CONFIG_MIPS_PB1200) += arch/mips/au1000/pb1200/
205cflags-$(CONFIG_MIPS_PB1200) += -Iinclude/asm-mips/mach-pb1x00
206load-$(CONFIG_MIPS_PB1200) += 0xffffffff80100000
207
1da177e4
LT		 208#
209# AMD Alchemy Db1000 eval board
210#
211libs-$(CONFIG_MIPS_DB1000) += arch/mips/au1000/db1x00/
212cflags-$(CONFIG_MIPS_DB1000) += -Iinclude/asm-mips/mach-db1x00
213load-$(CONFIG_MIPS_DB1000) += 0xffffffff80100000
214
215#
216# AMD Alchemy Db1100 eval board
217#
218libs-$(CONFIG_MIPS_DB1100) += arch/mips/au1000/db1x00/
219cflags-$(CONFIG_MIPS_DB1100) += -Iinclude/asm-mips/mach-db1x00
220load-$(CONFIG_MIPS_DB1100) += 0xffffffff80100000
221
222#
223# AMD Alchemy Db1500 eval board
224#
225libs-$(CONFIG_MIPS_DB1500) += arch/mips/au1000/db1x00/
226cflags-$(CONFIG_MIPS_DB1500) += -Iinclude/asm-mips/mach-db1x00
227load-$(CONFIG_MIPS_DB1500) += 0xffffffff80100000
228
229#
230# AMD Alchemy Db1550 eval board
231#
232libs-$(CONFIG_MIPS_DB1550) += arch/mips/au1000/db1x00/
233cflags-$(CONFIG_MIPS_DB1550) += -Iinclude/asm-mips/mach-db1x00
234load-$(CONFIG_MIPS_DB1550) += 0xffffffff80100000
235
e3ad1c23
PP		 236#
237# AMD Alchemy Db1200 eval board
238#
239libs-$(CONFIG_MIPS_DB1200) += arch/mips/au1000/pb1200/
240cflags-$(CONFIG_MIPS_DB1200) += -Iinclude/asm-mips/mach-db1x00
241load-$(CONFIG_MIPS_DB1200) += 0xffffffff80100000
242
1da177e4
LT		 243#
244# AMD Alchemy Bosporus eval board
245#
246libs-$(CONFIG_MIPS_BOSPORUS) += arch/mips/au1000/db1x00/
247cflags-$(CONFIG_MIPS_BOSPORUS) += -Iinclude/asm-mips/mach-db1x00
248load-$(CONFIG_MIPS_BOSPORUS) += 0xffffffff80100000
249
250#
251# AMD Alchemy Mirage eval board
252#
253libs-$(CONFIG_MIPS_MIRAGE) += arch/mips/au1000/db1x00/
254cflags-$(CONFIG_MIPS_MIRAGE) += -Iinclude/asm-mips/mach-db1x00
255load-$(CONFIG_MIPS_MIRAGE) += 0xffffffff80100000
256
257#
258# 4G-Systems eval board
259#
260libs-$(CONFIG_MIPS_MTX1) += arch/mips/au1000/mtx-1/
261load-$(CONFIG_MIPS_MTX1) += 0xffffffff80100000
262
263#
264# MyCable eval board
265#
266libs-$(CONFIG_MIPS_XXS1500) += arch/mips/au1000/xxs1500/
267load-$(CONFIG_MIPS_XXS1500) += 0xffffffff80100000
268
269#
270# Cobalt Server
271#
272core-$(CONFIG_MIPS_COBALT) += arch/mips/cobalt/
11ed6d5b 273cflags-$(CONFIG_MIPS_COBALT) += -Iinclude/asm-mips/mach-cobalt
1da177e4
LT		 274load-$(CONFIG_MIPS_COBALT) += 0xffffffff80080000
275
276#
277# DECstation family
278#
279core-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/
280cflags-$(CONFIG_MACH_DECSTATION)+= -Iinclude/asm-mips/mach-dec
281libs-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/prom/
282load-$(CONFIG_MACH_DECSTATION) += 0xffffffff80040000
283CLEAN_FILES += drivers/tc/lk201-map.c
284
a240a469
MZ		 285#
286# Wind River PPMC Board (4KC + GT64120)
287#
288core-$(CONFIG_WR_PPMC) += arch/mips/gt64120/wrppmc/
289cflags-$(CONFIG_WR_PPMC) += -Iinclude/asm-mips/mach-wrppmc
290load-$(CONFIG_WR_PPMC) += 0xffffffff80100000
291
1da177e4
LT		 292#
293# For all MIPS, Inc. eval boards
294#
295core-$(CONFIG_MIPS_BOARDS_GEN) += arch/mips/mips-boards/generic/
296
297#
298# MIPS Atlas board
299#
300core-$(CONFIG_MIPS_ATLAS) += arch/mips/mips-boards/atlas/
301cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-atlas
302cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-mips
303load-$(CONFIG_MIPS_ATLAS) += 0xffffffff80100000
304
305#
306# MIPS Malta board
307#
308core-$(CONFIG_MIPS_MALTA) += arch/mips/mips-boards/malta/
309cflags-$(CONFIG_MIPS_MALTA) += -Iinclude/asm-mips/mach-mips
310load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000
311
312#
313# MIPS SEAD board
314#
315core-$(CONFIG_MIPS_SEAD) += arch/mips/mips-boards/sead/
09f451bf 316cflags-$(CONFIG_MIPS_SEAD) += -Iinclude/asm-mips/mach-mips
1da177e4
LT		 317load-$(CONFIG_MIPS_SEAD) += 0xffffffff80100000
318
c78cbf49
RB		 319#
320# MIPS SIM
321#
f6e2373a 322core-$(CONFIG_MIPS_SIM) += arch/mips/mipssim/
c78cbf49
RB		 323cflags-$(CONFIG_MIPS_SIM) += -Iinclude/asm-mips/mach-sim
324load-$(CONFIG_MIPS_SIM) += 0x80100000
325
1da177e4
LT		 326#
327# Momentum Ocelot board
328#
329# The Ocelot setup.o must be linked early - it does the ioremap() for the
330# mips_io_port_base.
331#
332core-$(CONFIG_MOMENCO_OCELOT) += arch/mips/gt64120/common/ \
333 arch/mips/gt64120/momenco_ocelot/
334cflags-$(CONFIG_MOMENCO_OCELOT) += -Iinclude/asm-mips/mach-ocelot
335load-$(CONFIG_MOMENCO_OCELOT) += 0xffffffff80100000
336
1da177e4
LT		 337#
338# PMC-Sierra Yosemite
339#
340core-$(CONFIG_PMC_YOSEMITE) += arch/mips/pmc-sierra/yosemite/
341cflags-$(CONFIG_PMC_YOSEMITE) += -Iinclude/asm-mips/mach-yosemite
342load-$(CONFIG_PMC_YOSEMITE) += 0xffffffff80100000
343
14cd8015 344#
07119621
RB		 345# Qemu simulating MIPS32 4Kc
346#
347core-$(CONFIG_QEMU) += arch/mips/qemu/
348cflags-$(CONFIG_QEMU) += -Iinclude/asm-mips/mach-qemu
349load-$(CONFIG_QEMU) += 0xffffffff80010000
350
1da177e4
LT		 351#
352# Momentum Ocelot-3
353#
354core-$(CONFIG_MOMENCO_OCELOT_3) += arch/mips/momentum/ocelot_3/
355cflags-$(CONFIG_MOMENCO_OCELOT_3) += -Iinclude/asm-mips/mach-ocelot3
356load-$(CONFIG_MOMENCO_OCELOT_3) += 0xffffffff80100000
357
35189fad
RB		 358#
359# Basler eXcite
360#
361core-$(CONFIG_BASLER_EXCITE) += arch/mips/basler/excite/
362cflags-$(CONFIG_BASLER_EXCITE) += -Iinclude/asm-mips/mach-excite
363load-$(CONFIG_BASLER_EXCITE) += 0x80100000
364
1da177e4
LT		 365#
366# NEC DDB
367#
368core-$(CONFIG_DDB5XXX_COMMON) += arch/mips/ddb5xxx/common/
369
1da177e4
LT		 370#
371# NEC DDB Vrc-5477
372#
373core-$(CONFIG_DDB5477) += arch/mips/ddb5xxx/ddb5477/
374load-$(CONFIG_DDB5477) += 0xffffffff80100000
375
376core-$(CONFIG_LASAT) += arch/mips/lasat/
377cflags-$(CONFIG_LASAT) += -Iinclude/asm-mips/mach-lasat
378load-$(CONFIG_LASAT) += 0xffffffff80000000
379
1da177e4
LT		 380#
381# Common VR41xx
382#
383core-$(CONFIG_MACH_VR41XX) += arch/mips/vr41xx/common/
384cflags-$(CONFIG_MACH_VR41XX) += -Iinclude/asm-mips/mach-vr41xx
385
386#
387# NEC VR4133
388#
389core-$(CONFIG_NEC_CMBVR4133) += arch/mips/vr41xx/nec-cmbvr4133/
390load-$(CONFIG_NEC_CMBVR4133) += 0xffffffff80100000
391
392#
393# ZAO Networks Capcella (VR4131)
394#
1da177e4
LT		 395load-$(CONFIG_ZAO_CAPCELLA) += 0xffffffff80000000
396
397#
398# Victor MP-C303/304 (VR4122)
399#
1da177e4
LT		 400load-$(CONFIG_VICTOR_MPC30X) += 0xffffffff80001000
401
402#
403# IBM WorkPad z50 (VR4121)
404#
405core-$(CONFIG_IBM_WORKPAD) += arch/mips/vr41xx/ibm-workpad/
406load-$(CONFIG_IBM_WORKPAD) += 0xffffffff80004000
407
408#
409# CASIO CASSIPEIA E-55/65 (VR4111)
410#
411core-$(CONFIG_CASIO_E55) += arch/mips/vr41xx/casio-e55/
412load-$(CONFIG_CASIO_E55) += 0xffffffff80004000
413
414#
63b799f9 415# TANBAC VR4131 multichip module(TB0225) and TANBAC VR4131DIMM(TB0229) (VR4131)
1da177e4 416#
63b799f9 417load-$(CONFIG_TANBAC_TB022X) += 0xffffffff80000000
1da177e4 418
bdf21b18
PP		 419#
420# Common Philips PNX8550
421#
422core-$(CONFIG_SOC_PNX8550) += arch/mips/philips/pnx8550/common/
423cflags-$(CONFIG_SOC_PNX8550) += -Iinclude/asm-mips/mach-pnx8550
424
425#
426# Philips PNX8550 JBS board
427#
428libs-$(CONFIG_PNX8550_JBS) += arch/mips/philips/pnx8550/jbs/
429#cflags-$(CONFIG_PNX8550_JBS) += -Iinclude/asm-mips/mach-pnx8550
430load-$(CONFIG_PNX8550_JBS) += 0xffffffff80060000
431
f0647a52
VW		 432# Philips PNX8550 STB810 board
433#
434libs-$(CONFIG_PNX8550_STB810) += arch/mips/philips/pnx8550/stb810/
435load-$(CONFIG_PNX8550_STB810) += 0xffffffff80060000
436
355c471f 437# NEC EMMA2RH boards
438#
439core-$(CONFIG_EMMA2RH) += arch/mips/emma2rh/common/
440cflags-$(CONFIG_EMMA2RH) += -Iinclude/asm-mips/mach-emma2rh
441
442# NEC EMMA2RH Mark-eins
443core-$(CONFIG_MARKEINS) += arch/mips/emma2rh/markeins/
444load-$(CONFIG_MARKEINS) += 0xffffffff88100000
445
1da177e4
LT		 446#
447# SGI IP22 (Indy/Indigo2)
448#
449# Set the load address to >= 0xffffffff88069000 if you want to leave space for
450# symmon, 0xffffffff80002000 for production kernels. Note that the value must
451# be aligned to a multiple of the kernel stack size or the handling of the
452# current variable will break so for 64-bit kernels we have to raise the start
453# address by 8kb.
454#
455core-$(CONFIG_SGI_IP22) += arch/mips/sgi-ip22/
456cflags-$(CONFIG_SGI_IP22) += -Iinclude/asm-mips/mach-ip22
875d43e7 457ifdef CONFIG_32BIT
1da177e4
LT		 458load-$(CONFIG_SGI_IP22) += 0xffffffff88002000
459endif
875d43e7 460ifdef CONFIG_64BIT
1da177e4
LT		 461load-$(CONFIG_SGI_IP22) += 0xffffffff88004000
462endif
463
464#
465# SGI-IP27 (Origin200/2000)
466#
467# Set the load address to >= 0xc000000000300000 if you want to leave space for
468# symmon, 0xc00000000001c000 for production kernels. Note that the value must
469# be 16kb aligned or the handling of the current variable will break.
470#
471ifdef CONFIG_SGI_IP27
472core-$(CONFIG_SGI_IP27) += arch/mips/sgi-ip27/
473cflags-$(CONFIG_SGI_IP27) += -Iinclude/asm-mips/mach-ip27
1da177e4
LT		 474ifdef CONFIG_MAPPED_KERNEL
475load-$(CONFIG_SGI_IP27) += 0xc00000004001c000
476OBJCOPYFLAGS := --change-addresses=0x3fffffff80000000
477dataoffset-$(CONFIG_SGI_IP27) += 0x01000000
478else
479load-$(CONFIG_SGI_IP27) += 0xa80000000001c000
480OBJCOPYFLAGS := --change-addresses=0x57ffffff80000000
481endif
1da177e4
LT		 482endif
483
484#
485# SGI-IP32 (O2)
486#
487# Set the load address to >= 80069000 if you want to leave space for symmon,
488# 0xffffffff80004000 for production kernels. Note that the value must be aligned to
489# a multiple of the kernel stack size or the handling of the current variable
490# will break.
491#
492core-$(CONFIG_SGI_IP32) += arch/mips/sgi-ip32/
493cflags-$(CONFIG_SGI_IP32) += -Iinclude/asm-mips/mach-ip32
494load-$(CONFIG_SGI_IP32) += 0xffffffff80004000
495
496#
d619f38f 497# Sibyte SB1250/BCM1480 SOC
1da177e4
LT		 498#
499# This is a LIB so that it links at the end, and initcalls are later
500# the sequence; but it is built as an object so that modules don't get
501# removed (as happens, even if they have __initcall/module_init)
502#
503core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/sb1250/
d619f38f 504core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/common/
f137e463
AI		 505cflags-$(CONFIG_SIBYTE_BCM112X) += -Iinclude/asm-mips/mach-sibyte \
506 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
1da177e4
LT		 507
508core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/sb1250/
d619f38f 509core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/common/
f137e463
AI		 510cflags-$(CONFIG_SIBYTE_SB1250) += -Iinclude/asm-mips/mach-sibyte \
511 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
512
513core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/bcm1480/
d619f38f 514core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/common/
f137e463
AI		 515cflags-$(CONFIG_SIBYTE_BCM1x55) += -Iinclude/asm-mips/mach-sibyte \
516 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
517
518core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/bcm1480/
d619f38f 519core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/common/
f137e463
AI		 520cflags-$(CONFIG_SIBYTE_BCM1x80) += -Iinclude/asm-mips/mach-sibyte \
521 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
1da177e4
LT		 522
523#
524# Sibyte BCM91120x (Carmel) board
525# Sibyte BCM91120C (CRhine) board
526# Sibyte BCM91125C (CRhone) board
527# Sibyte BCM91125E (Rhone) board
528# Sibyte SWARM board
9a6dcea1 529# Sibyte BCM91x80 (BigSur) board
1da177e4
LT		 530#
531libs-$(CONFIG_SIBYTE_CARMEL) += arch/mips/sibyte/swarm/
532load-$(CONFIG_SIBYTE_CARMEL) := 0xffffffff80100000
533libs-$(CONFIG_SIBYTE_CRHINE) += arch/mips/sibyte/swarm/
534load-$(CONFIG_SIBYTE_CRHINE) := 0xffffffff80100000
535libs-$(CONFIG_SIBYTE_CRHONE) += arch/mips/sibyte/swarm/
536load-$(CONFIG_SIBYTE_CRHONE) := 0xffffffff80100000
537libs-$(CONFIG_SIBYTE_RHONE) += arch/mips/sibyte/swarm/
538load-$(CONFIG_SIBYTE_RHONE) := 0xffffffff80100000
539libs-$(CONFIG_SIBYTE_SENTOSA) += arch/mips/sibyte/swarm/
540load-$(CONFIG_SIBYTE_SENTOSA) := 0xffffffff80100000
541libs-$(CONFIG_SIBYTE_SWARM) += arch/mips/sibyte/swarm/
542load-$(CONFIG_SIBYTE_SWARM) := 0xffffffff80100000
9a6dcea1
AI		 543libs-$(CONFIG_SIBYTE_BIGSUR) += arch/mips/sibyte/swarm/
544load-$(CONFIG_SIBYTE_BIGSUR) := 0xffffffff80100000
1da177e4
LT		 545
546#
14b36af4 547# SNI RM
1da177e4 548#
14b36af4
TB		 549core-$(CONFIG_SNI_RM) += arch/mips/sni/
550cflags-$(CONFIG_SNI_RM) += -Iinclude/asm-mips/mach-rm
551load-$(CONFIG_SNI_RM) += 0xffffffff80600000
1da177e4
LT		 552
553#
554# Toshiba JMR-TX3927 board
555#
556core-$(CONFIG_TOSHIBA_JMR3927) += arch/mips/jmr3927/rbhma3100/ \
557 arch/mips/jmr3927/common/
5135b0cd 558cflags-$(CONFIG_TOSHIBA_JMR3927) += -Iinclude/asm-mips/mach-jmr3927
1da177e4
LT		 559load-$(CONFIG_TOSHIBA_JMR3927) += 0xffffffff80050000
560
561#
562# Toshiba RBTX4927 board or
563# Toshiba RBTX4937 board
564#
565core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/toshiba_rbtx4927/
566core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/common/
567load-$(CONFIG_TOSHIBA_RBTX4927) += 0xffffffff80020000
568
23fbee9d
RB		 569#
570# Toshiba RBTX4938 board
571#
572core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/toshiba_rbtx4938/
573core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/common/
574load-$(CONFIG_TOSHIBA_RBTX4938) += 0xffffffff80100000
575
1da177e4
LT		 576cflags-y += -Iinclude/asm-mips/mach-generic
577drivers-$(CONFIG_PCI) += arch/mips/pci/
578
875d43e7 579ifdef CONFIG_32BIT
1da177e4
LT		 580ifdef CONFIG_CPU_LITTLE_ENDIAN
581JIFFIES = jiffies_64
582else
583JIFFIES = jiffies_64 + 4
584endif
585else
586JIFFIES = jiffies_64
587endif
588
589AFLAGS += $(cflags-y)
590CFLAGS += $(cflags-y)
591
592LDFLAGS += -m $(ld-emul)
593
59b3e8e9
RB		 594ifdef CONFIG_MIPS
595CHECKFLAGS += $(shell $(CC) $(CFLAGS) -dM -E -xc /dev/null | \
48c35b2d 596 egrep -vw '__GNUC_(|MINOR_|PATCHLEVEL_)_' | \
2a2c3e45
AN		 597 sed -e 's/^\#define /-D/' -e "s/ /='/" -e "s/$$/'/")
598ifdef CONFIG_64BIT
599CHECKFLAGS += -m64
600endif
59b3e8e9
RB		 601endif
602
1da177e4
LT		 603OBJCOPYFLAGS += --remove-section=.reginfo
604
605#
606# Choosing incompatible machines durings configuration will result in
607# error messages during linking. Select a default linkscript if
608# none has been choosen above.
609#
610
611CPPFLAGS_vmlinux.lds := \
612 $(CFLAGS) \
613 -D"LOADADDR=$(load-y)" \
614 -D"JIFFIES=$(JIFFIES)" \
615 -D"DATAOFFSET=$(if $(dataoffset-y),$(dataoffset-y),0)"
616
617head-y := arch/mips/kernel/head.o arch/mips/kernel/init_task.o
618
619libs-y += arch/mips/lib/
1da177e4
LT		 620
621core-y += arch/mips/kernel/ arch/mips/mm/ arch/mips/math-emu/
622
623drivers-$(CONFIG_OPROFILE) += arch/mips/oprofile/
624
625ifdef CONFIG_LASAT
626rom.bin rom.sw: vmlinux
7c6b155f 627 $(Q)$(MAKE) $(build)=arch/mips/lasat/image $@
1da177e4
LT		 628endif
629
630#
631# Some machines like the Indy need 32-bit ELF binaries for booting purposes.
632# Other need ECOFF, so we build a 32-bit ELF binary for them which we then
633# convert to ECOFF using elf2ecoff.
634#
635vmlinux.32: vmlinux
636 $(OBJCOPY) -O $(32bit-bfd) $(OBJCOPYFLAGS) $< $@
637
638#
639# The 64-bit ELF tools are pretty broken so at this time we generate 64-bit
640# ELF files from 32-bit files by conversion.
641#
642vmlinux.64: vmlinux
643 $(OBJCOPY) -O $(64bit-bfd) $(OBJCOPYFLAGS) $< $@
644
645makeboot =$(Q)$(MAKE) $(build)=arch/mips/boot VMLINUX=$(vmlinux-32) $(1)
646
647ifdef CONFIG_BOOT_ELF32
648all: $(vmlinux-32)
649endif
650
651ifdef CONFIG_BOOT_ELF64
652all: $(vmlinux-64)
653endif
654
149f60b3
RB		 655ifdef CONFIG_MIPS_ATLAS
656all: vmlinux.srec
657endif
658
659ifdef CONFIG_MIPS_MALTA
660all: vmlinux.srec
661endif
662
663ifdef CONFIG_MIPS_SEAD
664all: vmlinux.srec
665endif
666
154b500b
RB		 667ifdef CONFIG_QEMU
668all: vmlinux.bin
669endif
670
14b36af4 671ifdef CONFIG_SNI_RM
1da177e4
LT		 672all: vmlinux.ecoff
673endif
674
154b500b
RB		 675vmlinux.bin: $(vmlinux-32)
676 +@$(call makeboot,$@)
677
b8828d3e 678vmlinux.ecoff: $(vmlinux-32)
1da177e4
LT		 679 +@$(call makeboot,$@)
680
681vmlinux.srec: $(vmlinux-32)
682 +@$(call makeboot,$@)
683
684CLEAN_FILES += vmlinux.ecoff \
b8828d3e 685 vmlinux.srec
1da177e4 686
e48ce6b8
AN		 687archprepare:
688ifdef CONFIG_MIPS32_N32
689 @echo ' Checking missing-syscalls for N32'
690 $(Q)$(MAKE) $(build)=. missing-syscalls EXTRA_CFLAGS="-mabi=n32"
691endif
692ifdef CONFIG_MIPS32_O32
693 @echo ' Checking missing-syscalls for O32'
694 $(Q)$(MAKE) $(build)=. missing-syscalls EXTRA_CFLAGS="-mabi=32"
695endif
696
1da177e4
LT		 697archclean:
698 @$(MAKE) $(clean)=arch/mips/boot
699 @$(MAKE) $(clean)=arch/mips/lasat
700
048eb582 701CLEAN_FILES += vmlinux.32 \
1da177e4
LT		 702 vmlinux.64 \
703 vmlinux.ecoff
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