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[PATCH] sched: disable preempt in idle tasks
[net-next-2.6.git] / arch / ia64 / kernel / process.c
CommitLineData
1da177e4
LT
1/*
2 * Architecture-specific setup.
3 *
4 * Copyright (C) 1998-2003 Hewlett-Packard Co
5 * David Mosberger-Tang <davidm@hpl.hp.com>
b8d8b883 6 * 04/11/17 Ashok Raj <ashok.raj@intel.com> Added CPU Hotplug Support
1da177e4
LT
7 */
8#define __KERNEL_SYSCALLS__ /* see <asm/unistd.h> */
9#include <linux/config.h>
10
11#include <linux/cpu.h>
12#include <linux/pm.h>
13#include <linux/elf.h>
14#include <linux/errno.h>
15#include <linux/kallsyms.h>
16#include <linux/kernel.h>
17#include <linux/mm.h>
18#include <linux/module.h>
19#include <linux/notifier.h>
20#include <linux/personality.h>
21#include <linux/sched.h>
22#include <linux/slab.h>
23#include <linux/smp_lock.h>
24#include <linux/stddef.h>
25#include <linux/thread_info.h>
26#include <linux/unistd.h>
27#include <linux/efi.h>
28#include <linux/interrupt.h>
29#include <linux/delay.h>
9508dbfe 30#include <linux/kprobes.h>
1da177e4
LT
31
32#include <asm/cpu.h>
33#include <asm/delay.h>
34#include <asm/elf.h>
35#include <asm/ia32.h>
36#include <asm/irq.h>
37#include <asm/pgalloc.h>
38#include <asm/processor.h>
39#include <asm/sal.h>
40#include <asm/tlbflush.h>
41#include <asm/uaccess.h>
42#include <asm/unwind.h>
43#include <asm/user.h>
44
45#include "entry.h"
46
47#ifdef CONFIG_PERFMON
48# include <asm/perfmon.h>
49#endif
50
51#include "sigframe.h"
52
53void (*ia64_mark_idle)(int);
7d5f9c0f 54static DEFINE_PER_CPU(unsigned int, cpu_idle_state);
1da177e4
LT
55
56unsigned long boot_option_idle_override = 0;
57EXPORT_SYMBOL(boot_option_idle_override);
58
59void
60ia64_do_show_stack (struct unw_frame_info *info, void *arg)
61{
62 unsigned long ip, sp, bsp;
63 char buf[128]; /* don't make it so big that it overflows the stack! */
64
65 printk("\nCall Trace:\n");
66 do {
67 unw_get_ip(info, &ip);
68 if (ip == 0)
69 break;
70
71 unw_get_sp(info, &sp);
72 unw_get_bsp(info, &bsp);
73 snprintf(buf, sizeof(buf),
74 " [<%016lx>] %%s\n"
75 " sp=%016lx bsp=%016lx\n",
76 ip, sp, bsp);
77 print_symbol(buf, ip);
78 } while (unw_unwind(info) >= 0);
79}
80
81void
82show_stack (struct task_struct *task, unsigned long *sp)
83{
84 if (!task)
85 unw_init_running(ia64_do_show_stack, NULL);
86 else {
87 struct unw_frame_info info;
88
89 unw_init_from_blocked_task(&info, task);
90 ia64_do_show_stack(&info, NULL);
91 }
92}
93
94void
95dump_stack (void)
96{
97 show_stack(NULL, NULL);
98}
99
100EXPORT_SYMBOL(dump_stack);
101
102void
103show_regs (struct pt_regs *regs)
104{
105 unsigned long ip = regs->cr_iip + ia64_psr(regs)->ri;
106
107 print_modules();
108 printk("\nPid: %d, CPU %d, comm: %20s\n", current->pid, smp_processor_id(), current->comm);
109 printk("psr : %016lx ifs : %016lx ip : [<%016lx>] %s\n",
110 regs->cr_ipsr, regs->cr_ifs, ip, print_tainted());
111 print_symbol("ip is at %s\n", ip);
112 printk("unat: %016lx pfs : %016lx rsc : %016lx\n",
113 regs->ar_unat, regs->ar_pfs, regs->ar_rsc);
114 printk("rnat: %016lx bsps: %016lx pr : %016lx\n",
115 regs->ar_rnat, regs->ar_bspstore, regs->pr);
116 printk("ldrs: %016lx ccv : %016lx fpsr: %016lx\n",
117 regs->loadrs, regs->ar_ccv, regs->ar_fpsr);
118 printk("csd : %016lx ssd : %016lx\n", regs->ar_csd, regs->ar_ssd);
119 printk("b0 : %016lx b6 : %016lx b7 : %016lx\n", regs->b0, regs->b6, regs->b7);
120 printk("f6 : %05lx%016lx f7 : %05lx%016lx\n",
121 regs->f6.u.bits[1], regs->f6.u.bits[0],
122 regs->f7.u.bits[1], regs->f7.u.bits[0]);
123 printk("f8 : %05lx%016lx f9 : %05lx%016lx\n",
124 regs->f8.u.bits[1], regs->f8.u.bits[0],
125 regs->f9.u.bits[1], regs->f9.u.bits[0]);
126 printk("f10 : %05lx%016lx f11 : %05lx%016lx\n",
127 regs->f10.u.bits[1], regs->f10.u.bits[0],
128 regs->f11.u.bits[1], regs->f11.u.bits[0]);
129
130 printk("r1 : %016lx r2 : %016lx r3 : %016lx\n", regs->r1, regs->r2, regs->r3);
131 printk("r8 : %016lx r9 : %016lx r10 : %016lx\n", regs->r8, regs->r9, regs->r10);
132 printk("r11 : %016lx r12 : %016lx r13 : %016lx\n", regs->r11, regs->r12, regs->r13);
133 printk("r14 : %016lx r15 : %016lx r16 : %016lx\n", regs->r14, regs->r15, regs->r16);
134 printk("r17 : %016lx r18 : %016lx r19 : %016lx\n", regs->r17, regs->r18, regs->r19);
135 printk("r20 : %016lx r21 : %016lx r22 : %016lx\n", regs->r20, regs->r21, regs->r22);
136 printk("r23 : %016lx r24 : %016lx r25 : %016lx\n", regs->r23, regs->r24, regs->r25);
137 printk("r26 : %016lx r27 : %016lx r28 : %016lx\n", regs->r26, regs->r27, regs->r28);
138 printk("r29 : %016lx r30 : %016lx r31 : %016lx\n", regs->r29, regs->r30, regs->r31);
139
140 if (user_mode(regs)) {
141 /* print the stacked registers */
142 unsigned long val, *bsp, ndirty;
143 int i, sof, is_nat = 0;
144
145 sof = regs->cr_ifs & 0x7f; /* size of frame */
146 ndirty = (regs->loadrs >> 19);
147 bsp = ia64_rse_skip_regs((unsigned long *) regs->ar_bspstore, ndirty);
148 for (i = 0; i < sof; ++i) {
149 get_user(val, (unsigned long __user *) ia64_rse_skip_regs(bsp, i));
150 printk("r%-3u:%c%016lx%s", 32 + i, is_nat ? '*' : ' ', val,
151 ((i == sof - 1) || (i % 3) == 2) ? "\n" : " ");
152 }
153 } else
154 show_stack(NULL, NULL);
155}
156
157void
158do_notify_resume_user (sigset_t *oldset, struct sigscratch *scr, long in_syscall)
159{
160 if (fsys_mode(current, &scr->pt)) {
161 /* defer signal-handling etc. until we return to privilege-level 0. */
162 if (!ia64_psr(&scr->pt)->lp)
163 ia64_psr(&scr->pt)->lp = 1;
164 return;
165 }
166
167#ifdef CONFIG_PERFMON
168 if (current->thread.pfm_needs_checking)
169 pfm_handle_work();
170#endif
171
172 /* deal with pending signal delivery */
173 if (test_thread_flag(TIF_SIGPENDING))
174 ia64_do_signal(oldset, scr, in_syscall);
175}
176
8df5a500
SE
177static int pal_halt = 1;
178static int can_do_pal_halt = 1;
179
1da177e4
LT
180static int __init nohalt_setup(char * str)
181{
fb573856 182 pal_halt = can_do_pal_halt = 0;
1da177e4
LT
183 return 1;
184}
185__setup("nohalt", nohalt_setup);
186
a71f62ed 187void
8df5a500
SE
188update_pal_halt_status(int status)
189{
190 can_do_pal_halt = pal_halt && status;
191}
192
1da177e4
LT
193/*
194 * We use this if we don't have any better idle routine..
195 */
196void
197default_idle (void)
198{
6c4fa560 199 local_irq_enable();
1da177e4 200 while (!need_resched())
8df5a500 201 if (can_do_pal_halt)
1da177e4
LT
202 safe_halt();
203 else
204 cpu_relax();
205}
206
207#ifdef CONFIG_HOTPLUG_CPU
208/* We don't actually take CPU down, just spin without interrupts. */
209static inline void play_dead(void)
210{
211 extern void ia64_cpu_local_tick (void);
b8d8b883
AR
212 unsigned int this_cpu = smp_processor_id();
213
1da177e4
LT
214 /* Ack it */
215 __get_cpu_var(cpu_state) = CPU_DEAD;
216
1da177e4
LT
217 max_xtp();
218 local_irq_disable();
b8d8b883
AR
219 idle_task_exit();
220 ia64_jump_to_sal(&sal_boot_rendez_state[this_cpu]);
1da177e4 221 /*
b8d8b883
AR
222 * The above is a point of no-return, the processor is
223 * expected to be in SAL loop now.
1da177e4 224 */
b8d8b883 225 BUG();
1da177e4
LT
226}
227#else
228static inline void play_dead(void)
229{
230 BUG();
231}
232#endif /* CONFIG_HOTPLUG_CPU */
233
1da177e4
LT
234void cpu_idle_wait(void)
235{
7d5f9c0f
ZM
236 unsigned int cpu, this_cpu = get_cpu();
237 cpumask_t map;
238
239 set_cpus_allowed(current, cpumask_of_cpu(this_cpu));
240 put_cpu();
1da177e4 241
7d5f9c0f
ZM
242 cpus_clear(map);
243 for_each_online_cpu(cpu) {
244 per_cpu(cpu_idle_state, cpu) = 1;
245 cpu_set(cpu, map);
246 }
1da177e4 247
7d5f9c0f
ZM
248 __get_cpu_var(cpu_idle_state) = 0;
249
250 wmb();
251 do {
252 ssleep(1);
253 for_each_online_cpu(cpu) {
254 if (cpu_isset(cpu, map) && !per_cpu(cpu_idle_state, cpu))
255 cpu_clear(cpu, map);
256 }
257 cpus_and(map, map, cpu_online_map);
258 } while (!cpus_empty(map));
1da177e4
LT
259}
260EXPORT_SYMBOL_GPL(cpu_idle_wait);
261
262void __attribute__((noreturn))
263cpu_idle (void)
264{
265 void (*mark_idle)(int) = ia64_mark_idle;
1da177e4
LT
266
267 /* endless idle loop with no priority at all */
268 while (1) {
269#ifdef CONFIG_SMP
270 if (!need_resched())
271 min_xtp();
272#endif
273 while (!need_resched()) {
274 void (*idle)(void);
275
7d5f9c0f
ZM
276 if (__get_cpu_var(cpu_idle_state))
277 __get_cpu_var(cpu_idle_state) = 0;
278
279 rmb();
1da177e4
LT
280 if (mark_idle)
281 (*mark_idle)(1);
282
1da177e4
LT
283 idle = pm_idle;
284 if (!idle)
285 idle = default_idle;
286 (*idle)();
287 }
288
289 if (mark_idle)
290 (*mark_idle)(0);
291
292#ifdef CONFIG_SMP
293 normal_xtp();
294#endif
5bfb5d69 295 preempt_enable_no_resched();
1da177e4 296 schedule();
5bfb5d69 297 preempt_disable();
1da177e4
LT
298 check_pgt_cache();
299 if (cpu_is_offline(smp_processor_id()))
300 play_dead();
301 }
302}
303
304void
305ia64_save_extra (struct task_struct *task)
306{
307#ifdef CONFIG_PERFMON
308 unsigned long info;
309#endif
310
311 if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0)
312 ia64_save_debug_regs(&task->thread.dbr[0]);
313
314#ifdef CONFIG_PERFMON
315 if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0)
316 pfm_save_regs(task);
317
318 info = __get_cpu_var(pfm_syst_info);
319 if (info & PFM_CPUINFO_SYST_WIDE)
320 pfm_syst_wide_update_task(task, info, 0);
321#endif
322
323#ifdef CONFIG_IA32_SUPPORT
324 if (IS_IA32_PROCESS(ia64_task_regs(task)))
325 ia32_save_state(task);
326#endif
327}
328
329void
330ia64_load_extra (struct task_struct *task)
331{
332#ifdef CONFIG_PERFMON
333 unsigned long info;
334#endif
335
336 if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0)
337 ia64_load_debug_regs(&task->thread.dbr[0]);
338
339#ifdef CONFIG_PERFMON
340 if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0)
341 pfm_load_regs(task);
342
343 info = __get_cpu_var(pfm_syst_info);
344 if (info & PFM_CPUINFO_SYST_WIDE)
345 pfm_syst_wide_update_task(task, info, 1);
346#endif
347
348#ifdef CONFIG_IA32_SUPPORT
349 if (IS_IA32_PROCESS(ia64_task_regs(task)))
350 ia32_load_state(task);
351#endif
352}
353
354/*
355 * Copy the state of an ia-64 thread.
356 *
357 * We get here through the following call chain:
358 *
359 * from user-level: from kernel:
360 *
361 * <clone syscall> <some kernel call frames>
362 * sys_clone :
363 * do_fork do_fork
364 * copy_thread copy_thread
365 *
366 * This means that the stack layout is as follows:
367 *
368 * +---------------------+ (highest addr)
369 * | struct pt_regs |
370 * +---------------------+
371 * | struct switch_stack |
372 * +---------------------+
373 * | |
374 * | memory stack |
375 * | | <-- sp (lowest addr)
376 * +---------------------+
377 *
378 * Observe that we copy the unat values that are in pt_regs and switch_stack. Spilling an
379 * integer to address X causes bit N in ar.unat to be set to the NaT bit of the register,
380 * with N=(X & 0x1ff)/8. Thus, copying the unat value preserves the NaT bits ONLY if the
381 * pt_regs structure in the parent is congruent to that of the child, modulo 512. Since
382 * the stack is page aligned and the page size is at least 4KB, this is always the case,
383 * so there is nothing to worry about.
384 */
385int
386copy_thread (int nr, unsigned long clone_flags,
387 unsigned long user_stack_base, unsigned long user_stack_size,
388 struct task_struct *p, struct pt_regs *regs)
389{
390 extern char ia64_ret_from_clone, ia32_ret_from_clone;
391 struct switch_stack *child_stack, *stack;
392 unsigned long rbs, child_rbs, rbs_size;
393 struct pt_regs *child_ptregs;
394 int retval = 0;
395
396#ifdef CONFIG_SMP
397 /*
398 * For SMP idle threads, fork_by_hand() calls do_fork with
399 * NULL regs.
400 */
401 if (!regs)
402 return 0;
403#endif
404
405 stack = ((struct switch_stack *) regs) - 1;
406
407 child_ptregs = (struct pt_regs *) ((unsigned long) p + IA64_STK_OFFSET) - 1;
408 child_stack = (struct switch_stack *) child_ptregs - 1;
409
410 /* copy parent's switch_stack & pt_regs to child: */
411 memcpy(child_stack, stack, sizeof(*child_ptregs) + sizeof(*child_stack));
412
413 rbs = (unsigned long) current + IA64_RBS_OFFSET;
414 child_rbs = (unsigned long) p + IA64_RBS_OFFSET;
415 rbs_size = stack->ar_bspstore - rbs;
416
417 /* copy the parent's register backing store to the child: */
418 memcpy((void *) child_rbs, (void *) rbs, rbs_size);
419
420 if (likely(user_mode(child_ptregs))) {
421 if ((clone_flags & CLONE_SETTLS) && !IS_IA32_PROCESS(regs))
422 child_ptregs->r13 = regs->r16; /* see sys_clone2() in entry.S */
423 if (user_stack_base) {
424 child_ptregs->r12 = user_stack_base + user_stack_size - 16;
425 child_ptregs->ar_bspstore = user_stack_base;
426 child_ptregs->ar_rnat = 0;
427 child_ptregs->loadrs = 0;
428 }
429 } else {
430 /*
431 * Note: we simply preserve the relative position of
432 * the stack pointer here. There is no need to
433 * allocate a scratch area here, since that will have
434 * been taken care of by the caller of sys_clone()
435 * already.
436 */
437 child_ptregs->r12 = (unsigned long) child_ptregs - 16; /* kernel sp */
438 child_ptregs->r13 = (unsigned long) p; /* set `current' pointer */
439 }
440 child_stack->ar_bspstore = child_rbs + rbs_size;
441 if (IS_IA32_PROCESS(regs))
442 child_stack->b0 = (unsigned long) &ia32_ret_from_clone;
443 else
444 child_stack->b0 = (unsigned long) &ia64_ret_from_clone;
445
446 /* copy parts of thread_struct: */
447 p->thread.ksp = (unsigned long) child_stack - 16;
448
449 /* stop some PSR bits from being inherited.
450 * the psr.up/psr.pp bits must be cleared on fork but inherited on execve()
451 * therefore we must specify them explicitly here and not include them in
452 * IA64_PSR_BITS_TO_CLEAR.
453 */
454 child_ptregs->cr_ipsr = ((child_ptregs->cr_ipsr | IA64_PSR_BITS_TO_SET)
455 & ~(IA64_PSR_BITS_TO_CLEAR | IA64_PSR_PP | IA64_PSR_UP));
456
457 /*
458 * NOTE: The calling convention considers all floating point
459 * registers in the high partition (fph) to be scratch. Since
460 * the only way to get to this point is through a system call,
461 * we know that the values in fph are all dead. Hence, there
462 * is no need to inherit the fph state from the parent to the
463 * child and all we have to do is to make sure that
464 * IA64_THREAD_FPH_VALID is cleared in the child.
465 *
466 * XXX We could push this optimization a bit further by
467 * clearing IA64_THREAD_FPH_VALID on ANY system call.
468 * However, it's not clear this is worth doing. Also, it
469 * would be a slight deviation from the normal Linux system
470 * call behavior where scratch registers are preserved across
471 * system calls (unless used by the system call itself).
472 */
473# define THREAD_FLAGS_TO_CLEAR (IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID \
474 | IA64_THREAD_PM_VALID)
475# define THREAD_FLAGS_TO_SET 0
476 p->thread.flags = ((current->thread.flags & ~THREAD_FLAGS_TO_CLEAR)
477 | THREAD_FLAGS_TO_SET);
478 ia64_drop_fpu(p); /* don't pick up stale state from a CPU's fph */
479#ifdef CONFIG_IA32_SUPPORT
480 /*
481 * If we're cloning an IA32 task then save the IA32 extra
482 * state from the current task to the new task
483 */
484 if (IS_IA32_PROCESS(ia64_task_regs(current))) {
485 ia32_save_state(p);
486 if (clone_flags & CLONE_SETTLS)
487 retval = ia32_clone_tls(p, child_ptregs);
488
489 /* Copy partially mapped page list */
490 if (!retval)
491 retval = ia32_copy_partial_page_list(p, clone_flags);
492 }
493#endif
494
495#ifdef CONFIG_PERFMON
496 if (current->thread.pfm_context)
497 pfm_inherit(p, child_ptregs);
498#endif
499 return retval;
500}
501
502static void
503do_copy_task_regs (struct task_struct *task, struct unw_frame_info *info, void *arg)
504{
505 unsigned long mask, sp, nat_bits = 0, ip, ar_rnat, urbs_end, cfm;
506 elf_greg_t *dst = arg;
507 struct pt_regs *pt;
508 char nat;
509 int i;
510
511 memset(dst, 0, sizeof(elf_gregset_t)); /* don't leak any kernel bits to user-level */
512
513 if (unw_unwind_to_user(info) < 0)
514 return;
515
516 unw_get_sp(info, &sp);
517 pt = (struct pt_regs *) (sp + 16);
518
519 urbs_end = ia64_get_user_rbs_end(task, pt, &cfm);
520
521 if (ia64_sync_user_rbs(task, info->sw, pt->ar_bspstore, urbs_end) < 0)
522 return;
523
524 ia64_peek(task, info->sw, urbs_end, (long) ia64_rse_rnat_addr((long *) urbs_end),
525 &ar_rnat);
526
527 /*
528 * coredump format:
529 * r0-r31
530 * NaT bits (for r0-r31; bit N == 1 iff rN is a NaT)
531 * predicate registers (p0-p63)
532 * b0-b7
533 * ip cfm user-mask
534 * ar.rsc ar.bsp ar.bspstore ar.rnat
535 * ar.ccv ar.unat ar.fpsr ar.pfs ar.lc ar.ec
536 */
537
538 /* r0 is zero */
539 for (i = 1, mask = (1UL << i); i < 32; ++i) {
540 unw_get_gr(info, i, &dst[i], &nat);
541 if (nat)
542 nat_bits |= mask;
543 mask <<= 1;
544 }
545 dst[32] = nat_bits;
546 unw_get_pr(info, &dst[33]);
547
548 for (i = 0; i < 8; ++i)
549 unw_get_br(info, i, &dst[34 + i]);
550
551 unw_get_rp(info, &ip);
552 dst[42] = ip + ia64_psr(pt)->ri;
553 dst[43] = cfm;
554 dst[44] = pt->cr_ipsr & IA64_PSR_UM;
555
556 unw_get_ar(info, UNW_AR_RSC, &dst[45]);
557 /*
558 * For bsp and bspstore, unw_get_ar() would return the kernel
559 * addresses, but we need the user-level addresses instead:
560 */
561 dst[46] = urbs_end; /* note: by convention PT_AR_BSP points to the end of the urbs! */
562 dst[47] = pt->ar_bspstore;
563 dst[48] = ar_rnat;
564 unw_get_ar(info, UNW_AR_CCV, &dst[49]);
565 unw_get_ar(info, UNW_AR_UNAT, &dst[50]);
566 unw_get_ar(info, UNW_AR_FPSR, &dst[51]);
567 dst[52] = pt->ar_pfs; /* UNW_AR_PFS is == to pt->cr_ifs for interrupt frames */
568 unw_get_ar(info, UNW_AR_LC, &dst[53]);
569 unw_get_ar(info, UNW_AR_EC, &dst[54]);
570 unw_get_ar(info, UNW_AR_CSD, &dst[55]);
571 unw_get_ar(info, UNW_AR_SSD, &dst[56]);
572}
573
574void
575do_dump_task_fpu (struct task_struct *task, struct unw_frame_info *info, void *arg)
576{
577 elf_fpreg_t *dst = arg;
578 int i;
579
580 memset(dst, 0, sizeof(elf_fpregset_t)); /* don't leak any "random" bits */
581
582 if (unw_unwind_to_user(info) < 0)
583 return;
584
585 /* f0 is 0.0, f1 is 1.0 */
586
587 for (i = 2; i < 32; ++i)
588 unw_get_fr(info, i, dst + i);
589
590 ia64_flush_fph(task);
591 if ((task->thread.flags & IA64_THREAD_FPH_VALID) != 0)
592 memcpy(dst + 32, task->thread.fph, 96*16);
593}
594
595void
596do_copy_regs (struct unw_frame_info *info, void *arg)
597{
598 do_copy_task_regs(current, info, arg);
599}
600
601void
602do_dump_fpu (struct unw_frame_info *info, void *arg)
603{
604 do_dump_task_fpu(current, info, arg);
605}
606
607int
608dump_task_regs(struct task_struct *task, elf_gregset_t *regs)
609{
610 struct unw_frame_info tcore_info;
611
612 if (current == task) {
613 unw_init_running(do_copy_regs, regs);
614 } else {
615 memset(&tcore_info, 0, sizeof(tcore_info));
616 unw_init_from_blocked_task(&tcore_info, task);
617 do_copy_task_regs(task, &tcore_info, regs);
618 }
619 return 1;
620}
621
622void
623ia64_elf_core_copy_regs (struct pt_regs *pt, elf_gregset_t dst)
624{
625 unw_init_running(do_copy_regs, dst);
626}
627
628int
629dump_task_fpu (struct task_struct *task, elf_fpregset_t *dst)
630{
631 struct unw_frame_info tcore_info;
632
633 if (current == task) {
634 unw_init_running(do_dump_fpu, dst);
635 } else {
636 memset(&tcore_info, 0, sizeof(tcore_info));
637 unw_init_from_blocked_task(&tcore_info, task);
638 do_dump_task_fpu(task, &tcore_info, dst);
639 }
640 return 1;
641}
642
643int
644dump_fpu (struct pt_regs *pt, elf_fpregset_t dst)
645{
646 unw_init_running(do_dump_fpu, dst);
647 return 1; /* f0-f31 are always valid so we always return 1 */
648}
649
650long
651sys_execve (char __user *filename, char __user * __user *argv, char __user * __user *envp,
652 struct pt_regs *regs)
653{
654 char *fname;
655 int error;
656
657 fname = getname(filename);
658 error = PTR_ERR(fname);
659 if (IS_ERR(fname))
660 goto out;
661 error = do_execve(fname, argv, envp, regs);
662 putname(fname);
663out:
664 return error;
665}
666
667pid_t
668kernel_thread (int (*fn)(void *), void *arg, unsigned long flags)
669{
670 extern void start_kernel_thread (void);
671 unsigned long *helper_fptr = (unsigned long *) &start_kernel_thread;
672 struct {
673 struct switch_stack sw;
674 struct pt_regs pt;
675 } regs;
676
677 memset(&regs, 0, sizeof(regs));
678 regs.pt.cr_iip = helper_fptr[0]; /* set entry point (IP) */
679 regs.pt.r1 = helper_fptr[1]; /* set GP */
680 regs.pt.r9 = (unsigned long) fn; /* 1st argument */
681 regs.pt.r11 = (unsigned long) arg; /* 2nd argument */
682 /* Preserve PSR bits, except for bits 32-34 and 37-45, which we can't read. */
683 regs.pt.cr_ipsr = ia64_getreg(_IA64_REG_PSR) | IA64_PSR_BN;
684 regs.pt.cr_ifs = 1UL << 63; /* mark as valid, empty frame */
685 regs.sw.ar_fpsr = regs.pt.ar_fpsr = ia64_getreg(_IA64_REG_AR_FPSR);
686 regs.sw.ar_bspstore = (unsigned long) current + IA64_RBS_OFFSET;
687 regs.sw.pr = (1 << PRED_KERNEL_STACK);
688 return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, &regs.pt, 0, NULL, NULL);
689}
690EXPORT_SYMBOL(kernel_thread);
691
692/* This gets called from kernel_thread() via ia64_invoke_thread_helper(). */
693int
694kernel_thread_helper (int (*fn)(void *), void *arg)
695{
696#ifdef CONFIG_IA32_SUPPORT
697 if (IS_IA32_PROCESS(ia64_task_regs(current))) {
698 /* A kernel thread is always a 64-bit process. */
699 current->thread.map_base = DEFAULT_MAP_BASE;
700 current->thread.task_size = DEFAULT_TASK_SIZE;
701 ia64_set_kr(IA64_KR_IO_BASE, current->thread.old_iob);
702 ia64_set_kr(IA64_KR_TSSD, current->thread.old_k1);
703 }
704#endif
705 return (*fn)(arg);
706}
707
708/*
709 * Flush thread state. This is called when a thread does an execve().
710 */
711void
712flush_thread (void)
713{
9508dbfe
RL
714 /*
715 * Remove function-return probe instances associated with this task
716 * and put them back on the free list. Do not insert an exit probe for
717 * this function, it will be disabled by kprobe_flush_task if you do.
718 */
719 kprobe_flush_task(current);
720
1da177e4
LT
721 /* drop floating-point and debug-register state if it exists: */
722 current->thread.flags &= ~(IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID);
723 ia64_drop_fpu(current);
724 if (IS_IA32_PROCESS(ia64_task_regs(current)))
725 ia32_drop_partial_page_list(current);
726}
727
728/*
729 * Clean up state associated with current thread. This is called when
730 * the thread calls exit().
731 */
732void
733exit_thread (void)
734{
9508dbfe
RL
735
736 /*
737 * Remove function-return probe instances associated with this task
738 * and put them back on the free list. Do not insert an exit probe for
739 * this function, it will be disabled by kprobe_flush_task if you do.
740 */
741 kprobe_flush_task(current);
742
1da177e4
LT
743 ia64_drop_fpu(current);
744#ifdef CONFIG_PERFMON
745 /* if needed, stop monitoring and flush state to perfmon context */
746 if (current->thread.pfm_context)
747 pfm_exit_thread(current);
748
749 /* free debug register resources */
750 if (current->thread.flags & IA64_THREAD_DBG_VALID)
751 pfm_release_debug_registers(current);
752#endif
753 if (IS_IA32_PROCESS(ia64_task_regs(current)))
754 ia32_drop_partial_page_list(current);
755}
756
757unsigned long
758get_wchan (struct task_struct *p)
759{
760 struct unw_frame_info info;
761 unsigned long ip;
762 int count = 0;
763
764 /*
765 * Note: p may not be a blocked task (it could be current or
766 * another process running on some other CPU. Rather than
767 * trying to determine if p is really blocked, we just assume
768 * it's blocked and rely on the unwind routines to fail
769 * gracefully if the process wasn't really blocked after all.
770 * --davidm 99/12/15
771 */
772 unw_init_from_blocked_task(&info, p);
773 do {
774 if (unw_unwind(&info) < 0)
775 return 0;
776 unw_get_ip(&info, &ip);
777 if (!in_sched_functions(ip))
778 return ip;
779 } while (count++ < 16);
780 return 0;
781}
782
783void
784cpu_halt (void)
785{
786 pal_power_mgmt_info_u_t power_info[8];
787 unsigned long min_power;
788 int i, min_power_state;
789
790 if (ia64_pal_halt_info(power_info) != 0)
791 return;
792
793 min_power_state = 0;
794 min_power = power_info[0].pal_power_mgmt_info_s.power_consumption;
795 for (i = 1; i < 8; ++i)
796 if (power_info[i].pal_power_mgmt_info_s.im
797 && power_info[i].pal_power_mgmt_info_s.power_consumption < min_power) {
798 min_power = power_info[i].pal_power_mgmt_info_s.power_consumption;
799 min_power_state = i;
800 }
801
802 while (1)
803 ia64_pal_halt(min_power_state);
804}
805
806void
807machine_restart (char *restart_cmd)
808{
809 (*efi.reset_system)(EFI_RESET_WARM, 0, 0, NULL);
810}
811
1da177e4
LT
812void
813machine_halt (void)
814{
815 cpu_halt();
816}
817
1da177e4
LT
818void
819machine_power_off (void)
820{
821 if (pm_power_off)
822 pm_power_off();
823 machine_halt();
824}
825