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[IA64] Synchronize kernel RSE to user-space and back
[net-next-2.6.git] / arch / ia64 / kernel / process.c
CommitLineData
1da177e4
LT
1/*
2 * Architecture-specific setup.
3 *
4 * Copyright (C) 1998-2003 Hewlett-Packard Co
5 * David Mosberger-Tang <davidm@hpl.hp.com>
b8d8b883 6 * 04/11/17 Ashok Raj <ashok.raj@intel.com> Added CPU Hotplug Support
9138d581
KO
7 *
8 * 2005-10-07 Keith Owens <kaos@sgi.com>
9 * Add notify_die() hooks.
1da177e4 10 */
1da177e4
LT
11#include <linux/cpu.h>
12#include <linux/pm.h>
13#include <linux/elf.h>
14#include <linux/errno.h>
15#include <linux/kallsyms.h>
16#include <linux/kernel.h>
17#include <linux/mm.h>
18#include <linux/module.h>
19#include <linux/notifier.h>
20#include <linux/personality.h>
21#include <linux/sched.h>
22#include <linux/slab.h>
1da177e4
LT
23#include <linux/stddef.h>
24#include <linux/thread_info.h>
25#include <linux/unistd.h>
26#include <linux/efi.h>
27#include <linux/interrupt.h>
28#include <linux/delay.h>
1eeb66a1 29#include <linux/kdebug.h>
ee211b37 30#include <linux/utsname.h>
1da177e4
LT
31
32#include <asm/cpu.h>
33#include <asm/delay.h>
34#include <asm/elf.h>
35#include <asm/ia32.h>
36#include <asm/irq.h>
c237508a 37#include <asm/kexec.h>
1da177e4
LT
38#include <asm/pgalloc.h>
39#include <asm/processor.h>
40#include <asm/sal.h>
41#include <asm/tlbflush.h>
42#include <asm/uaccess.h>
43#include <asm/unwind.h>
44#include <asm/user.h>
45
46#include "entry.h"
47
48#ifdef CONFIG_PERFMON
49# include <asm/perfmon.h>
50#endif
51
52#include "sigframe.h"
53
54void (*ia64_mark_idle)(int);
7d5f9c0f 55static DEFINE_PER_CPU(unsigned int, cpu_idle_state);
1da177e4
LT
56
57unsigned long boot_option_idle_override = 0;
58EXPORT_SYMBOL(boot_option_idle_override);
59
60void
61ia64_do_show_stack (struct unw_frame_info *info, void *arg)
62{
63 unsigned long ip, sp, bsp;
64 char buf[128]; /* don't make it so big that it overflows the stack! */
65
66 printk("\nCall Trace:\n");
67 do {
68 unw_get_ip(info, &ip);
69 if (ip == 0)
70 break;
71
72 unw_get_sp(info, &sp);
73 unw_get_bsp(info, &bsp);
74 snprintf(buf, sizeof(buf),
75 " [<%016lx>] %%s\n"
76 " sp=%016lx bsp=%016lx\n",
77 ip, sp, bsp);
78 print_symbol(buf, ip);
79 } while (unw_unwind(info) >= 0);
80}
81
82void
83show_stack (struct task_struct *task, unsigned long *sp)
84{
85 if (!task)
86 unw_init_running(ia64_do_show_stack, NULL);
87 else {
88 struct unw_frame_info info;
89
90 unw_init_from_blocked_task(&info, task);
91 ia64_do_show_stack(&info, NULL);
92 }
93}
94
95void
96dump_stack (void)
97{
98 show_stack(NULL, NULL);
99}
100
101EXPORT_SYMBOL(dump_stack);
102
103void
104show_regs (struct pt_regs *regs)
105{
106 unsigned long ip = regs->cr_iip + ia64_psr(regs)->ri;
107
108 print_modules();
19c5870c
AD
109 printk("\nPid: %d, CPU %d, comm: %20s\n", task_pid_nr(current),
110 smp_processor_id(), current->comm);
ee211b37
TL
111 printk("psr : %016lx ifs : %016lx ip : [<%016lx>] %s (%s)\n",
112 regs->cr_ipsr, regs->cr_ifs, ip, print_tainted(),
113 init_utsname()->release);
1da177e4
LT
114 print_symbol("ip is at %s\n", ip);
115 printk("unat: %016lx pfs : %016lx rsc : %016lx\n",
116 regs->ar_unat, regs->ar_pfs, regs->ar_rsc);
117 printk("rnat: %016lx bsps: %016lx pr : %016lx\n",
118 regs->ar_rnat, regs->ar_bspstore, regs->pr);
119 printk("ldrs: %016lx ccv : %016lx fpsr: %016lx\n",
120 regs->loadrs, regs->ar_ccv, regs->ar_fpsr);
121 printk("csd : %016lx ssd : %016lx\n", regs->ar_csd, regs->ar_ssd);
122 printk("b0 : %016lx b6 : %016lx b7 : %016lx\n", regs->b0, regs->b6, regs->b7);
123 printk("f6 : %05lx%016lx f7 : %05lx%016lx\n",
124 regs->f6.u.bits[1], regs->f6.u.bits[0],
125 regs->f7.u.bits[1], regs->f7.u.bits[0]);
126 printk("f8 : %05lx%016lx f9 : %05lx%016lx\n",
127 regs->f8.u.bits[1], regs->f8.u.bits[0],
128 regs->f9.u.bits[1], regs->f9.u.bits[0]);
129 printk("f10 : %05lx%016lx f11 : %05lx%016lx\n",
130 regs->f10.u.bits[1], regs->f10.u.bits[0],
131 regs->f11.u.bits[1], regs->f11.u.bits[0]);
132
133 printk("r1 : %016lx r2 : %016lx r3 : %016lx\n", regs->r1, regs->r2, regs->r3);
134 printk("r8 : %016lx r9 : %016lx r10 : %016lx\n", regs->r8, regs->r9, regs->r10);
135 printk("r11 : %016lx r12 : %016lx r13 : %016lx\n", regs->r11, regs->r12, regs->r13);
136 printk("r14 : %016lx r15 : %016lx r16 : %016lx\n", regs->r14, regs->r15, regs->r16);
137 printk("r17 : %016lx r18 : %016lx r19 : %016lx\n", regs->r17, regs->r18, regs->r19);
138 printk("r20 : %016lx r21 : %016lx r22 : %016lx\n", regs->r20, regs->r21, regs->r22);
139 printk("r23 : %016lx r24 : %016lx r25 : %016lx\n", regs->r23, regs->r24, regs->r25);
140 printk("r26 : %016lx r27 : %016lx r28 : %016lx\n", regs->r26, regs->r27, regs->r28);
141 printk("r29 : %016lx r30 : %016lx r31 : %016lx\n", regs->r29, regs->r30, regs->r31);
142
143 if (user_mode(regs)) {
144 /* print the stacked registers */
145 unsigned long val, *bsp, ndirty;
146 int i, sof, is_nat = 0;
147
148 sof = regs->cr_ifs & 0x7f; /* size of frame */
149 ndirty = (regs->loadrs >> 19);
150 bsp = ia64_rse_skip_regs((unsigned long *) regs->ar_bspstore, ndirty);
151 for (i = 0; i < sof; ++i) {
152 get_user(val, (unsigned long __user *) ia64_rse_skip_regs(bsp, i));
153 printk("r%-3u:%c%016lx%s", 32 + i, is_nat ? '*' : ' ', val,
154 ((i == sof - 1) || (i % 3) == 2) ? "\n" : " ");
155 }
156 } else
157 show_stack(NULL, NULL);
158}
159
5aa92ffd
PT
160void tsk_clear_notify_resume(struct task_struct *tsk)
161{
162#ifdef CONFIG_PERFMON
163 if (tsk->thread.pfm_needs_checking)
164 return;
165#endif
3b2ce0b1
PT
166 if (test_ti_thread_flag(task_thread_info(tsk), TIF_RESTORE_RSE))
167 return;
5aa92ffd
PT
168 clear_ti_thread_flag(task_thread_info(tsk), TIF_NOTIFY_RESUME);
169}
170
1da177e4 171void
4a177cbf 172do_notify_resume_user (sigset_t *unused, struct sigscratch *scr, long in_syscall)
1da177e4
LT
173{
174 if (fsys_mode(current, &scr->pt)) {
175 /* defer signal-handling etc. until we return to privilege-level 0. */
176 if (!ia64_psr(&scr->pt)->lp)
177 ia64_psr(&scr->pt)->lp = 1;
178 return;
179 }
180
181#ifdef CONFIG_PERFMON
182 if (current->thread.pfm_needs_checking)
183 pfm_handle_work();
184#endif
185
186 /* deal with pending signal delivery */
4a177cbf
AD
187 if (test_thread_flag(TIF_SIGPENDING)||test_thread_flag(TIF_RESTORE_SIGMASK))
188 ia64_do_signal(scr, in_syscall);
3b2ce0b1
PT
189
190 /* copy user rbs to kernel rbs */
191 if (unlikely(test_thread_flag(TIF_RESTORE_RSE)))
192 ia64_sync_krbs();
1da177e4
LT
193}
194
8df5a500
SE
195static int pal_halt = 1;
196static int can_do_pal_halt = 1;
197
1da177e4
LT
198static int __init nohalt_setup(char * str)
199{
fb573856 200 pal_halt = can_do_pal_halt = 0;
1da177e4
LT
201 return 1;
202}
203__setup("nohalt", nohalt_setup);
204
a71f62ed 205void
8df5a500
SE
206update_pal_halt_status(int status)
207{
208 can_do_pal_halt = pal_halt && status;
209}
210
1da177e4
LT
211/*
212 * We use this if we don't have any better idle routine..
213 */
214void
215default_idle (void)
216{
6c4fa560 217 local_irq_enable();
64c7c8f8 218 while (!need_resched()) {
71416bea
DS
219 if (can_do_pal_halt) {
220 local_irq_disable();
221 if (!need_resched()) {
222 safe_halt();
223 }
224 local_irq_enable();
225 } else
1da177e4 226 cpu_relax();
64c7c8f8 227 }
1da177e4
LT
228}
229
230#ifdef CONFIG_HOTPLUG_CPU
231/* We don't actually take CPU down, just spin without interrupts. */
232static inline void play_dead(void)
233{
234 extern void ia64_cpu_local_tick (void);
b8d8b883
AR
235 unsigned int this_cpu = smp_processor_id();
236
1da177e4
LT
237 /* Ack it */
238 __get_cpu_var(cpu_state) = CPU_DEAD;
239
1da177e4
LT
240 max_xtp();
241 local_irq_disable();
b8d8b883
AR
242 idle_task_exit();
243 ia64_jump_to_sal(&sal_boot_rendez_state[this_cpu]);
1da177e4 244 /*
b8d8b883
AR
245 * The above is a point of no-return, the processor is
246 * expected to be in SAL loop now.
1da177e4 247 */
b8d8b883 248 BUG();
1da177e4
LT
249}
250#else
251static inline void play_dead(void)
252{
253 BUG();
254}
255#endif /* CONFIG_HOTPLUG_CPU */
256
1da177e4
LT
257void cpu_idle_wait(void)
258{
7d5f9c0f
ZM
259 unsigned int cpu, this_cpu = get_cpu();
260 cpumask_t map;
bb8416bf 261 cpumask_t tmp = current->cpus_allowed;
7d5f9c0f
ZM
262
263 set_cpus_allowed(current, cpumask_of_cpu(this_cpu));
264 put_cpu();
1da177e4 265
7d5f9c0f
ZM
266 cpus_clear(map);
267 for_each_online_cpu(cpu) {
268 per_cpu(cpu_idle_state, cpu) = 1;
269 cpu_set(cpu, map);
270 }
1da177e4 271
7d5f9c0f
ZM
272 __get_cpu_var(cpu_idle_state) = 0;
273
274 wmb();
275 do {
276 ssleep(1);
277 for_each_online_cpu(cpu) {
278 if (cpu_isset(cpu, map) && !per_cpu(cpu_idle_state, cpu))
279 cpu_clear(cpu, map);
280 }
281 cpus_and(map, map, cpu_online_map);
282 } while (!cpus_empty(map));
bb8416bf 283 set_cpus_allowed(current, tmp);
1da177e4
LT
284}
285EXPORT_SYMBOL_GPL(cpu_idle_wait);
286
287void __attribute__((noreturn))
288cpu_idle (void)
289{
290 void (*mark_idle)(int) = ia64_mark_idle;
64c7c8f8 291 int cpu = smp_processor_id();
1da177e4
LT
292
293 /* endless idle loop with no priority at all */
294 while (1) {
0888f06a 295 if (can_do_pal_halt) {
495ab9c0 296 current_thread_info()->status &= ~TS_POLLING;
0888f06a
IM
297 /*
298 * TS_POLLING-cleared state must be visible before we
299 * test NEED_RESCHED:
300 */
301 smp_mb();
302 } else {
495ab9c0 303 current_thread_info()->status |= TS_POLLING;
0888f06a 304 }
1e185b97 305
64c7c8f8
NP
306 if (!need_resched()) {
307 void (*idle)(void);
1da177e4 308#ifdef CONFIG_SMP
1da177e4
LT
309 min_xtp();
310#endif
7d5f9c0f
ZM
311 if (__get_cpu_var(cpu_idle_state))
312 __get_cpu_var(cpu_idle_state) = 0;
313
314 rmb();
1da177e4
LT
315 if (mark_idle)
316 (*mark_idle)(1);
317
1da177e4
LT
318 idle = pm_idle;
319 if (!idle)
320 idle = default_idle;
321 (*idle)();
64c7c8f8
NP
322 if (mark_idle)
323 (*mark_idle)(0);
1da177e4 324#ifdef CONFIG_SMP
64c7c8f8 325 normal_xtp();
1da177e4 326#endif
64c7c8f8 327 }
5bfb5d69 328 preempt_enable_no_resched();
1da177e4 329 schedule();
5bfb5d69 330 preempt_disable();
1da177e4 331 check_pgt_cache();
64c7c8f8 332 if (cpu_is_offline(cpu))
1da177e4
LT
333 play_dead();
334 }
335}
336
337void
338ia64_save_extra (struct task_struct *task)
339{
340#ifdef CONFIG_PERFMON
341 unsigned long info;
342#endif
343
344 if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0)
345 ia64_save_debug_regs(&task->thread.dbr[0]);
346
347#ifdef CONFIG_PERFMON
348 if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0)
349 pfm_save_regs(task);
350
351 info = __get_cpu_var(pfm_syst_info);
352 if (info & PFM_CPUINFO_SYST_WIDE)
353 pfm_syst_wide_update_task(task, info, 0);
354#endif
355
356#ifdef CONFIG_IA32_SUPPORT
6450578f 357 if (IS_IA32_PROCESS(task_pt_regs(task)))
1da177e4
LT
358 ia32_save_state(task);
359#endif
360}
361
362void
363ia64_load_extra (struct task_struct *task)
364{
365#ifdef CONFIG_PERFMON
366 unsigned long info;
367#endif
368
369 if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0)
370 ia64_load_debug_regs(&task->thread.dbr[0]);
371
372#ifdef CONFIG_PERFMON
373 if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0)
374 pfm_load_regs(task);
375
376 info = __get_cpu_var(pfm_syst_info);
377 if (info & PFM_CPUINFO_SYST_WIDE)
378 pfm_syst_wide_update_task(task, info, 1);
379#endif
380
381#ifdef CONFIG_IA32_SUPPORT
6450578f 382 if (IS_IA32_PROCESS(task_pt_regs(task)))
1da177e4
LT
383 ia32_load_state(task);
384#endif
385}
386
387/*
388 * Copy the state of an ia-64 thread.
389 *
390 * We get here through the following call chain:
391 *
392 * from user-level: from kernel:
393 *
394 * <clone syscall> <some kernel call frames>
395 * sys_clone :
396 * do_fork do_fork
397 * copy_thread copy_thread
398 *
399 * This means that the stack layout is as follows:
400 *
401 * +---------------------+ (highest addr)
402 * | struct pt_regs |
403 * +---------------------+
404 * | struct switch_stack |
405 * +---------------------+
406 * | |
407 * | memory stack |
408 * | | <-- sp (lowest addr)
409 * +---------------------+
410 *
411 * Observe that we copy the unat values that are in pt_regs and switch_stack. Spilling an
412 * integer to address X causes bit N in ar.unat to be set to the NaT bit of the register,
413 * with N=(X & 0x1ff)/8. Thus, copying the unat value preserves the NaT bits ONLY if the
414 * pt_regs structure in the parent is congruent to that of the child, modulo 512. Since
415 * the stack is page aligned and the page size is at least 4KB, this is always the case,
416 * so there is nothing to worry about.
417 */
418int
419copy_thread (int nr, unsigned long clone_flags,
420 unsigned long user_stack_base, unsigned long user_stack_size,
421 struct task_struct *p, struct pt_regs *regs)
422{
423 extern char ia64_ret_from_clone, ia32_ret_from_clone;
424 struct switch_stack *child_stack, *stack;
425 unsigned long rbs, child_rbs, rbs_size;
426 struct pt_regs *child_ptregs;
427 int retval = 0;
428
429#ifdef CONFIG_SMP
430 /*
431 * For SMP idle threads, fork_by_hand() calls do_fork with
432 * NULL regs.
433 */
434 if (!regs)
435 return 0;
436#endif
437
438 stack = ((struct switch_stack *) regs) - 1;
439
440 child_ptregs = (struct pt_regs *) ((unsigned long) p + IA64_STK_OFFSET) - 1;
441 child_stack = (struct switch_stack *) child_ptregs - 1;
442
443 /* copy parent's switch_stack & pt_regs to child: */
444 memcpy(child_stack, stack, sizeof(*child_ptregs) + sizeof(*child_stack));
445
446 rbs = (unsigned long) current + IA64_RBS_OFFSET;
447 child_rbs = (unsigned long) p + IA64_RBS_OFFSET;
448 rbs_size = stack->ar_bspstore - rbs;
449
450 /* copy the parent's register backing store to the child: */
451 memcpy((void *) child_rbs, (void *) rbs, rbs_size);
452
453 if (likely(user_mode(child_ptregs))) {
454 if ((clone_flags & CLONE_SETTLS) && !IS_IA32_PROCESS(regs))
455 child_ptregs->r13 = regs->r16; /* see sys_clone2() in entry.S */
456 if (user_stack_base) {
457 child_ptregs->r12 = user_stack_base + user_stack_size - 16;
458 child_ptregs->ar_bspstore = user_stack_base;
459 child_ptregs->ar_rnat = 0;
460 child_ptregs->loadrs = 0;
461 }
462 } else {
463 /*
464 * Note: we simply preserve the relative position of
465 * the stack pointer here. There is no need to
466 * allocate a scratch area here, since that will have
467 * been taken care of by the caller of sys_clone()
468 * already.
469 */
470 child_ptregs->r12 = (unsigned long) child_ptregs - 16; /* kernel sp */
471 child_ptregs->r13 = (unsigned long) p; /* set `current' pointer */
472 }
473 child_stack->ar_bspstore = child_rbs + rbs_size;
474 if (IS_IA32_PROCESS(regs))
475 child_stack->b0 = (unsigned long) &ia32_ret_from_clone;
476 else
477 child_stack->b0 = (unsigned long) &ia64_ret_from_clone;
478
479 /* copy parts of thread_struct: */
480 p->thread.ksp = (unsigned long) child_stack - 16;
481
482 /* stop some PSR bits from being inherited.
483 * the psr.up/psr.pp bits must be cleared on fork but inherited on execve()
484 * therefore we must specify them explicitly here and not include them in
485 * IA64_PSR_BITS_TO_CLEAR.
486 */
487 child_ptregs->cr_ipsr = ((child_ptregs->cr_ipsr | IA64_PSR_BITS_TO_SET)
488 & ~(IA64_PSR_BITS_TO_CLEAR | IA64_PSR_PP | IA64_PSR_UP));
489
490 /*
491 * NOTE: The calling convention considers all floating point
492 * registers in the high partition (fph) to be scratch. Since
493 * the only way to get to this point is through a system call,
494 * we know that the values in fph are all dead. Hence, there
495 * is no need to inherit the fph state from the parent to the
496 * child and all we have to do is to make sure that
497 * IA64_THREAD_FPH_VALID is cleared in the child.
498 *
499 * XXX We could push this optimization a bit further by
500 * clearing IA64_THREAD_FPH_VALID on ANY system call.
501 * However, it's not clear this is worth doing. Also, it
502 * would be a slight deviation from the normal Linux system
503 * call behavior where scratch registers are preserved across
504 * system calls (unless used by the system call itself).
505 */
506# define THREAD_FLAGS_TO_CLEAR (IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID \
507 | IA64_THREAD_PM_VALID)
508# define THREAD_FLAGS_TO_SET 0
509 p->thread.flags = ((current->thread.flags & ~THREAD_FLAGS_TO_CLEAR)
510 | THREAD_FLAGS_TO_SET);
511 ia64_drop_fpu(p); /* don't pick up stale state from a CPU's fph */
512#ifdef CONFIG_IA32_SUPPORT
513 /*
514 * If we're cloning an IA32 task then save the IA32 extra
515 * state from the current task to the new task
516 */
6450578f 517 if (IS_IA32_PROCESS(task_pt_regs(current))) {
1da177e4
LT
518 ia32_save_state(p);
519 if (clone_flags & CLONE_SETTLS)
520 retval = ia32_clone_tls(p, child_ptregs);
521
522 /* Copy partially mapped page list */
523 if (!retval)
3b74d18e 524 retval = ia32_copy_ia64_partial_page_list(p,
525 clone_flags);
1da177e4
LT
526 }
527#endif
528
529#ifdef CONFIG_PERFMON
530 if (current->thread.pfm_context)
531 pfm_inherit(p, child_ptregs);
532#endif
533 return retval;
534}
535
536static void
537do_copy_task_regs (struct task_struct *task, struct unw_frame_info *info, void *arg)
538{
256a7e09
JS
539 unsigned long mask, sp, nat_bits = 0, ar_rnat, urbs_end, cfm;
540 unsigned long uninitialized_var(ip); /* GCC be quiet */
1da177e4
LT
541 elf_greg_t *dst = arg;
542 struct pt_regs *pt;
543 char nat;
544 int i;
545
546 memset(dst, 0, sizeof(elf_gregset_t)); /* don't leak any kernel bits to user-level */
547
548 if (unw_unwind_to_user(info) < 0)
549 return;
550
551 unw_get_sp(info, &sp);
552 pt = (struct pt_regs *) (sp + 16);
553
554 urbs_end = ia64_get_user_rbs_end(task, pt, &cfm);
555
556 if (ia64_sync_user_rbs(task, info->sw, pt->ar_bspstore, urbs_end) < 0)
557 return;
558
559 ia64_peek(task, info->sw, urbs_end, (long) ia64_rse_rnat_addr((long *) urbs_end),
560 &ar_rnat);
561
562 /*
563 * coredump format:
564 * r0-r31
565 * NaT bits (for r0-r31; bit N == 1 iff rN is a NaT)
566 * predicate registers (p0-p63)
567 * b0-b7
568 * ip cfm user-mask
569 * ar.rsc ar.bsp ar.bspstore ar.rnat
570 * ar.ccv ar.unat ar.fpsr ar.pfs ar.lc ar.ec
571 */
572
573 /* r0 is zero */
574 for (i = 1, mask = (1UL << i); i < 32; ++i) {
575 unw_get_gr(info, i, &dst[i], &nat);
576 if (nat)
577 nat_bits |= mask;
578 mask <<= 1;
579 }
580 dst[32] = nat_bits;
581 unw_get_pr(info, &dst[33]);
582
583 for (i = 0; i < 8; ++i)
584 unw_get_br(info, i, &dst[34 + i]);
585
586 unw_get_rp(info, &ip);
587 dst[42] = ip + ia64_psr(pt)->ri;
588 dst[43] = cfm;
589 dst[44] = pt->cr_ipsr & IA64_PSR_UM;
590
591 unw_get_ar(info, UNW_AR_RSC, &dst[45]);
592 /*
593 * For bsp and bspstore, unw_get_ar() would return the kernel
594 * addresses, but we need the user-level addresses instead:
595 */
596 dst[46] = urbs_end; /* note: by convention PT_AR_BSP points to the end of the urbs! */
597 dst[47] = pt->ar_bspstore;
598 dst[48] = ar_rnat;
599 unw_get_ar(info, UNW_AR_CCV, &dst[49]);
600 unw_get_ar(info, UNW_AR_UNAT, &dst[50]);
601 unw_get_ar(info, UNW_AR_FPSR, &dst[51]);
602 dst[52] = pt->ar_pfs; /* UNW_AR_PFS is == to pt->cr_ifs for interrupt frames */
603 unw_get_ar(info, UNW_AR_LC, &dst[53]);
604 unw_get_ar(info, UNW_AR_EC, &dst[54]);
605 unw_get_ar(info, UNW_AR_CSD, &dst[55]);
606 unw_get_ar(info, UNW_AR_SSD, &dst[56]);
607}
608
609void
610do_dump_task_fpu (struct task_struct *task, struct unw_frame_info *info, void *arg)
611{
612 elf_fpreg_t *dst = arg;
613 int i;
614
615 memset(dst, 0, sizeof(elf_fpregset_t)); /* don't leak any "random" bits */
616
617 if (unw_unwind_to_user(info) < 0)
618 return;
619
620 /* f0 is 0.0, f1 is 1.0 */
621
622 for (i = 2; i < 32; ++i)
623 unw_get_fr(info, i, dst + i);
624
625 ia64_flush_fph(task);
626 if ((task->thread.flags & IA64_THREAD_FPH_VALID) != 0)
627 memcpy(dst + 32, task->thread.fph, 96*16);
628}
629
630void
631do_copy_regs (struct unw_frame_info *info, void *arg)
632{
633 do_copy_task_regs(current, info, arg);
634}
635
636void
637do_dump_fpu (struct unw_frame_info *info, void *arg)
638{
639 do_dump_task_fpu(current, info, arg);
640}
641
642int
643dump_task_regs(struct task_struct *task, elf_gregset_t *regs)
644{
645 struct unw_frame_info tcore_info;
646
647 if (current == task) {
648 unw_init_running(do_copy_regs, regs);
649 } else {
650 memset(&tcore_info, 0, sizeof(tcore_info));
651 unw_init_from_blocked_task(&tcore_info, task);
652 do_copy_task_regs(task, &tcore_info, regs);
653 }
654 return 1;
655}
656
657void
658ia64_elf_core_copy_regs (struct pt_regs *pt, elf_gregset_t dst)
659{
660 unw_init_running(do_copy_regs, dst);
661}
662
663int
664dump_task_fpu (struct task_struct *task, elf_fpregset_t *dst)
665{
666 struct unw_frame_info tcore_info;
667
668 if (current == task) {
669 unw_init_running(do_dump_fpu, dst);
670 } else {
671 memset(&tcore_info, 0, sizeof(tcore_info));
672 unw_init_from_blocked_task(&tcore_info, task);
673 do_dump_task_fpu(task, &tcore_info, dst);
674 }
675 return 1;
676}
677
678int
679dump_fpu (struct pt_regs *pt, elf_fpregset_t dst)
680{
681 unw_init_running(do_dump_fpu, dst);
682 return 1; /* f0-f31 are always valid so we always return 1 */
683}
684
685long
686sys_execve (char __user *filename, char __user * __user *argv, char __user * __user *envp,
687 struct pt_regs *regs)
688{
689 char *fname;
690 int error;
691
692 fname = getname(filename);
693 error = PTR_ERR(fname);
694 if (IS_ERR(fname))
695 goto out;
696 error = do_execve(fname, argv, envp, regs);
697 putname(fname);
698out:
699 return error;
700}
701
702pid_t
703kernel_thread (int (*fn)(void *), void *arg, unsigned long flags)
704{
705 extern void start_kernel_thread (void);
706 unsigned long *helper_fptr = (unsigned long *) &start_kernel_thread;
707 struct {
708 struct switch_stack sw;
709 struct pt_regs pt;
710 } regs;
711
712 memset(&regs, 0, sizeof(regs));
713 regs.pt.cr_iip = helper_fptr[0]; /* set entry point (IP) */
714 regs.pt.r1 = helper_fptr[1]; /* set GP */
715 regs.pt.r9 = (unsigned long) fn; /* 1st argument */
716 regs.pt.r11 = (unsigned long) arg; /* 2nd argument */
717 /* Preserve PSR bits, except for bits 32-34 and 37-45, which we can't read. */
718 regs.pt.cr_ipsr = ia64_getreg(_IA64_REG_PSR) | IA64_PSR_BN;
719 regs.pt.cr_ifs = 1UL << 63; /* mark as valid, empty frame */
720 regs.sw.ar_fpsr = regs.pt.ar_fpsr = ia64_getreg(_IA64_REG_AR_FPSR);
721 regs.sw.ar_bspstore = (unsigned long) current + IA64_RBS_OFFSET;
722 regs.sw.pr = (1 << PRED_KERNEL_STACK);
723 return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, &regs.pt, 0, NULL, NULL);
724}
725EXPORT_SYMBOL(kernel_thread);
726
727/* This gets called from kernel_thread() via ia64_invoke_thread_helper(). */
728int
729kernel_thread_helper (int (*fn)(void *), void *arg)
730{
731#ifdef CONFIG_IA32_SUPPORT
6450578f 732 if (IS_IA32_PROCESS(task_pt_regs(current))) {
1da177e4
LT
733 /* A kernel thread is always a 64-bit process. */
734 current->thread.map_base = DEFAULT_MAP_BASE;
735 current->thread.task_size = DEFAULT_TASK_SIZE;
736 ia64_set_kr(IA64_KR_IO_BASE, current->thread.old_iob);
737 ia64_set_kr(IA64_KR_TSSD, current->thread.old_k1);
738 }
739#endif
740 return (*fn)(arg);
741}
742
743/*
744 * Flush thread state. This is called when a thread does an execve().
745 */
746void
747flush_thread (void)
748{
749 /* drop floating-point and debug-register state if it exists: */
750 current->thread.flags &= ~(IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID);
751 ia64_drop_fpu(current);
27af4cfd 752#ifdef CONFIG_IA32_SUPPORT
6450578f 753 if (IS_IA32_PROCESS(task_pt_regs(current))) {
3b74d18e 754 ia32_drop_ia64_partial_page_list(current);
bd1d6e24
RH
755 current->thread.task_size = IA32_PAGE_OFFSET;
756 set_fs(USER_DS);
e384f414 757 memset(current->thread.tls_array, 0, sizeof(current->thread.tls_array));
bd1d6e24 758 }
27af4cfd 759#endif
1da177e4
LT
760}
761
762/*
763 * Clean up state associated with current thread. This is called when
764 * the thread calls exit().
765 */
766void
767exit_thread (void)
768{
9508dbfe 769
1da177e4
LT
770 ia64_drop_fpu(current);
771#ifdef CONFIG_PERFMON
772 /* if needed, stop monitoring and flush state to perfmon context */
773 if (current->thread.pfm_context)
774 pfm_exit_thread(current);
775
776 /* free debug register resources */
777 if (current->thread.flags & IA64_THREAD_DBG_VALID)
778 pfm_release_debug_registers(current);
779#endif
6450578f 780 if (IS_IA32_PROCESS(task_pt_regs(current)))
3b74d18e 781 ia32_drop_ia64_partial_page_list(current);
1da177e4
LT
782}
783
784unsigned long
785get_wchan (struct task_struct *p)
786{
787 struct unw_frame_info info;
788 unsigned long ip;
789 int count = 0;
790
6ae38488
RH
791 if (!p || p == current || p->state == TASK_RUNNING)
792 return 0;
793
1da177e4
LT
794 /*
795 * Note: p may not be a blocked task (it could be current or
796 * another process running on some other CPU. Rather than
797 * trying to determine if p is really blocked, we just assume
798 * it's blocked and rely on the unwind routines to fail
799 * gracefully if the process wasn't really blocked after all.
800 * --davidm 99/12/15
801 */
802 unw_init_from_blocked_task(&info, p);
803 do {
6ae38488
RH
804 if (p->state == TASK_RUNNING)
805 return 0;
1da177e4
LT
806 if (unw_unwind(&info) < 0)
807 return 0;
808 unw_get_ip(&info, &ip);
809 if (!in_sched_functions(ip))
810 return ip;
811 } while (count++ < 16);
812 return 0;
813}
814
815void
816cpu_halt (void)
817{
818 pal_power_mgmt_info_u_t power_info[8];
819 unsigned long min_power;
820 int i, min_power_state;
821
822 if (ia64_pal_halt_info(power_info) != 0)
823 return;
824
825 min_power_state = 0;
826 min_power = power_info[0].pal_power_mgmt_info_s.power_consumption;
827 for (i = 1; i < 8; ++i)
828 if (power_info[i].pal_power_mgmt_info_s.im
829 && power_info[i].pal_power_mgmt_info_s.power_consumption < min_power) {
830 min_power = power_info[i].pal_power_mgmt_info_s.power_consumption;
831 min_power_state = i;
832 }
833
834 while (1)
835 ia64_pal_halt(min_power_state);
836}
837
c237508a
H
838void machine_shutdown(void)
839{
840#ifdef CONFIG_HOTPLUG_CPU
841 int cpu;
842
843 for_each_online_cpu(cpu) {
844 if (cpu != smp_processor_id())
845 cpu_down(cpu);
846 }
847#endif
848#ifdef CONFIG_KEXEC
849 kexec_disable_iosapic();
850#endif
851}
852
1da177e4
LT
853void
854machine_restart (char *restart_cmd)
855{
9138d581 856 (void) notify_die(DIE_MACHINE_RESTART, restart_cmd, NULL, 0, 0, 0);
1da177e4
LT
857 (*efi.reset_system)(EFI_RESET_WARM, 0, 0, NULL);
858}
859
1da177e4
LT
860void
861machine_halt (void)
862{
9138d581 863 (void) notify_die(DIE_MACHINE_HALT, "", NULL, 0, 0, 0);
1da177e4
LT
864 cpu_halt();
865}
866
1da177e4
LT
867void
868machine_power_off (void)
869{
870 if (pm_power_off)
871 pm_power_off();
872 machine_halt();
873}
874