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[IA64] silence GCC ia64 unused variable warnings
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CommitLineData
1da177e4
LT
1/*
2 * Architecture-specific setup.
3 *
4 * Copyright (C) 1998-2003 Hewlett-Packard Co
5 * David Mosberger-Tang <davidm@hpl.hp.com>
b8d8b883 6 * 04/11/17 Ashok Raj <ashok.raj@intel.com> Added CPU Hotplug Support
9138d581
KO
7 *
8 * 2005-10-07 Keith Owens <kaos@sgi.com>
9 * Add notify_die() hooks.
1da177e4 10 */
1da177e4
LT
11#include <linux/cpu.h>
12#include <linux/pm.h>
13#include <linux/elf.h>
14#include <linux/errno.h>
15#include <linux/kallsyms.h>
16#include <linux/kernel.h>
17#include <linux/mm.h>
18#include <linux/module.h>
19#include <linux/notifier.h>
20#include <linux/personality.h>
21#include <linux/sched.h>
22#include <linux/slab.h>
1da177e4
LT
23#include <linux/stddef.h>
24#include <linux/thread_info.h>
25#include <linux/unistd.h>
26#include <linux/efi.h>
27#include <linux/interrupt.h>
28#include <linux/delay.h>
1eeb66a1 29#include <linux/kdebug.h>
1da177e4
LT
30
31#include <asm/cpu.h>
32#include <asm/delay.h>
33#include <asm/elf.h>
34#include <asm/ia32.h>
35#include <asm/irq.h>
c237508a 36#include <asm/kexec.h>
1da177e4
LT
37#include <asm/pgalloc.h>
38#include <asm/processor.h>
39#include <asm/sal.h>
40#include <asm/tlbflush.h>
41#include <asm/uaccess.h>
42#include <asm/unwind.h>
43#include <asm/user.h>
44
45#include "entry.h"
46
47#ifdef CONFIG_PERFMON
48# include <asm/perfmon.h>
49#endif
50
51#include "sigframe.h"
52
53void (*ia64_mark_idle)(int);
7d5f9c0f 54static DEFINE_PER_CPU(unsigned int, cpu_idle_state);
1da177e4
LT
55
56unsigned long boot_option_idle_override = 0;
57EXPORT_SYMBOL(boot_option_idle_override);
58
59void
60ia64_do_show_stack (struct unw_frame_info *info, void *arg)
61{
62 unsigned long ip, sp, bsp;
63 char buf[128]; /* don't make it so big that it overflows the stack! */
64
65 printk("\nCall Trace:\n");
66 do {
67 unw_get_ip(info, &ip);
68 if (ip == 0)
69 break;
70
71 unw_get_sp(info, &sp);
72 unw_get_bsp(info, &bsp);
73 snprintf(buf, sizeof(buf),
74 " [<%016lx>] %%s\n"
75 " sp=%016lx bsp=%016lx\n",
76 ip, sp, bsp);
77 print_symbol(buf, ip);
78 } while (unw_unwind(info) >= 0);
79}
80
81void
82show_stack (struct task_struct *task, unsigned long *sp)
83{
84 if (!task)
85 unw_init_running(ia64_do_show_stack, NULL);
86 else {
87 struct unw_frame_info info;
88
89 unw_init_from_blocked_task(&info, task);
90 ia64_do_show_stack(&info, NULL);
91 }
92}
93
94void
95dump_stack (void)
96{
97 show_stack(NULL, NULL);
98}
99
100EXPORT_SYMBOL(dump_stack);
101
102void
103show_regs (struct pt_regs *regs)
104{
105 unsigned long ip = regs->cr_iip + ia64_psr(regs)->ri;
106
107 print_modules();
108 printk("\nPid: %d, CPU %d, comm: %20s\n", current->pid, smp_processor_id(), current->comm);
109 printk("psr : %016lx ifs : %016lx ip : [<%016lx>] %s\n",
110 regs->cr_ipsr, regs->cr_ifs, ip, print_tainted());
111 print_symbol("ip is at %s\n", ip);
112 printk("unat: %016lx pfs : %016lx rsc : %016lx\n",
113 regs->ar_unat, regs->ar_pfs, regs->ar_rsc);
114 printk("rnat: %016lx bsps: %016lx pr : %016lx\n",
115 regs->ar_rnat, regs->ar_bspstore, regs->pr);
116 printk("ldrs: %016lx ccv : %016lx fpsr: %016lx\n",
117 regs->loadrs, regs->ar_ccv, regs->ar_fpsr);
118 printk("csd : %016lx ssd : %016lx\n", regs->ar_csd, regs->ar_ssd);
119 printk("b0 : %016lx b6 : %016lx b7 : %016lx\n", regs->b0, regs->b6, regs->b7);
120 printk("f6 : %05lx%016lx f7 : %05lx%016lx\n",
121 regs->f6.u.bits[1], regs->f6.u.bits[0],
122 regs->f7.u.bits[1], regs->f7.u.bits[0]);
123 printk("f8 : %05lx%016lx f9 : %05lx%016lx\n",
124 regs->f8.u.bits[1], regs->f8.u.bits[0],
125 regs->f9.u.bits[1], regs->f9.u.bits[0]);
126 printk("f10 : %05lx%016lx f11 : %05lx%016lx\n",
127 regs->f10.u.bits[1], regs->f10.u.bits[0],
128 regs->f11.u.bits[1], regs->f11.u.bits[0]);
129
130 printk("r1 : %016lx r2 : %016lx r3 : %016lx\n", regs->r1, regs->r2, regs->r3);
131 printk("r8 : %016lx r9 : %016lx r10 : %016lx\n", regs->r8, regs->r9, regs->r10);
132 printk("r11 : %016lx r12 : %016lx r13 : %016lx\n", regs->r11, regs->r12, regs->r13);
133 printk("r14 : %016lx r15 : %016lx r16 : %016lx\n", regs->r14, regs->r15, regs->r16);
134 printk("r17 : %016lx r18 : %016lx r19 : %016lx\n", regs->r17, regs->r18, regs->r19);
135 printk("r20 : %016lx r21 : %016lx r22 : %016lx\n", regs->r20, regs->r21, regs->r22);
136 printk("r23 : %016lx r24 : %016lx r25 : %016lx\n", regs->r23, regs->r24, regs->r25);
137 printk("r26 : %016lx r27 : %016lx r28 : %016lx\n", regs->r26, regs->r27, regs->r28);
138 printk("r29 : %016lx r30 : %016lx r31 : %016lx\n", regs->r29, regs->r30, regs->r31);
139
140 if (user_mode(regs)) {
141 /* print the stacked registers */
142 unsigned long val, *bsp, ndirty;
143 int i, sof, is_nat = 0;
144
145 sof = regs->cr_ifs & 0x7f; /* size of frame */
146 ndirty = (regs->loadrs >> 19);
147 bsp = ia64_rse_skip_regs((unsigned long *) regs->ar_bspstore, ndirty);
148 for (i = 0; i < sof; ++i) {
149 get_user(val, (unsigned long __user *) ia64_rse_skip_regs(bsp, i));
150 printk("r%-3u:%c%016lx%s", 32 + i, is_nat ? '*' : ' ', val,
151 ((i == sof - 1) || (i % 3) == 2) ? "\n" : " ");
152 }
153 } else
154 show_stack(NULL, NULL);
155}
156
157void
4a177cbf 158do_notify_resume_user (sigset_t *unused, struct sigscratch *scr, long in_syscall)
1da177e4
LT
159{
160 if (fsys_mode(current, &scr->pt)) {
161 /* defer signal-handling etc. until we return to privilege-level 0. */
162 if (!ia64_psr(&scr->pt)->lp)
163 ia64_psr(&scr->pt)->lp = 1;
164 return;
165 }
166
167#ifdef CONFIG_PERFMON
168 if (current->thread.pfm_needs_checking)
169 pfm_handle_work();
170#endif
171
172 /* deal with pending signal delivery */
4a177cbf
AD
173 if (test_thread_flag(TIF_SIGPENDING)||test_thread_flag(TIF_RESTORE_SIGMASK))
174 ia64_do_signal(scr, in_syscall);
1da177e4
LT
175}
176
8df5a500
SE
177static int pal_halt = 1;
178static int can_do_pal_halt = 1;
179
1da177e4
LT
180static int __init nohalt_setup(char * str)
181{
fb573856 182 pal_halt = can_do_pal_halt = 0;
1da177e4
LT
183 return 1;
184}
185__setup("nohalt", nohalt_setup);
186
a71f62ed 187void
8df5a500
SE
188update_pal_halt_status(int status)
189{
190 can_do_pal_halt = pal_halt && status;
191}
192
1da177e4
LT
193/*
194 * We use this if we don't have any better idle routine..
195 */
196void
197default_idle (void)
198{
6c4fa560 199 local_irq_enable();
64c7c8f8 200 while (!need_resched()) {
1e185b97
KC
201 if (can_do_pal_halt)
202 safe_halt();
203 else
1da177e4 204 cpu_relax();
64c7c8f8 205 }
1da177e4
LT
206}
207
208#ifdef CONFIG_HOTPLUG_CPU
209/* We don't actually take CPU down, just spin without interrupts. */
210static inline void play_dead(void)
211{
212 extern void ia64_cpu_local_tick (void);
b8d8b883
AR
213 unsigned int this_cpu = smp_processor_id();
214
1da177e4
LT
215 /* Ack it */
216 __get_cpu_var(cpu_state) = CPU_DEAD;
217
1da177e4
LT
218 max_xtp();
219 local_irq_disable();
b8d8b883
AR
220 idle_task_exit();
221 ia64_jump_to_sal(&sal_boot_rendez_state[this_cpu]);
1da177e4 222 /*
b8d8b883
AR
223 * The above is a point of no-return, the processor is
224 * expected to be in SAL loop now.
1da177e4 225 */
b8d8b883 226 BUG();
1da177e4
LT
227}
228#else
229static inline void play_dead(void)
230{
231 BUG();
232}
233#endif /* CONFIG_HOTPLUG_CPU */
234
1da177e4
LT
235void cpu_idle_wait(void)
236{
7d5f9c0f
ZM
237 unsigned int cpu, this_cpu = get_cpu();
238 cpumask_t map;
bb8416bf 239 cpumask_t tmp = current->cpus_allowed;
7d5f9c0f
ZM
240
241 set_cpus_allowed(current, cpumask_of_cpu(this_cpu));
242 put_cpu();
1da177e4 243
7d5f9c0f
ZM
244 cpus_clear(map);
245 for_each_online_cpu(cpu) {
246 per_cpu(cpu_idle_state, cpu) = 1;
247 cpu_set(cpu, map);
248 }
1da177e4 249
7d5f9c0f
ZM
250 __get_cpu_var(cpu_idle_state) = 0;
251
252 wmb();
253 do {
254 ssleep(1);
255 for_each_online_cpu(cpu) {
256 if (cpu_isset(cpu, map) && !per_cpu(cpu_idle_state, cpu))
257 cpu_clear(cpu, map);
258 }
259 cpus_and(map, map, cpu_online_map);
260 } while (!cpus_empty(map));
bb8416bf 261 set_cpus_allowed(current, tmp);
1da177e4
LT
262}
263EXPORT_SYMBOL_GPL(cpu_idle_wait);
264
265void __attribute__((noreturn))
266cpu_idle (void)
267{
268 void (*mark_idle)(int) = ia64_mark_idle;
64c7c8f8 269 int cpu = smp_processor_id();
1da177e4
LT
270
271 /* endless idle loop with no priority at all */
272 while (1) {
0888f06a 273 if (can_do_pal_halt) {
495ab9c0 274 current_thread_info()->status &= ~TS_POLLING;
0888f06a
IM
275 /*
276 * TS_POLLING-cleared state must be visible before we
277 * test NEED_RESCHED:
278 */
279 smp_mb();
280 } else {
495ab9c0 281 current_thread_info()->status |= TS_POLLING;
0888f06a 282 }
1e185b97 283
64c7c8f8
NP
284 if (!need_resched()) {
285 void (*idle)(void);
1da177e4 286#ifdef CONFIG_SMP
1da177e4
LT
287 min_xtp();
288#endif
7d5f9c0f
ZM
289 if (__get_cpu_var(cpu_idle_state))
290 __get_cpu_var(cpu_idle_state) = 0;
291
292 rmb();
1da177e4
LT
293 if (mark_idle)
294 (*mark_idle)(1);
295
1da177e4
LT
296 idle = pm_idle;
297 if (!idle)
298 idle = default_idle;
299 (*idle)();
64c7c8f8
NP
300 if (mark_idle)
301 (*mark_idle)(0);
1da177e4 302#ifdef CONFIG_SMP
64c7c8f8 303 normal_xtp();
1da177e4 304#endif
64c7c8f8 305 }
5bfb5d69 306 preempt_enable_no_resched();
1da177e4 307 schedule();
5bfb5d69 308 preempt_disable();
1da177e4 309 check_pgt_cache();
64c7c8f8 310 if (cpu_is_offline(cpu))
1da177e4
LT
311 play_dead();
312 }
313}
314
315void
316ia64_save_extra (struct task_struct *task)
317{
318#ifdef CONFIG_PERFMON
319 unsigned long info;
320#endif
321
322 if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0)
323 ia64_save_debug_regs(&task->thread.dbr[0]);
324
325#ifdef CONFIG_PERFMON
326 if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0)
327 pfm_save_regs(task);
328
329 info = __get_cpu_var(pfm_syst_info);
330 if (info & PFM_CPUINFO_SYST_WIDE)
331 pfm_syst_wide_update_task(task, info, 0);
332#endif
333
334#ifdef CONFIG_IA32_SUPPORT
6450578f 335 if (IS_IA32_PROCESS(task_pt_regs(task)))
1da177e4
LT
336 ia32_save_state(task);
337#endif
338}
339
340void
341ia64_load_extra (struct task_struct *task)
342{
343#ifdef CONFIG_PERFMON
344 unsigned long info;
345#endif
346
347 if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0)
348 ia64_load_debug_regs(&task->thread.dbr[0]);
349
350#ifdef CONFIG_PERFMON
351 if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0)
352 pfm_load_regs(task);
353
354 info = __get_cpu_var(pfm_syst_info);
355 if (info & PFM_CPUINFO_SYST_WIDE)
356 pfm_syst_wide_update_task(task, info, 1);
357#endif
358
359#ifdef CONFIG_IA32_SUPPORT
6450578f 360 if (IS_IA32_PROCESS(task_pt_regs(task)))
1da177e4
LT
361 ia32_load_state(task);
362#endif
363}
364
365/*
366 * Copy the state of an ia-64 thread.
367 *
368 * We get here through the following call chain:
369 *
370 * from user-level: from kernel:
371 *
372 * <clone syscall> <some kernel call frames>
373 * sys_clone :
374 * do_fork do_fork
375 * copy_thread copy_thread
376 *
377 * This means that the stack layout is as follows:
378 *
379 * +---------------------+ (highest addr)
380 * | struct pt_regs |
381 * +---------------------+
382 * | struct switch_stack |
383 * +---------------------+
384 * | |
385 * | memory stack |
386 * | | <-- sp (lowest addr)
387 * +---------------------+
388 *
389 * Observe that we copy the unat values that are in pt_regs and switch_stack. Spilling an
390 * integer to address X causes bit N in ar.unat to be set to the NaT bit of the register,
391 * with N=(X & 0x1ff)/8. Thus, copying the unat value preserves the NaT bits ONLY if the
392 * pt_regs structure in the parent is congruent to that of the child, modulo 512. Since
393 * the stack is page aligned and the page size is at least 4KB, this is always the case,
394 * so there is nothing to worry about.
395 */
396int
397copy_thread (int nr, unsigned long clone_flags,
398 unsigned long user_stack_base, unsigned long user_stack_size,
399 struct task_struct *p, struct pt_regs *regs)
400{
401 extern char ia64_ret_from_clone, ia32_ret_from_clone;
402 struct switch_stack *child_stack, *stack;
403 unsigned long rbs, child_rbs, rbs_size;
404 struct pt_regs *child_ptregs;
405 int retval = 0;
406
407#ifdef CONFIG_SMP
408 /*
409 * For SMP idle threads, fork_by_hand() calls do_fork with
410 * NULL regs.
411 */
412 if (!regs)
413 return 0;
414#endif
415
416 stack = ((struct switch_stack *) regs) - 1;
417
418 child_ptregs = (struct pt_regs *) ((unsigned long) p + IA64_STK_OFFSET) - 1;
419 child_stack = (struct switch_stack *) child_ptregs - 1;
420
421 /* copy parent's switch_stack & pt_regs to child: */
422 memcpy(child_stack, stack, sizeof(*child_ptregs) + sizeof(*child_stack));
423
424 rbs = (unsigned long) current + IA64_RBS_OFFSET;
425 child_rbs = (unsigned long) p + IA64_RBS_OFFSET;
426 rbs_size = stack->ar_bspstore - rbs;
427
428 /* copy the parent's register backing store to the child: */
429 memcpy((void *) child_rbs, (void *) rbs, rbs_size);
430
431 if (likely(user_mode(child_ptregs))) {
432 if ((clone_flags & CLONE_SETTLS) && !IS_IA32_PROCESS(regs))
433 child_ptregs->r13 = regs->r16; /* see sys_clone2() in entry.S */
434 if (user_stack_base) {
435 child_ptregs->r12 = user_stack_base + user_stack_size - 16;
436 child_ptregs->ar_bspstore = user_stack_base;
437 child_ptregs->ar_rnat = 0;
438 child_ptregs->loadrs = 0;
439 }
440 } else {
441 /*
442 * Note: we simply preserve the relative position of
443 * the stack pointer here. There is no need to
444 * allocate a scratch area here, since that will have
445 * been taken care of by the caller of sys_clone()
446 * already.
447 */
448 child_ptregs->r12 = (unsigned long) child_ptregs - 16; /* kernel sp */
449 child_ptregs->r13 = (unsigned long) p; /* set `current' pointer */
450 }
451 child_stack->ar_bspstore = child_rbs + rbs_size;
452 if (IS_IA32_PROCESS(regs))
453 child_stack->b0 = (unsigned long) &ia32_ret_from_clone;
454 else
455 child_stack->b0 = (unsigned long) &ia64_ret_from_clone;
456
457 /* copy parts of thread_struct: */
458 p->thread.ksp = (unsigned long) child_stack - 16;
459
460 /* stop some PSR bits from being inherited.
461 * the psr.up/psr.pp bits must be cleared on fork but inherited on execve()
462 * therefore we must specify them explicitly here and not include them in
463 * IA64_PSR_BITS_TO_CLEAR.
464 */
465 child_ptregs->cr_ipsr = ((child_ptregs->cr_ipsr | IA64_PSR_BITS_TO_SET)
466 & ~(IA64_PSR_BITS_TO_CLEAR | IA64_PSR_PP | IA64_PSR_UP));
467
468 /*
469 * NOTE: The calling convention considers all floating point
470 * registers in the high partition (fph) to be scratch. Since
471 * the only way to get to this point is through a system call,
472 * we know that the values in fph are all dead. Hence, there
473 * is no need to inherit the fph state from the parent to the
474 * child and all we have to do is to make sure that
475 * IA64_THREAD_FPH_VALID is cleared in the child.
476 *
477 * XXX We could push this optimization a bit further by
478 * clearing IA64_THREAD_FPH_VALID on ANY system call.
479 * However, it's not clear this is worth doing. Also, it
480 * would be a slight deviation from the normal Linux system
481 * call behavior where scratch registers are preserved across
482 * system calls (unless used by the system call itself).
483 */
484# define THREAD_FLAGS_TO_CLEAR (IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID \
485 | IA64_THREAD_PM_VALID)
486# define THREAD_FLAGS_TO_SET 0
487 p->thread.flags = ((current->thread.flags & ~THREAD_FLAGS_TO_CLEAR)
488 | THREAD_FLAGS_TO_SET);
489 ia64_drop_fpu(p); /* don't pick up stale state from a CPU's fph */
490#ifdef CONFIG_IA32_SUPPORT
491 /*
492 * If we're cloning an IA32 task then save the IA32 extra
493 * state from the current task to the new task
494 */
6450578f 495 if (IS_IA32_PROCESS(task_pt_regs(current))) {
1da177e4
LT
496 ia32_save_state(p);
497 if (clone_flags & CLONE_SETTLS)
498 retval = ia32_clone_tls(p, child_ptregs);
499
500 /* Copy partially mapped page list */
501 if (!retval)
502 retval = ia32_copy_partial_page_list(p, clone_flags);
503 }
504#endif
505
506#ifdef CONFIG_PERFMON
507 if (current->thread.pfm_context)
508 pfm_inherit(p, child_ptregs);
509#endif
510 return retval;
511}
512
513static void
514do_copy_task_regs (struct task_struct *task, struct unw_frame_info *info, void *arg)
515{
256a7e09
JS
516 unsigned long mask, sp, nat_bits = 0, ar_rnat, urbs_end, cfm;
517 unsigned long uninitialized_var(ip); /* GCC be quiet */
1da177e4
LT
518 elf_greg_t *dst = arg;
519 struct pt_regs *pt;
520 char nat;
521 int i;
522
523 memset(dst, 0, sizeof(elf_gregset_t)); /* don't leak any kernel bits to user-level */
524
525 if (unw_unwind_to_user(info) < 0)
526 return;
527
528 unw_get_sp(info, &sp);
529 pt = (struct pt_regs *) (sp + 16);
530
531 urbs_end = ia64_get_user_rbs_end(task, pt, &cfm);
532
533 if (ia64_sync_user_rbs(task, info->sw, pt->ar_bspstore, urbs_end) < 0)
534 return;
535
536 ia64_peek(task, info->sw, urbs_end, (long) ia64_rse_rnat_addr((long *) urbs_end),
537 &ar_rnat);
538
539 /*
540 * coredump format:
541 * r0-r31
542 * NaT bits (for r0-r31; bit N == 1 iff rN is a NaT)
543 * predicate registers (p0-p63)
544 * b0-b7
545 * ip cfm user-mask
546 * ar.rsc ar.bsp ar.bspstore ar.rnat
547 * ar.ccv ar.unat ar.fpsr ar.pfs ar.lc ar.ec
548 */
549
550 /* r0 is zero */
551 for (i = 1, mask = (1UL << i); i < 32; ++i) {
552 unw_get_gr(info, i, &dst[i], &nat);
553 if (nat)
554 nat_bits |= mask;
555 mask <<= 1;
556 }
557 dst[32] = nat_bits;
558 unw_get_pr(info, &dst[33]);
559
560 for (i = 0; i < 8; ++i)
561 unw_get_br(info, i, &dst[34 + i]);
562
563 unw_get_rp(info, &ip);
564 dst[42] = ip + ia64_psr(pt)->ri;
565 dst[43] = cfm;
566 dst[44] = pt->cr_ipsr & IA64_PSR_UM;
567
568 unw_get_ar(info, UNW_AR_RSC, &dst[45]);
569 /*
570 * For bsp and bspstore, unw_get_ar() would return the kernel
571 * addresses, but we need the user-level addresses instead:
572 */
573 dst[46] = urbs_end; /* note: by convention PT_AR_BSP points to the end of the urbs! */
574 dst[47] = pt->ar_bspstore;
575 dst[48] = ar_rnat;
576 unw_get_ar(info, UNW_AR_CCV, &dst[49]);
577 unw_get_ar(info, UNW_AR_UNAT, &dst[50]);
578 unw_get_ar(info, UNW_AR_FPSR, &dst[51]);
579 dst[52] = pt->ar_pfs; /* UNW_AR_PFS is == to pt->cr_ifs for interrupt frames */
580 unw_get_ar(info, UNW_AR_LC, &dst[53]);
581 unw_get_ar(info, UNW_AR_EC, &dst[54]);
582 unw_get_ar(info, UNW_AR_CSD, &dst[55]);
583 unw_get_ar(info, UNW_AR_SSD, &dst[56]);
584}
585
586void
587do_dump_task_fpu (struct task_struct *task, struct unw_frame_info *info, void *arg)
588{
589 elf_fpreg_t *dst = arg;
590 int i;
591
592 memset(dst, 0, sizeof(elf_fpregset_t)); /* don't leak any "random" bits */
593
594 if (unw_unwind_to_user(info) < 0)
595 return;
596
597 /* f0 is 0.0, f1 is 1.0 */
598
599 for (i = 2; i < 32; ++i)
600 unw_get_fr(info, i, dst + i);
601
602 ia64_flush_fph(task);
603 if ((task->thread.flags & IA64_THREAD_FPH_VALID) != 0)
604 memcpy(dst + 32, task->thread.fph, 96*16);
605}
606
607void
608do_copy_regs (struct unw_frame_info *info, void *arg)
609{
610 do_copy_task_regs(current, info, arg);
611}
612
613void
614do_dump_fpu (struct unw_frame_info *info, void *arg)
615{
616 do_dump_task_fpu(current, info, arg);
617}
618
619int
620dump_task_regs(struct task_struct *task, elf_gregset_t *regs)
621{
622 struct unw_frame_info tcore_info;
623
624 if (current == task) {
625 unw_init_running(do_copy_regs, regs);
626 } else {
627 memset(&tcore_info, 0, sizeof(tcore_info));
628 unw_init_from_blocked_task(&tcore_info, task);
629 do_copy_task_regs(task, &tcore_info, regs);
630 }
631 return 1;
632}
633
634void
635ia64_elf_core_copy_regs (struct pt_regs *pt, elf_gregset_t dst)
636{
637 unw_init_running(do_copy_regs, dst);
638}
639
640int
641dump_task_fpu (struct task_struct *task, elf_fpregset_t *dst)
642{
643 struct unw_frame_info tcore_info;
644
645 if (current == task) {
646 unw_init_running(do_dump_fpu, dst);
647 } else {
648 memset(&tcore_info, 0, sizeof(tcore_info));
649 unw_init_from_blocked_task(&tcore_info, task);
650 do_dump_task_fpu(task, &tcore_info, dst);
651 }
652 return 1;
653}
654
655int
656dump_fpu (struct pt_regs *pt, elf_fpregset_t dst)
657{
658 unw_init_running(do_dump_fpu, dst);
659 return 1; /* f0-f31 are always valid so we always return 1 */
660}
661
662long
663sys_execve (char __user *filename, char __user * __user *argv, char __user * __user *envp,
664 struct pt_regs *regs)
665{
666 char *fname;
667 int error;
668
669 fname = getname(filename);
670 error = PTR_ERR(fname);
671 if (IS_ERR(fname))
672 goto out;
673 error = do_execve(fname, argv, envp, regs);
674 putname(fname);
675out:
676 return error;
677}
678
679pid_t
680kernel_thread (int (*fn)(void *), void *arg, unsigned long flags)
681{
682 extern void start_kernel_thread (void);
683 unsigned long *helper_fptr = (unsigned long *) &start_kernel_thread;
684 struct {
685 struct switch_stack sw;
686 struct pt_regs pt;
687 } regs;
688
689 memset(&regs, 0, sizeof(regs));
690 regs.pt.cr_iip = helper_fptr[0]; /* set entry point (IP) */
691 regs.pt.r1 = helper_fptr[1]; /* set GP */
692 regs.pt.r9 = (unsigned long) fn; /* 1st argument */
693 regs.pt.r11 = (unsigned long) arg; /* 2nd argument */
694 /* Preserve PSR bits, except for bits 32-34 and 37-45, which we can't read. */
695 regs.pt.cr_ipsr = ia64_getreg(_IA64_REG_PSR) | IA64_PSR_BN;
696 regs.pt.cr_ifs = 1UL << 63; /* mark as valid, empty frame */
697 regs.sw.ar_fpsr = regs.pt.ar_fpsr = ia64_getreg(_IA64_REG_AR_FPSR);
698 regs.sw.ar_bspstore = (unsigned long) current + IA64_RBS_OFFSET;
699 regs.sw.pr = (1 << PRED_KERNEL_STACK);
700 return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, &regs.pt, 0, NULL, NULL);
701}
702EXPORT_SYMBOL(kernel_thread);
703
704/* This gets called from kernel_thread() via ia64_invoke_thread_helper(). */
705int
706kernel_thread_helper (int (*fn)(void *), void *arg)
707{
708#ifdef CONFIG_IA32_SUPPORT
6450578f 709 if (IS_IA32_PROCESS(task_pt_regs(current))) {
1da177e4
LT
710 /* A kernel thread is always a 64-bit process. */
711 current->thread.map_base = DEFAULT_MAP_BASE;
712 current->thread.task_size = DEFAULT_TASK_SIZE;
713 ia64_set_kr(IA64_KR_IO_BASE, current->thread.old_iob);
714 ia64_set_kr(IA64_KR_TSSD, current->thread.old_k1);
715 }
716#endif
717 return (*fn)(arg);
718}
719
720/*
721 * Flush thread state. This is called when a thread does an execve().
722 */
723void
724flush_thread (void)
725{
726 /* drop floating-point and debug-register state if it exists: */
727 current->thread.flags &= ~(IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID);
728 ia64_drop_fpu(current);
27af4cfd 729#ifdef CONFIG_IA32_SUPPORT
6450578f 730 if (IS_IA32_PROCESS(task_pt_regs(current))) {
1da177e4 731 ia32_drop_partial_page_list(current);
bd1d6e24
RH
732 current->thread.task_size = IA32_PAGE_OFFSET;
733 set_fs(USER_DS);
734 }
27af4cfd 735#endif
1da177e4
LT
736}
737
738/*
739 * Clean up state associated with current thread. This is called when
740 * the thread calls exit().
741 */
742void
743exit_thread (void)
744{
9508dbfe 745
1da177e4
LT
746 ia64_drop_fpu(current);
747#ifdef CONFIG_PERFMON
748 /* if needed, stop monitoring and flush state to perfmon context */
749 if (current->thread.pfm_context)
750 pfm_exit_thread(current);
751
752 /* free debug register resources */
753 if (current->thread.flags & IA64_THREAD_DBG_VALID)
754 pfm_release_debug_registers(current);
755#endif
6450578f 756 if (IS_IA32_PROCESS(task_pt_regs(current)))
1da177e4
LT
757 ia32_drop_partial_page_list(current);
758}
759
760unsigned long
761get_wchan (struct task_struct *p)
762{
763 struct unw_frame_info info;
764 unsigned long ip;
765 int count = 0;
766
6ae38488
RH
767 if (!p || p == current || p->state == TASK_RUNNING)
768 return 0;
769
1da177e4
LT
770 /*
771 * Note: p may not be a blocked task (it could be current or
772 * another process running on some other CPU. Rather than
773 * trying to determine if p is really blocked, we just assume
774 * it's blocked and rely on the unwind routines to fail
775 * gracefully if the process wasn't really blocked after all.
776 * --davidm 99/12/15
777 */
778 unw_init_from_blocked_task(&info, p);
779 do {
6ae38488
RH
780 if (p->state == TASK_RUNNING)
781 return 0;
1da177e4
LT
782 if (unw_unwind(&info) < 0)
783 return 0;
784 unw_get_ip(&info, &ip);
785 if (!in_sched_functions(ip))
786 return ip;
787 } while (count++ < 16);
788 return 0;
789}
790
791void
792cpu_halt (void)
793{
794 pal_power_mgmt_info_u_t power_info[8];
795 unsigned long min_power;
796 int i, min_power_state;
797
798 if (ia64_pal_halt_info(power_info) != 0)
799 return;
800
801 min_power_state = 0;
802 min_power = power_info[0].pal_power_mgmt_info_s.power_consumption;
803 for (i = 1; i < 8; ++i)
804 if (power_info[i].pal_power_mgmt_info_s.im
805 && power_info[i].pal_power_mgmt_info_s.power_consumption < min_power) {
806 min_power = power_info[i].pal_power_mgmt_info_s.power_consumption;
807 min_power_state = i;
808 }
809
810 while (1)
811 ia64_pal_halt(min_power_state);
812}
813
c237508a
H
814void machine_shutdown(void)
815{
816#ifdef CONFIG_HOTPLUG_CPU
817 int cpu;
818
819 for_each_online_cpu(cpu) {
820 if (cpu != smp_processor_id())
821 cpu_down(cpu);
822 }
823#endif
824#ifdef CONFIG_KEXEC
825 kexec_disable_iosapic();
826#endif
827}
828
1da177e4
LT
829void
830machine_restart (char *restart_cmd)
831{
9138d581 832 (void) notify_die(DIE_MACHINE_RESTART, restart_cmd, NULL, 0, 0, 0);
1da177e4
LT
833 (*efi.reset_system)(EFI_RESET_WARM, 0, 0, NULL);
834}
835
1da177e4
LT
836void
837machine_halt (void)
838{
9138d581 839 (void) notify_die(DIE_MACHINE_HALT, "", NULL, 0, 0, 0);
1da177e4
LT
840 cpu_halt();
841}
842
1da177e4
LT
843void
844machine_power_off (void)
845{
846 if (pm_power_off)
847 pm_power_off();
848 machine_halt();
849}
850