[net-next-2.6.git] / arch / ia64 / kernel / pci-swiotlb.c

/* Glue code to lib/swiotlb.c */

#include <linux/pci.h>
#include <linux/gfp.h>
#include <linux/cache.h>
#include <linux/module.h>
#include <linux/dma-mapping.h>

#include <asm/swiotlb.h>
#include <asm/dma.h>
#include <asm/iommu.h>
#include <asm/machvec.h>

int swiotlb __read_mostly;
EXPORT_SYMBOL(swiotlb);

static void *ia64_swiotlb_alloc_coherent(struct device *dev, size_t size,
					 dma_addr_t *dma_handle, gfp_t gfp)
{
	if (dev->coherent_dma_mask != DMA_BIT_MASK(64))
		gfp |= GFP_DMA;
	return swiotlb_alloc_coherent(dev, size, dma_handle, gfp);
}

struct dma_map_ops swiotlb_dma_ops = {
	.alloc_coherent = ia64_swiotlb_alloc_coherent,
	.free_coherent = swiotlb_free_coherent,
	.map_page = swiotlb_map_page,
	.unmap_page = swiotlb_unmap_page,
	.map_sg = swiotlb_map_sg_attrs,
	.unmap_sg = swiotlb_unmap_sg_attrs,
	.sync_single_for_cpu = swiotlb_sync_single_for_cpu,
	.sync_single_for_device = swiotlb_sync_single_for_device,
	.sync_single_range_for_cpu = swiotlb_sync_single_range_for_cpu,
	.sync_single_range_for_device = swiotlb_sync_single_range_for_device,
	.sync_sg_for_cpu = swiotlb_sync_sg_for_cpu,
	.sync_sg_for_device = swiotlb_sync_sg_for_device,
	.dma_supported = swiotlb_dma_supported,
	.mapping_error = swiotlb_dma_mapping_error,
};

void __init swiotlb_dma_init(void)
{
	dma_ops = &swiotlb_dma_ops;
	swiotlb_init(1);
}

void __init pci_swiotlb_init(void)
{
	if (!iommu_detected) {
#ifdef CONFIG_IA64_GENERIC
		swiotlb = 1;
		printk(KERN_INFO "PCI-DMA: Re-initialize machine vector.\n");
		machvec_init("dig");
		swiotlb_init(1);
		dma_ops = &swiotlb_dma_ops;
#else
		panic("Unable to find Intel IOMMU");
#endif
	}
}
Commit	Line	Data
62fdd767 FY	1	/* Glue code to lib/swiotlb.c */
	2
	3	#include <linux/pci.h>
5a0e3ad6	4	#include <linux/gfp.h>
62fdd767 FY	5	#include <linux/cache.h>
	6	#include <linux/module.h>
	7	#include <linux/dma-mapping.h>
	8
	9	#include <asm/swiotlb.h>
	10	#include <asm/dma.h>
	11	#include <asm/iommu.h>
	12	#include <asm/machvec.h>
	13
	14	int swiotlb __read_mostly;
	15	EXPORT_SYMBOL(swiotlb);
	16
97d9800d FT	17	static void ia64_swiotlb_alloc_coherent(struct device dev, size_t size,
	18	dma_addr_t *dma_handle, gfp_t gfp)
	19	{
e930438c	20	if (dev->coherent_dma_mask != DMA_BIT_MASK(64))
97d9800d FT	21	gfp \|= GFP_DMA;
	22	return swiotlb_alloc_coherent(dev, size, dma_handle, gfp);
	23	}
	24
160c1d8e	25	struct dma_map_ops swiotlb_dma_ops = {
97d9800d	26	.alloc_coherent = ia64_swiotlb_alloc_coherent,
62fdd767	27	.free_coherent = swiotlb_free_coherent,
160c1d8e FT	28	.map_page = swiotlb_map_page,
	29	.unmap_page = swiotlb_unmap_page,
	30	.map_sg = swiotlb_map_sg_attrs,
	31	.unmap_sg = swiotlb_unmap_sg_attrs,
62fdd767 FY	32	.sync_single_for_cpu = swiotlb_sync_single_for_cpu,
	33	.sync_single_for_device = swiotlb_sync_single_for_device,
	34	.sync_single_range_for_cpu = swiotlb_sync_single_range_for_cpu,
	35	.sync_single_range_for_device = swiotlb_sync_single_range_for_device,
	36	.sync_sg_for_cpu = swiotlb_sync_sg_for_cpu,
	37	.sync_sg_for_device = swiotlb_sync_sg_for_device,
160c1d8e	38	.dma_supported = swiotlb_dma_supported,
c82e4417	39	.mapping_error = swiotlb_dma_mapping_error,
62fdd767 FY	40	};
62fdd767 FY	41
07716e4d	42	void __init swiotlb_dma_init(void)
4d9b977c FT	43	{
4d9b977c FT	44	dma_ops = &swiotlb_dma_ops;
ad32e8cb	45	swiotlb_init(1);
4d9b977c FT	46	}
4d9b977c FT	47
62fdd767 FY	48	void __init pci_swiotlb_init(void)
62fdd767 FY	49	{
ba6c5487	50	if (!iommu_detected) {
62fdd767 FY	51	#ifdef CONFIG_IA64_GENERIC
	52	swiotlb = 1;
	53	printk(KERN_INFO "PCI-DMA: Re-initialize machine vector.\n");
	54	machvec_init("dig");
ad32e8cb	55	swiotlb_init(1);
62fdd767 FY	56	dma_ops = &swiotlb_dma_ops;
	57	#else
	58	panic("Unable to find Intel IOMMU");
	59	#endif
	60	}
	61	}