[net-next-2.6.git] / arch / ia64 / include / asm / cache.h

#ifndef _ASM_IA64_CACHE_H
#define _ASM_IA64_CACHE_H


/*
 * Copyright (C) 1998-2000 Hewlett-Packard Co
 *	David Mosberger-Tang <davidm@hpl.hp.com>
 */

/* Bytes per L1 (data) cache line.  */
#define L1_CACHE_SHIFT		CONFIG_IA64_L1_CACHE_SHIFT
#define L1_CACHE_BYTES		(1 << L1_CACHE_SHIFT)

#ifdef CONFIG_SMP
# define SMP_CACHE_SHIFT	L1_CACHE_SHIFT
# define SMP_CACHE_BYTES	L1_CACHE_BYTES
#else
  /*
   * The "aligned" directive can only _increase_ alignment, so this is
   * safe and provides an easy way to avoid wasting space on a
   * uni-processor:
   */
# define SMP_CACHE_SHIFT	3
# define SMP_CACHE_BYTES	(1 << 3)
#endif

#define __read_mostly __attribute__((__section__(".data..read_mostly")))

#endif /* _ASM_IA64_CACHE_H */
Commit	Line	Data
1da177e4 LT	1	#ifndef _ASM_IA64_CACHE_H
	2	#define _ASM_IA64_CACHE_H
	3
1da177e4 LT	4
	5	/*
	6	* Copyright (C) 1998-2000 Hewlett-Packard Co
	7	* David Mosberger-Tang <davidm@hpl.hp.com>
	8	*/
	9
	10	/* Bytes per L1 (data) cache line. */
	11	#define L1_CACHE_SHIFT CONFIG_IA64_L1_CACHE_SHIFT
	12	#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
	13
1da177e4 LT	14	#ifdef CONFIG_SMP
	15	# define SMP_CACHE_SHIFT L1_CACHE_SHIFT
	16	# define SMP_CACHE_BYTES L1_CACHE_BYTES
	17	#else
	18	/*
	19	* The "aligned" directive can only _increase_ alignment, so this is
	20	* safe and provides an easy way to avoid wasting space on a
	21	* uni-processor:
	22	*/
	23	# define SMP_CACHE_SHIFT 3
	24	# define SMP_CACHE_BYTES (1 << 3)
	25	#endif
	26
54cb27a7	27	#define __read_mostly __attribute__((__section__(".data..read_mostly")))
804f1594	28
1da177e4	29	#endif /* _ASM_IA64_CACHE_H */