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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Machine specific setup for generic | |
3 | */ | |
4 | ||
1da177e4 | 5 | #include <linux/init.h> |
1da177e4 | 6 | #include <linux/interrupt.h> |
1da177e4 | 7 | #include <asm/arch_hooks.h> |
e75eac33 JF |
8 | #include <asm/voyager.h> |
9 | #include <asm/e820.h> | |
d5fb3426 | 10 | #include <asm/io.h> |
e75eac33 | 11 | #include <asm/setup.h> |
1da177e4 LT |
12 | |
13 | void __init pre_intr_init_hook(void) | |
14 | { | |
15 | init_ISA_irqs(); | |
16 | } | |
17 | ||
18 | /* | |
19 | * IRQ2 is cascade interrupt to second interrupt controller | |
20 | */ | |
21 | static struct irqaction irq2 = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL}; | |
22 | ||
23 | void __init intr_init_hook(void) | |
24 | { | |
25 | #ifdef CONFIG_SMP | |
26 | smp_intr_init(); | |
27 | #endif | |
28 | ||
d5fb3426 | 29 | setup_irq(2, &irq2); |
1da177e4 LT |
30 | } |
31 | ||
32 | void __init pre_setup_arch_hook(void) | |
33 | { | |
34 | /* Voyagers run their CPUs from independent clocks, so disable | |
35 | * the TSC code because we can't sync them */ | |
36 | tsc_disable = 1; | |
37 | } | |
38 | ||
39 | void __init trap_init_hook(void) | |
40 | { | |
41 | } | |
42 | ||
9f483519 JB |
43 | static struct irqaction irq0 = { |
44 | .handler = timer_interrupt, | |
b34942fe | 45 | .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL, |
9f483519 JB |
46 | .mask = CPU_MASK_NONE, |
47 | .name = "timer" | |
48 | }; | |
1da177e4 LT |
49 | |
50 | void __init time_init_hook(void) | |
51 | { | |
9f483519 | 52 | irq0.mask = cpumask_of_cpu(safe_smp_processor_id()); |
1da177e4 LT |
53 | setup_irq(0, &irq0); |
54 | } | |
e75eac33 JF |
55 | |
56 | /* Hook for machine specific memory setup. */ | |
57 | ||
58 | char * __init machine_specific_memory_setup(void) | |
59 | { | |
60 | char *who; | |
61 | ||
62 | who = "NOT VOYAGER"; | |
63 | ||
64 | if(voyager_level == 5) { | |
65 | __u32 addr, length; | |
66 | int i; | |
67 | ||
68 | who = "Voyager-SUS"; | |
69 | ||
70 | e820.nr_map = 0; | |
71 | for(i=0; voyager_memory_detect(i, &addr, &length); i++) { | |
72 | add_memory_region(addr, length, E820_RAM); | |
73 | } | |
74 | return who; | |
75 | } else if(voyager_level == 4) { | |
76 | __u32 tom; | |
77 | __u16 catbase = inb(VOYAGER_SSPB_RELOCATION_PORT)<<8; | |
78 | /* select the DINO config space */ | |
79 | outb(VOYAGER_DINO, VOYAGER_CAT_CONFIG_PORT); | |
80 | /* Read DINO top of memory register */ | |
81 | tom = ((inb(catbase + 0x4) & 0xf0) << 16) | |
82 | + ((inb(catbase + 0x5) & 0x7f) << 24); | |
83 | ||
84 | if(inb(catbase) != VOYAGER_DINO) { | |
85 | printk(KERN_ERR "Voyager: Failed to get DINO for L4, setting tom to EXT_MEM_K\n"); | |
86 | tom = (EXT_MEM_K)<<10; | |
87 | } | |
88 | who = "Voyager-TOM"; | |
89 | add_memory_region(0, 0x9f000, E820_RAM); | |
90 | /* map from 1M to top of memory */ | |
91 | add_memory_region(1*1024*1024, tom - 1*1024*1024, E820_RAM); | |
92 | /* FIXME: Should check the ASICs to see if I need to | |
93 | * take out the 8M window. Just do it at the moment | |
94 | * */ | |
95 | add_memory_region(8*1024*1024, 8*1024*1024, E820_RESERVED); | |
96 | return who; | |
97 | } | |
98 | ||
99 | who = "BIOS-e820"; | |
100 | ||
101 | /* | |
102 | * Try to copy the BIOS-supplied E820-map. | |
103 | * | |
104 | * Otherwise fake a memory map; one section from 0k->640k, | |
105 | * the next section from 1mb->appropriate_mem_k | |
106 | */ | |
107 | sanitize_e820_map(E820_MAP, &E820_MAP_NR); | |
108 | if (copy_e820_map(E820_MAP, E820_MAP_NR) < 0) { | |
109 | unsigned long mem_size; | |
110 | ||
111 | /* compare results from other methods and take the greater */ | |
112 | if (ALT_MEM_K < EXT_MEM_K) { | |
113 | mem_size = EXT_MEM_K; | |
114 | who = "BIOS-88"; | |
115 | } else { | |
116 | mem_size = ALT_MEM_K; | |
117 | who = "BIOS-e801"; | |
118 | } | |
119 | ||
120 | e820.nr_map = 0; | |
121 | add_memory_region(0, LOWMEMSIZE(), E820_RAM); | |
122 | add_memory_region(HIGH_MEMORY, mem_size << 10, E820_RAM); | |
123 | } | |
124 | return who; | |
125 | } |