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Commit | Line | Data |
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1da177e4 | 1 | /* |
841e40b3 | 2 | * (c) 2003, 2004, 2005 Advanced Micro Devices, Inc. |
1da177e4 LT |
3 | * Your use of this code is subject to the terms and conditions of the |
4 | * GNU general public license version 2. See "COPYING" or | |
5 | * http://www.gnu.org/licenses/gpl.html | |
6 | * | |
065b807c | 7 | * Support : mark.langsdorf@amd.com |
1da177e4 LT |
8 | * |
9 | * Based on the powernow-k7.c module written by Dave Jones. | |
10 | * (C) 2003 Dave Jones <davej@codemonkey.org.uk> on behalf of SuSE Labs | |
11 | * (C) 2004 Dominik Brodowski <linux@brodo.de> | |
12 | * (C) 2004 Pavel Machek <pavel@suse.cz> | |
13 | * Licensed under the terms of the GNU GPL License version 2. | |
14 | * Based upon datasheets & sample CPUs kindly provided by AMD. | |
15 | * | |
16 | * Valuable input gratefully received from Dave Jones, Pavel Machek, | |
17 | * Dominik Brodowski, and others. | |
065b807c | 18 | * Originally developed by Paul Devriendt. |
1da177e4 LT |
19 | * Processor information obtained from Chapter 9 (Power and Thermal Management) |
20 | * of the "BIOS and Kernel Developer's Guide for the AMD Athlon 64 and AMD | |
21 | * Opteron Processors" available for download from www.amd.com | |
22 | * | |
23 | * Tables for specific CPUs can be infrerred from | |
065b807c | 24 | * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/30430.pdf |
1da177e4 LT |
25 | */ |
26 | ||
27 | #include <linux/kernel.h> | |
28 | #include <linux/smp.h> | |
29 | #include <linux/module.h> | |
30 | #include <linux/init.h> | |
31 | #include <linux/cpufreq.h> | |
32 | #include <linux/slab.h> | |
33 | #include <linux/string.h> | |
065b807c | 34 | #include <linux/cpumask.h> |
4e57b681 | 35 | #include <linux/sched.h> /* for current / set_cpus_allowed() */ |
1da177e4 LT |
36 | |
37 | #include <asm/msr.h> | |
38 | #include <asm/io.h> | |
39 | #include <asm/delay.h> | |
40 | ||
41 | #ifdef CONFIG_X86_POWERNOW_K8_ACPI | |
42 | #include <linux/acpi.h> | |
43 | #include <acpi/processor.h> | |
44 | #endif | |
45 | ||
46 | #define PFX "powernow-k8: " | |
47 | #define BFX PFX "BIOS error: " | |
2a1c1c87 | 48 | #define VERSION "version 1.60.1" |
1da177e4 LT |
49 | #include "powernow-k8.h" |
50 | ||
51 | /* serialize freq changes */ | |
52 | static DECLARE_MUTEX(fidvid_sem); | |
53 | ||
54 | static struct powernow_k8_data *powernow_data[NR_CPUS]; | |
55 | ||
065b807c | 56 | #ifndef CONFIG_SMP |
ad90573f | 57 | static cpumask_t cpu_core_map[1] = { CPU_MASK_ALL }; |
065b807c DJ |
58 | #endif |
59 | ||
1da177e4 LT |
60 | /* Return a frequency in MHz, given an input fid */ |
61 | static u32 find_freq_from_fid(u32 fid) | |
62 | { | |
63 | return 800 + (fid * 100); | |
64 | } | |
65 | ||
66 | /* Return a frequency in KHz, given an input fid */ | |
67 | static u32 find_khz_freq_from_fid(u32 fid) | |
68 | { | |
69 | return 1000 * find_freq_from_fid(fid); | |
70 | } | |
71 | ||
72 | /* Return a voltage in miliVolts, given an input vid */ | |
73 | static u32 find_millivolts_from_vid(struct powernow_k8_data *data, u32 vid) | |
74 | { | |
75 | return 1550-vid*25; | |
76 | } | |
77 | ||
78 | /* Return the vco fid for an input fid | |
79 | * | |
80 | * Each "low" fid has corresponding "high" fid, and you can get to "low" fids | |
81 | * only from corresponding high fids. This returns "high" fid corresponding to | |
82 | * "low" one. | |
83 | */ | |
84 | static u32 convert_fid_to_vco_fid(u32 fid) | |
85 | { | |
32ee8c3e | 86 | if (fid < HI_FID_TABLE_BOTTOM) |
1da177e4 | 87 | return 8 + (2 * fid); |
32ee8c3e | 88 | else |
1da177e4 | 89 | return fid; |
1da177e4 LT |
90 | } |
91 | ||
92 | /* | |
93 | * Return 1 if the pending bit is set. Unless we just instructed the processor | |
94 | * to transition to a new state, seeing this bit set is really bad news. | |
95 | */ | |
96 | static int pending_bit_stuck(void) | |
97 | { | |
98 | u32 lo, hi; | |
99 | ||
100 | rdmsr(MSR_FIDVID_STATUS, lo, hi); | |
101 | return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0; | |
102 | } | |
103 | ||
104 | /* | |
105 | * Update the global current fid / vid values from the status msr. | |
106 | * Returns 1 on error. | |
107 | */ | |
108 | static int query_current_values_with_pending_wait(struct powernow_k8_data *data) | |
109 | { | |
110 | u32 lo, hi; | |
111 | u32 i = 0; | |
112 | ||
7153d961 | 113 | do { |
0213df74 DJ |
114 | if (i++ > 10000) { |
115 | dprintk("detected change pending stuck\n"); | |
1da177e4 LT |
116 | return 1; |
117 | } | |
118 | rdmsr(MSR_FIDVID_STATUS, lo, hi); | |
7153d961 | 119 | } while (lo & MSR_S_LO_CHANGE_PENDING); |
1da177e4 LT |
120 | |
121 | data->currvid = hi & MSR_S_HI_CURRENT_VID; | |
122 | data->currfid = lo & MSR_S_LO_CURRENT_FID; | |
123 | ||
124 | return 0; | |
125 | } | |
126 | ||
127 | /* the isochronous relief time */ | |
128 | static void count_off_irt(struct powernow_k8_data *data) | |
129 | { | |
130 | udelay((1 << data->irt) * 10); | |
131 | return; | |
132 | } | |
133 | ||
134 | /* the voltage stabalization time */ | |
135 | static void count_off_vst(struct powernow_k8_data *data) | |
136 | { | |
137 | udelay(data->vstable * VST_UNITS_20US); | |
138 | return; | |
139 | } | |
140 | ||
141 | /* need to init the control msr to a safe value (for each cpu) */ | |
142 | static void fidvid_msr_init(void) | |
143 | { | |
144 | u32 lo, hi; | |
145 | u8 fid, vid; | |
146 | ||
147 | rdmsr(MSR_FIDVID_STATUS, lo, hi); | |
148 | vid = hi & MSR_S_HI_CURRENT_VID; | |
149 | fid = lo & MSR_S_LO_CURRENT_FID; | |
150 | lo = fid | (vid << MSR_C_LO_VID_SHIFT); | |
151 | hi = MSR_C_HI_STP_GNT_BENIGN; | |
152 | dprintk("cpu%d, init lo 0x%x, hi 0x%x\n", smp_processor_id(), lo, hi); | |
153 | wrmsr(MSR_FIDVID_CTL, lo, hi); | |
154 | } | |
155 | ||
156 | ||
157 | /* write the new fid value along with the other control fields to the msr */ | |
158 | static int write_new_fid(struct powernow_k8_data *data, u32 fid) | |
159 | { | |
160 | u32 lo; | |
161 | u32 savevid = data->currvid; | |
0213df74 | 162 | u32 i = 0; |
1da177e4 LT |
163 | |
164 | if ((fid & INVALID_FID_MASK) || (data->currvid & INVALID_VID_MASK)) { | |
165 | printk(KERN_ERR PFX "internal error - overflow on fid write\n"); | |
166 | return 1; | |
167 | } | |
168 | ||
169 | lo = fid | (data->currvid << MSR_C_LO_VID_SHIFT) | MSR_C_LO_INIT_FID_VID; | |
170 | ||
171 | dprintk("writing fid 0x%x, lo 0x%x, hi 0x%x\n", | |
172 | fid, lo, data->plllock * PLL_LOCK_CONVERSION); | |
173 | ||
0213df74 DJ |
174 | do { |
175 | wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION); | |
176 | if (i++ > 100) { | |
177 | printk(KERN_ERR PFX "internal error - pending bit very stuck - no further pstate changes possible\n"); | |
63172cb3 | 178 | return 1; |
32ee8c3e | 179 | } |
0213df74 | 180 | } while (query_current_values_with_pending_wait(data)); |
1da177e4 LT |
181 | |
182 | count_off_irt(data); | |
183 | ||
184 | if (savevid != data->currvid) { | |
185 | printk(KERN_ERR PFX "vid change on fid trans, old 0x%x, new 0x%x\n", | |
186 | savevid, data->currvid); | |
187 | return 1; | |
188 | } | |
189 | ||
190 | if (fid != data->currfid) { | |
191 | printk(KERN_ERR PFX "fid trans failed, fid 0x%x, curr 0x%x\n", fid, | |
192 | data->currfid); | |
193 | return 1; | |
194 | } | |
195 | ||
196 | return 0; | |
197 | } | |
198 | ||
199 | /* Write a new vid to the hardware */ | |
200 | static int write_new_vid(struct powernow_k8_data *data, u32 vid) | |
201 | { | |
202 | u32 lo; | |
203 | u32 savefid = data->currfid; | |
0213df74 | 204 | int i = 0; |
1da177e4 LT |
205 | |
206 | if ((data->currfid & INVALID_FID_MASK) || (vid & INVALID_VID_MASK)) { | |
207 | printk(KERN_ERR PFX "internal error - overflow on vid write\n"); | |
208 | return 1; | |
209 | } | |
210 | ||
211 | lo = data->currfid | (vid << MSR_C_LO_VID_SHIFT) | MSR_C_LO_INIT_FID_VID; | |
212 | ||
213 | dprintk("writing vid 0x%x, lo 0x%x, hi 0x%x\n", | |
214 | vid, lo, STOP_GRANT_5NS); | |
215 | ||
0213df74 DJ |
216 | do { |
217 | wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS); | |
6df89006 DJ |
218 | if (i++ > 100) { |
219 | printk(KERN_ERR PFX "internal error - pending bit very stuck - no further pstate changes possible\n"); | |
220 | return 1; | |
221 | } | |
0213df74 | 222 | } while (query_current_values_with_pending_wait(data)); |
1da177e4 LT |
223 | |
224 | if (savefid != data->currfid) { | |
225 | printk(KERN_ERR PFX "fid changed on vid trans, old 0x%x new 0x%x\n", | |
226 | savefid, data->currfid); | |
227 | return 1; | |
228 | } | |
229 | ||
230 | if (vid != data->currvid) { | |
231 | printk(KERN_ERR PFX "vid trans failed, vid 0x%x, curr 0x%x\n", vid, | |
232 | data->currvid); | |
233 | return 1; | |
234 | } | |
235 | ||
236 | return 0; | |
237 | } | |
238 | ||
239 | /* | |
240 | * Reduce the vid by the max of step or reqvid. | |
241 | * Decreasing vid codes represent increasing voltages: | |
841e40b3 | 242 | * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of VID_OFF is off. |
1da177e4 LT |
243 | */ |
244 | static int decrease_vid_code_by_step(struct powernow_k8_data *data, u32 reqvid, u32 step) | |
245 | { | |
246 | if ((data->currvid - reqvid) > step) | |
247 | reqvid = data->currvid - step; | |
248 | ||
249 | if (write_new_vid(data, reqvid)) | |
250 | return 1; | |
251 | ||
252 | count_off_vst(data); | |
253 | ||
254 | return 0; | |
255 | } | |
256 | ||
257 | /* Change the fid and vid, by the 3 phases. */ | |
258 | static int transition_fid_vid(struct powernow_k8_data *data, u32 reqfid, u32 reqvid) | |
259 | { | |
260 | if (core_voltage_pre_transition(data, reqvid)) | |
261 | return 1; | |
262 | ||
263 | if (core_frequency_transition(data, reqfid)) | |
264 | return 1; | |
265 | ||
266 | if (core_voltage_post_transition(data, reqvid)) | |
267 | return 1; | |
268 | ||
269 | if (query_current_values_with_pending_wait(data)) | |
270 | return 1; | |
271 | ||
272 | if ((reqfid != data->currfid) || (reqvid != data->currvid)) { | |
273 | printk(KERN_ERR PFX "failed (cpu%d): req 0x%x 0x%x, curr 0x%x 0x%x\n", | |
274 | smp_processor_id(), | |
275 | reqfid, reqvid, data->currfid, data->currvid); | |
276 | return 1; | |
277 | } | |
278 | ||
279 | dprintk("transitioned (cpu%d): new fid 0x%x, vid 0x%x\n", | |
280 | smp_processor_id(), data->currfid, data->currvid); | |
281 | ||
282 | return 0; | |
283 | } | |
284 | ||
285 | /* Phase 1 - core voltage transition ... setup voltage */ | |
286 | static int core_voltage_pre_transition(struct powernow_k8_data *data, u32 reqvid) | |
287 | { | |
288 | u32 rvosteps = data->rvo; | |
289 | u32 savefid = data->currfid; | |
065b807c | 290 | u32 maxvid, lo; |
1da177e4 LT |
291 | |
292 | dprintk("ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, reqvid 0x%x, rvo 0x%x\n", | |
293 | smp_processor_id(), | |
294 | data->currfid, data->currvid, reqvid, data->rvo); | |
295 | ||
065b807c DJ |
296 | rdmsr(MSR_FIDVID_STATUS, lo, maxvid); |
297 | maxvid = 0x1f & (maxvid >> 16); | |
298 | dprintk("ph1 maxvid=0x%x\n", maxvid); | |
299 | if (reqvid < maxvid) /* lower numbers are higher voltages */ | |
300 | reqvid = maxvid; | |
301 | ||
1da177e4 LT |
302 | while (data->currvid > reqvid) { |
303 | dprintk("ph1: curr 0x%x, req vid 0x%x\n", | |
304 | data->currvid, reqvid); | |
305 | if (decrease_vid_code_by_step(data, reqvid, data->vidmvs)) | |
306 | return 1; | |
307 | } | |
308 | ||
065b807c DJ |
309 | while ((rvosteps > 0) && ((data->rvo + data->currvid) > reqvid)) { |
310 | if (data->currvid == maxvid) { | |
1da177e4 LT |
311 | rvosteps = 0; |
312 | } else { | |
313 | dprintk("ph1: changing vid for rvo, req 0x%x\n", | |
314 | data->currvid - 1); | |
315 | if (decrease_vid_code_by_step(data, data->currvid - 1, 1)) | |
316 | return 1; | |
317 | rvosteps--; | |
318 | } | |
319 | } | |
320 | ||
321 | if (query_current_values_with_pending_wait(data)) | |
322 | return 1; | |
323 | ||
324 | if (savefid != data->currfid) { | |
325 | printk(KERN_ERR PFX "ph1 err, currfid changed 0x%x\n", data->currfid); | |
326 | return 1; | |
327 | } | |
328 | ||
329 | dprintk("ph1 complete, currfid 0x%x, currvid 0x%x\n", | |
330 | data->currfid, data->currvid); | |
331 | ||
332 | return 0; | |
333 | } | |
334 | ||
335 | /* Phase 2 - core frequency transition */ | |
336 | static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid) | |
337 | { | |
019a61b9 | 338 | u32 vcoreqfid, vcocurrfid, vcofiddiff, fid_interval, savevid = data->currvid; |
1da177e4 LT |
339 | |
340 | if ((reqfid < HI_FID_TABLE_BOTTOM) && (data->currfid < HI_FID_TABLE_BOTTOM)) { | |
341 | printk(KERN_ERR PFX "ph2: illegal lo-lo transition 0x%x 0x%x\n", | |
342 | reqfid, data->currfid); | |
343 | return 1; | |
344 | } | |
345 | ||
346 | if (data->currfid == reqfid) { | |
347 | printk(KERN_ERR PFX "ph2 null fid transition 0x%x\n", data->currfid); | |
348 | return 0; | |
349 | } | |
350 | ||
351 | dprintk("ph2 (cpu%d): starting, currfid 0x%x, currvid 0x%x, reqfid 0x%x\n", | |
352 | smp_processor_id(), | |
353 | data->currfid, data->currvid, reqfid); | |
354 | ||
355 | vcoreqfid = convert_fid_to_vco_fid(reqfid); | |
356 | vcocurrfid = convert_fid_to_vco_fid(data->currfid); | |
357 | vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid | |
358 | : vcoreqfid - vcocurrfid; | |
359 | ||
360 | while (vcofiddiff > 2) { | |
019a61b9 LM |
361 | (data->currfid & 1) ? (fid_interval = 1) : (fid_interval = 2); |
362 | ||
1da177e4 LT |
363 | if (reqfid > data->currfid) { |
364 | if (data->currfid > LO_FID_TABLE_TOP) { | |
019a61b9 | 365 | if (write_new_fid(data, data->currfid + fid_interval)) { |
1da177e4 LT |
366 | return 1; |
367 | } | |
368 | } else { | |
369 | if (write_new_fid | |
370 | (data, 2 + convert_fid_to_vco_fid(data->currfid))) { | |
371 | return 1; | |
372 | } | |
373 | } | |
374 | } else { | |
019a61b9 | 375 | if (write_new_fid(data, data->currfid - fid_interval)) |
1da177e4 LT |
376 | return 1; |
377 | } | |
378 | ||
379 | vcocurrfid = convert_fid_to_vco_fid(data->currfid); | |
380 | vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid | |
381 | : vcoreqfid - vcocurrfid; | |
382 | } | |
383 | ||
384 | if (write_new_fid(data, reqfid)) | |
385 | return 1; | |
386 | ||
387 | if (query_current_values_with_pending_wait(data)) | |
388 | return 1; | |
389 | ||
390 | if (data->currfid != reqfid) { | |
391 | printk(KERN_ERR PFX | |
392 | "ph2: mismatch, failed fid transition, curr 0x%x, req 0x%x\n", | |
393 | data->currfid, reqfid); | |
394 | return 1; | |
395 | } | |
396 | ||
397 | if (savevid != data->currvid) { | |
398 | printk(KERN_ERR PFX "ph2: vid changed, save 0x%x, curr 0x%x\n", | |
399 | savevid, data->currvid); | |
400 | return 1; | |
401 | } | |
402 | ||
403 | dprintk("ph2 complete, currfid 0x%x, currvid 0x%x\n", | |
404 | data->currfid, data->currvid); | |
405 | ||
406 | return 0; | |
407 | } | |
408 | ||
409 | /* Phase 3 - core voltage transition flow ... jump to the final vid. */ | |
410 | static int core_voltage_post_transition(struct powernow_k8_data *data, u32 reqvid) | |
411 | { | |
412 | u32 savefid = data->currfid; | |
413 | u32 savereqvid = reqvid; | |
414 | ||
415 | dprintk("ph3 (cpu%d): starting, currfid 0x%x, currvid 0x%x\n", | |
416 | smp_processor_id(), | |
417 | data->currfid, data->currvid); | |
418 | ||
419 | if (reqvid != data->currvid) { | |
420 | if (write_new_vid(data, reqvid)) | |
421 | return 1; | |
422 | ||
423 | if (savefid != data->currfid) { | |
424 | printk(KERN_ERR PFX | |
425 | "ph3: bad fid change, save 0x%x, curr 0x%x\n", | |
426 | savefid, data->currfid); | |
427 | return 1; | |
428 | } | |
429 | ||
430 | if (data->currvid != reqvid) { | |
431 | printk(KERN_ERR PFX | |
432 | "ph3: failed vid transition\n, req 0x%x, curr 0x%x", | |
433 | reqvid, data->currvid); | |
434 | return 1; | |
435 | } | |
436 | } | |
437 | ||
438 | if (query_current_values_with_pending_wait(data)) | |
439 | return 1; | |
440 | ||
441 | if (savereqvid != data->currvid) { | |
442 | dprintk("ph3 failed, currvid 0x%x\n", data->currvid); | |
443 | return 1; | |
444 | } | |
445 | ||
446 | if (savefid != data->currfid) { | |
447 | dprintk("ph3 failed, currfid changed 0x%x\n", | |
448 | data->currfid); | |
449 | return 1; | |
450 | } | |
451 | ||
452 | dprintk("ph3 complete, currfid 0x%x, currvid 0x%x\n", | |
453 | data->currfid, data->currvid); | |
454 | ||
455 | return 0; | |
456 | } | |
457 | ||
458 | static int check_supported_cpu(unsigned int cpu) | |
459 | { | |
460 | cpumask_t oldmask = CPU_MASK_ALL; | |
461 | u32 eax, ebx, ecx, edx; | |
462 | unsigned int rc = 0; | |
463 | ||
464 | oldmask = current->cpus_allowed; | |
465 | set_cpus_allowed(current, cpumask_of_cpu(cpu)); | |
1da177e4 LT |
466 | |
467 | if (smp_processor_id() != cpu) { | |
8aae8284 | 468 | printk(KERN_ERR PFX "limiting to cpu %u failed\n", cpu); |
1da177e4 LT |
469 | goto out; |
470 | } | |
471 | ||
472 | if (current_cpu_data.x86_vendor != X86_VENDOR_AMD) | |
473 | goto out; | |
474 | ||
475 | eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE); | |
2c906ae6 DJ |
476 | if ((eax & CPUID_XFAM) != CPUID_XFAM_K8) |
477 | goto out; | |
478 | ||
1da177e4 | 479 | if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) || |
019a61b9 | 480 | ((eax & CPUID_XMOD) > CPUID_XMOD_REV_G)) { |
1da177e4 LT |
481 | printk(KERN_INFO PFX "Processor cpuid %x not supported\n", eax); |
482 | goto out; | |
483 | } | |
484 | ||
485 | eax = cpuid_eax(CPUID_GET_MAX_CAPABILITIES); | |
486 | if (eax < CPUID_FREQ_VOLT_CAPABILITIES) { | |
487 | printk(KERN_INFO PFX | |
488 | "No frequency change capabilities detected\n"); | |
489 | goto out; | |
490 | } | |
491 | ||
492 | cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx); | |
493 | if ((edx & P_STATE_TRANSITION_CAPABLE) != P_STATE_TRANSITION_CAPABLE) { | |
494 | printk(KERN_INFO PFX "Power state transitions not supported\n"); | |
495 | goto out; | |
496 | } | |
497 | ||
498 | rc = 1; | |
499 | ||
500 | out: | |
501 | set_cpus_allowed(current, oldmask); | |
1da177e4 | 502 | return rc; |
1da177e4 LT |
503 | } |
504 | ||
505 | static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst, u8 maxvid) | |
506 | { | |
507 | unsigned int j; | |
508 | u8 lastfid = 0xff; | |
509 | ||
510 | for (j = 0; j < data->numps; j++) { | |
511 | if (pst[j].vid > LEAST_VID) { | |
512 | printk(KERN_ERR PFX "vid %d invalid : 0x%x\n", j, pst[j].vid); | |
513 | return -EINVAL; | |
514 | } | |
515 | if (pst[j].vid < data->rvo) { /* vid + rvo >= 0 */ | |
516 | printk(KERN_ERR BFX "0 vid exceeded with pstate %d\n", j); | |
517 | return -ENODEV; | |
518 | } | |
519 | if (pst[j].vid < maxvid + data->rvo) { /* vid + rvo >= maxvid */ | |
520 | printk(KERN_ERR BFX "maxvid exceeded with pstate %d\n", j); | |
521 | return -ENODEV; | |
522 | } | |
8aae8284 JS |
523 | if (pst[j].fid > MAX_FID) { |
524 | printk(KERN_ERR BFX "maxfid exceeded with pstate %d\n", j); | |
525 | return -ENODEV; | |
526 | } | |
8aae8284 | 527 | if (j && (pst[j].fid < HI_FID_TABLE_BOTTOM)) { |
1da177e4 | 528 | /* Only first fid is allowed to be in "low" range */ |
8aae8284 | 529 | printk(KERN_ERR BFX "two low fids - %d : 0x%x\n", j, pst[j].fid); |
1da177e4 LT |
530 | return -EINVAL; |
531 | } | |
532 | if (pst[j].fid < lastfid) | |
533 | lastfid = pst[j].fid; | |
534 | } | |
535 | if (lastfid & 1) { | |
8aae8284 | 536 | printk(KERN_ERR BFX "lastfid invalid\n"); |
1da177e4 LT |
537 | return -EINVAL; |
538 | } | |
539 | if (lastfid > LO_FID_TABLE_TOP) | |
8aae8284 | 540 | printk(KERN_INFO BFX "first fid not from lo freq table\n"); |
1da177e4 LT |
541 | |
542 | return 0; | |
543 | } | |
544 | ||
545 | static void print_basics(struct powernow_k8_data *data) | |
546 | { | |
547 | int j; | |
548 | for (j = 0; j < data->numps; j++) { | |
549 | if (data->powernow_table[j].frequency != CPUFREQ_ENTRY_INVALID) | |
550 | printk(KERN_INFO PFX " %d : fid 0x%x (%d MHz), vid 0x%x (%d mV)\n", j, | |
551 | data->powernow_table[j].index & 0xff, | |
552 | data->powernow_table[j].frequency/1000, | |
553 | data->powernow_table[j].index >> 8, | |
554 | find_millivolts_from_vid(data, data->powernow_table[j].index >> 8)); | |
555 | } | |
556 | if (data->batps) | |
557 | printk(KERN_INFO PFX "Only %d pstates on battery\n", data->batps); | |
558 | } | |
559 | ||
560 | static int fill_powernow_table(struct powernow_k8_data *data, struct pst_s *pst, u8 maxvid) | |
561 | { | |
562 | struct cpufreq_frequency_table *powernow_table; | |
563 | unsigned int j; | |
564 | ||
565 | if (data->batps) { /* use ACPI support to get full speed on mains power */ | |
566 | printk(KERN_WARNING PFX "Only %d pstates usable (use ACPI driver for full range\n", data->batps); | |
567 | data->numps = data->batps; | |
568 | } | |
569 | ||
570 | for ( j=1; j<data->numps; j++ ) { | |
571 | if (pst[j-1].fid >= pst[j].fid) { | |
572 | printk(KERN_ERR PFX "PST out of sequence\n"); | |
573 | return -EINVAL; | |
574 | } | |
575 | } | |
576 | ||
577 | if (data->numps < 2) { | |
578 | printk(KERN_ERR PFX "no p states to transition\n"); | |
579 | return -ENODEV; | |
580 | } | |
581 | ||
582 | if (check_pst_table(data, pst, maxvid)) | |
583 | return -EINVAL; | |
584 | ||
585 | powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table) | |
586 | * (data->numps + 1)), GFP_KERNEL); | |
587 | if (!powernow_table) { | |
588 | printk(KERN_ERR PFX "powernow_table memory alloc failure\n"); | |
589 | return -ENOMEM; | |
590 | } | |
591 | ||
592 | for (j = 0; j < data->numps; j++) { | |
593 | powernow_table[j].index = pst[j].fid; /* lower 8 bits */ | |
594 | powernow_table[j].index |= (pst[j].vid << 8); /* upper 8 bits */ | |
595 | powernow_table[j].frequency = find_khz_freq_from_fid(pst[j].fid); | |
596 | } | |
597 | powernow_table[data->numps].frequency = CPUFREQ_TABLE_END; | |
598 | powernow_table[data->numps].index = 0; | |
599 | ||
600 | if (query_current_values_with_pending_wait(data)) { | |
601 | kfree(powernow_table); | |
602 | return -EIO; | |
603 | } | |
604 | ||
605 | dprintk("cfid 0x%x, cvid 0x%x\n", data->currfid, data->currvid); | |
606 | data->powernow_table = powernow_table; | |
607 | print_basics(data); | |
608 | ||
609 | for (j = 0; j < data->numps; j++) | |
610 | if ((pst[j].fid==data->currfid) && (pst[j].vid==data->currvid)) | |
611 | return 0; | |
612 | ||
613 | dprintk("currfid/vid do not match PST, ignoring\n"); | |
614 | return 0; | |
615 | } | |
616 | ||
617 | /* Find and validate the PSB/PST table in BIOS. */ | |
618 | static int find_psb_table(struct powernow_k8_data *data) | |
619 | { | |
620 | struct psb_s *psb; | |
621 | unsigned int i; | |
622 | u32 mvs; | |
623 | u8 maxvid; | |
624 | u32 cpst = 0; | |
625 | u32 thiscpuid; | |
626 | ||
627 | for (i = 0xc0000; i < 0xffff0; i += 0x10) { | |
628 | /* Scan BIOS looking for the signature. */ | |
629 | /* It can not be at ffff0 - it is too big. */ | |
630 | ||
631 | psb = phys_to_virt(i); | |
632 | if (memcmp(psb, PSB_ID_STRING, PSB_ID_STRING_LEN) != 0) | |
633 | continue; | |
634 | ||
635 | dprintk("found PSB header at 0x%p\n", psb); | |
636 | ||
637 | dprintk("table vers: 0x%x\n", psb->tableversion); | |
638 | if (psb->tableversion != PSB_VERSION_1_4) { | |
cc6e8de8 | 639 | printk(KERN_ERR BFX "PSB table is not v1.4\n"); |
1da177e4 LT |
640 | return -ENODEV; |
641 | } | |
642 | ||
643 | dprintk("flags: 0x%x\n", psb->flags1); | |
644 | if (psb->flags1) { | |
645 | printk(KERN_ERR BFX "unknown flags\n"); | |
646 | return -ENODEV; | |
647 | } | |
648 | ||
649 | data->vstable = psb->vstable; | |
650 | dprintk("voltage stabilization time: %d(*20us)\n", data->vstable); | |
651 | ||
652 | dprintk("flags2: 0x%x\n", psb->flags2); | |
653 | data->rvo = psb->flags2 & 3; | |
654 | data->irt = ((psb->flags2) >> 2) & 3; | |
655 | mvs = ((psb->flags2) >> 4) & 3; | |
656 | data->vidmvs = 1 << mvs; | |
657 | data->batps = ((psb->flags2) >> 6) & 3; | |
658 | ||
659 | dprintk("ramp voltage offset: %d\n", data->rvo); | |
660 | dprintk("isochronous relief time: %d\n", data->irt); | |
661 | dprintk("maximum voltage step: %d - 0x%x\n", mvs, data->vidmvs); | |
662 | ||
663 | dprintk("numpst: 0x%x\n", psb->num_tables); | |
664 | cpst = psb->num_tables; | |
665 | if ((psb->cpuid == 0x00000fc0) || (psb->cpuid == 0x00000fe0) ){ | |
666 | thiscpuid = cpuid_eax(CPUID_PROCESSOR_SIGNATURE); | |
667 | if ((thiscpuid == 0x00000fc0) || (thiscpuid == 0x00000fe0) ) { | |
668 | cpst = 1; | |
669 | } | |
670 | } | |
671 | if (cpst != 1) { | |
672 | printk(KERN_ERR BFX "numpst must be 1\n"); | |
673 | return -ENODEV; | |
674 | } | |
675 | ||
676 | data->plllock = psb->plllocktime; | |
677 | dprintk("plllocktime: 0x%x (units 1us)\n", psb->plllocktime); | |
678 | dprintk("maxfid: 0x%x\n", psb->maxfid); | |
679 | dprintk("maxvid: 0x%x\n", psb->maxvid); | |
680 | maxvid = psb->maxvid; | |
681 | ||
682 | data->numps = psb->numps; | |
683 | dprintk("numpstates: 0x%x\n", data->numps); | |
684 | return fill_powernow_table(data, (struct pst_s *)(psb+1), maxvid); | |
685 | } | |
686 | /* | |
687 | * If you see this message, complain to BIOS manufacturer. If | |
688 | * he tells you "we do not support Linux" or some similar | |
689 | * nonsense, remember that Windows 2000 uses the same legacy | |
690 | * mechanism that the old Linux PSB driver uses. Tell them it | |
691 | * is broken with Windows 2000. | |
692 | * | |
693 | * The reference to the AMD documentation is chapter 9 in the | |
694 | * BIOS and Kernel Developer's Guide, which is available on | |
695 | * www.amd.com | |
696 | */ | |
cc6e8de8 | 697 | printk(KERN_ERR PFX "BIOS error - no PSB or ACPI _PSS objects\n"); |
1da177e4 LT |
698 | return -ENODEV; |
699 | } | |
700 | ||
701 | #ifdef CONFIG_X86_POWERNOW_K8_ACPI | |
702 | static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index) | |
703 | { | |
704 | if (!data->acpi_data.state_count) | |
705 | return; | |
706 | ||
707 | data->irt = (data->acpi_data.states[index].control >> IRT_SHIFT) & IRT_MASK; | |
708 | data->rvo = (data->acpi_data.states[index].control >> RVO_SHIFT) & RVO_MASK; | |
841e40b3 | 709 | data->exttype = (data->acpi_data.states[index].control >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK; |
1da177e4 LT |
710 | data->plllock = (data->acpi_data.states[index].control >> PLL_L_SHIFT) & PLL_L_MASK; |
711 | data->vidmvs = 1 << ((data->acpi_data.states[index].control >> MVS_SHIFT) & MVS_MASK); | |
712 | data->vstable = (data->acpi_data.states[index].control >> VST_SHIFT) & VST_MASK; | |
713 | } | |
714 | ||
715 | static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data) | |
716 | { | |
717 | int i; | |
718 | int cntlofreq = 0; | |
719 | struct cpufreq_frequency_table *powernow_table; | |
720 | ||
721 | if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) { | |
065b807c | 722 | dprintk("register performance failed: bad ACPI data\n"); |
1da177e4 LT |
723 | return -EIO; |
724 | } | |
725 | ||
726 | /* verify the data contained in the ACPI structures */ | |
727 | if (data->acpi_data.state_count <= 1) { | |
728 | dprintk("No ACPI P-States\n"); | |
729 | goto err_out; | |
730 | } | |
731 | ||
732 | if ((data->acpi_data.control_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE) || | |
733 | (data->acpi_data.status_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) { | |
734 | dprintk("Invalid control/status registers (%x - %x)\n", | |
735 | data->acpi_data.control_register.space_id, | |
736 | data->acpi_data.status_register.space_id); | |
737 | goto err_out; | |
738 | } | |
739 | ||
740 | /* fill in data->powernow_table */ | |
741 | powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table) | |
742 | * (data->acpi_data.state_count + 1)), GFP_KERNEL); | |
743 | if (!powernow_table) { | |
744 | dprintk("powernow_table memory alloc failure\n"); | |
745 | goto err_out; | |
746 | } | |
747 | ||
748 | for (i = 0; i < data->acpi_data.state_count; i++) { | |
094ce7fd DJ |
749 | u32 fid; |
750 | u32 vid; | |
751 | ||
752 | if (data->exttype) { | |
753 | fid = data->acpi_data.states[i].status & FID_MASK; | |
754 | vid = (data->acpi_data.states[i].status >> VID_SHIFT) & VID_MASK; | |
841e40b3 | 755 | } else { |
094ce7fd DJ |
756 | fid = data->acpi_data.states[i].control & FID_MASK; |
757 | vid = (data->acpi_data.states[i].control >> VID_SHIFT) & VID_MASK; | |
841e40b3 | 758 | } |
1da177e4 LT |
759 | |
760 | dprintk(" %d : fid 0x%x, vid 0x%x\n", i, fid, vid); | |
761 | ||
762 | powernow_table[i].index = fid; /* lower 8 bits */ | |
763 | powernow_table[i].index |= (vid << 8); /* upper 8 bits */ | |
764 | powernow_table[i].frequency = find_khz_freq_from_fid(fid); | |
765 | ||
766 | /* verify frequency is OK */ | |
767 | if ((powernow_table[i].frequency > (MAX_FREQ * 1000)) || | |
768 | (powernow_table[i].frequency < (MIN_FREQ * 1000))) { | |
769 | dprintk("invalid freq %u kHz, ignoring\n", powernow_table[i].frequency); | |
770 | powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID; | |
771 | continue; | |
772 | } | |
773 | ||
774 | /* verify voltage is OK - BIOSs are using "off" to indicate invalid */ | |
841e40b3 | 775 | if (vid == VID_OFF) { |
1da177e4 LT |
776 | dprintk("invalid vid %u, ignoring\n", vid); |
777 | powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID; | |
778 | continue; | |
779 | } | |
780 | ||
065b807c DJ |
781 | /* verify only 1 entry from the lo frequency table */ |
782 | if (fid < HI_FID_TABLE_BOTTOM) { | |
783 | if (cntlofreq) { | |
32ee8c3e | 784 | /* if both entries are the same, ignore this one ... */ |
065b807c DJ |
785 | if ((powernow_table[i].frequency != powernow_table[cntlofreq].frequency) || |
786 | (powernow_table[i].index != powernow_table[cntlofreq].index)) { | |
787 | printk(KERN_ERR PFX "Too many lo freq table entries\n"); | |
788 | goto err_out_mem; | |
789 | } | |
790 | ||
791 | dprintk("double low frequency table entry, ignoring it.\n"); | |
792 | powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID; | |
793 | continue; | |
794 | } else | |
795 | cntlofreq = i; | |
1da177e4 LT |
796 | } |
797 | ||
798 | if (powernow_table[i].frequency != (data->acpi_data.states[i].core_frequency * 1000)) { | |
799 | printk(KERN_INFO PFX "invalid freq entries %u kHz vs. %u kHz\n", | |
800 | powernow_table[i].frequency, | |
801 | (unsigned int) (data->acpi_data.states[i].core_frequency * 1000)); | |
802 | powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID; | |
803 | continue; | |
804 | } | |
805 | } | |
806 | ||
807 | powernow_table[data->acpi_data.state_count].frequency = CPUFREQ_TABLE_END; | |
808 | powernow_table[data->acpi_data.state_count].index = 0; | |
809 | data->powernow_table = powernow_table; | |
810 | ||
811 | /* fill in data */ | |
812 | data->numps = data->acpi_data.state_count; | |
813 | print_basics(data); | |
814 | powernow_k8_acpi_pst_values(data, 0); | |
815 | ||
816 | /* notify BIOS that we exist */ | |
817 | acpi_processor_notify_smm(THIS_MODULE); | |
818 | ||
819 | return 0; | |
820 | ||
821 | err_out_mem: | |
822 | kfree(powernow_table); | |
823 | ||
824 | err_out: | |
825 | acpi_processor_unregister_performance(&data->acpi_data, data->cpu); | |
826 | ||
827 | /* data->acpi_data.state_count informs us at ->exit() whether ACPI was used */ | |
828 | data->acpi_data.state_count = 0; | |
829 | ||
830 | return -ENODEV; | |
831 | } | |
832 | ||
833 | static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data) | |
834 | { | |
835 | if (data->acpi_data.state_count) | |
836 | acpi_processor_unregister_performance(&data->acpi_data, data->cpu); | |
837 | } | |
838 | ||
839 | #else | |
840 | static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data) { return -ENODEV; } | |
841 | static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data) { return; } | |
842 | static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index) { return; } | |
843 | #endif /* CONFIG_X86_POWERNOW_K8_ACPI */ | |
844 | ||
845 | /* Take a frequency, and issue the fid/vid transition command */ | |
846 | static int transition_frequency(struct powernow_k8_data *data, unsigned int index) | |
847 | { | |
848 | u32 fid; | |
849 | u32 vid; | |
065b807c | 850 | int res, i; |
1da177e4 LT |
851 | struct cpufreq_freqs freqs; |
852 | ||
853 | dprintk("cpu %d transition to index %u\n", smp_processor_id(), index); | |
854 | ||
855 | /* fid are the lower 8 bits of the index we stored into | |
32ee8c3e | 856 | * the cpufreq frequency table in find_psb_table, vid are |
1da177e4 LT |
857 | * the upper 8 bits. |
858 | */ | |
859 | ||
860 | fid = data->powernow_table[index].index & 0xFF; | |
861 | vid = (data->powernow_table[index].index & 0xFF00) >> 8; | |
862 | ||
863 | dprintk("table matched fid 0x%x, giving vid 0x%x\n", fid, vid); | |
864 | ||
865 | if (query_current_values_with_pending_wait(data)) | |
866 | return 1; | |
867 | ||
868 | if ((data->currvid == vid) && (data->currfid == fid)) { | |
869 | dprintk("target matches current values (fid 0x%x, vid 0x%x)\n", | |
870 | fid, vid); | |
871 | return 0; | |
872 | } | |
873 | ||
874 | if ((fid < HI_FID_TABLE_BOTTOM) && (data->currfid < HI_FID_TABLE_BOTTOM)) { | |
065b807c DJ |
875 | printk(KERN_ERR PFX |
876 | "ignoring illegal change in lo freq table-%x to 0x%x\n", | |
1da177e4 LT |
877 | data->currfid, fid); |
878 | return 1; | |
879 | } | |
880 | ||
881 | dprintk("cpu %d, changing to fid 0x%x, vid 0x%x\n", | |
882 | smp_processor_id(), fid, vid); | |
883 | ||
884 | freqs.cpu = data->cpu; | |
1da177e4 LT |
885 | freqs.old = find_khz_freq_from_fid(data->currfid); |
886 | freqs.new = find_khz_freq_from_fid(fid); | |
065b807c DJ |
887 | for_each_cpu_mask(i, cpu_core_map[data->cpu]) { |
888 | freqs.cpu = i; | |
889 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | |
890 | } | |
1da177e4 | 891 | |
1da177e4 | 892 | res = transition_fid_vid(data, fid, vid); |
1da177e4 LT |
893 | |
894 | freqs.new = find_khz_freq_from_fid(data->currfid); | |
065b807c DJ |
895 | for_each_cpu_mask(i, cpu_core_map[data->cpu]) { |
896 | freqs.cpu = i; | |
897 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | |
898 | } | |
1da177e4 LT |
899 | return res; |
900 | } | |
901 | ||
902 | /* Driver entry point to switch to the target frequency */ | |
903 | static int powernowk8_target(struct cpufreq_policy *pol, unsigned targfreq, unsigned relation) | |
904 | { | |
905 | cpumask_t oldmask = CPU_MASK_ALL; | |
906 | struct powernow_k8_data *data = powernow_data[pol->cpu]; | |
907 | u32 checkfid = data->currfid; | |
908 | u32 checkvid = data->currvid; | |
909 | unsigned int newstate; | |
910 | int ret = -EIO; | |
911 | ||
912 | /* only run on specific CPU from here on */ | |
913 | oldmask = current->cpus_allowed; | |
914 | set_cpus_allowed(current, cpumask_of_cpu(pol->cpu)); | |
1da177e4 LT |
915 | |
916 | if (smp_processor_id() != pol->cpu) { | |
8aae8284 | 917 | printk(KERN_ERR PFX "limiting to cpu %u failed\n", pol->cpu); |
1da177e4 LT |
918 | goto err_out; |
919 | } | |
920 | ||
921 | if (pending_bit_stuck()) { | |
922 | printk(KERN_ERR PFX "failing targ, change pending bit set\n"); | |
923 | goto err_out; | |
924 | } | |
925 | ||
926 | dprintk("targ: cpu %d, %d kHz, min %d, max %d, relation %d\n", | |
927 | pol->cpu, targfreq, pol->min, pol->max, relation); | |
928 | ||
929 | if (query_current_values_with_pending_wait(data)) { | |
930 | ret = -EIO; | |
931 | goto err_out; | |
932 | } | |
933 | ||
934 | dprintk("targ: curr fid 0x%x, vid 0x%x\n", | |
935 | data->currfid, data->currvid); | |
936 | ||
937 | if ((checkvid != data->currvid) || (checkfid != data->currfid)) { | |
065b807c DJ |
938 | printk(KERN_INFO PFX |
939 | "error - out of sync, fix 0x%x 0x%x, vid 0x%x 0x%x\n", | |
940 | checkfid, data->currfid, checkvid, data->currvid); | |
1da177e4 LT |
941 | } |
942 | ||
943 | if (cpufreq_frequency_table_target(pol, data->powernow_table, targfreq, relation, &newstate)) | |
944 | goto err_out; | |
945 | ||
065b807c DJ |
946 | down(&fidvid_sem); |
947 | ||
1da177e4 LT |
948 | powernow_k8_acpi_pst_values(data, newstate); |
949 | ||
950 | if (transition_frequency(data, newstate)) { | |
951 | printk(KERN_ERR PFX "transition frequency failed\n"); | |
952 | ret = 1; | |
065b807c | 953 | up(&fidvid_sem); |
1da177e4 LT |
954 | goto err_out; |
955 | } | |
065b807c DJ |
956 | up(&fidvid_sem); |
957 | ||
1da177e4 LT |
958 | pol->cur = find_khz_freq_from_fid(data->currfid); |
959 | ret = 0; | |
960 | ||
961 | err_out: | |
962 | set_cpus_allowed(current, oldmask); | |
1da177e4 LT |
963 | return ret; |
964 | } | |
965 | ||
966 | /* Driver entry point to verify the policy and range of frequencies */ | |
967 | static int powernowk8_verify(struct cpufreq_policy *pol) | |
968 | { | |
969 | struct powernow_k8_data *data = powernow_data[pol->cpu]; | |
970 | ||
971 | return cpufreq_frequency_table_verify(pol, data->powernow_table); | |
972 | } | |
973 | ||
974 | /* per CPU init entry point to the driver */ | |
aa41eb99 | 975 | static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol) |
1da177e4 LT |
976 | { |
977 | struct powernow_k8_data *data; | |
978 | cpumask_t oldmask = CPU_MASK_ALL; | |
ad90573f | 979 | int rc, i; |
1da177e4 | 980 | |
8aae8284 JS |
981 | if (!cpu_online(pol->cpu)) |
982 | return -ENODEV; | |
983 | ||
1da177e4 LT |
984 | if (!check_supported_cpu(pol->cpu)) |
985 | return -ENODEV; | |
986 | ||
bfdc708d | 987 | data = kzalloc(sizeof(struct powernow_k8_data), GFP_KERNEL); |
1da177e4 LT |
988 | if (!data) { |
989 | printk(KERN_ERR PFX "unable to alloc powernow_k8_data"); | |
990 | return -ENOMEM; | |
991 | } | |
1da177e4 LT |
992 | |
993 | data->cpu = pol->cpu; | |
994 | ||
995 | if (powernow_k8_cpu_init_acpi(data)) { | |
996 | /* | |
997 | * Use the PSB BIOS structure. This is only availabe on | |
998 | * an UP version, and is deprecated by AMD. | |
999 | */ | |
1000 | ||
1001 | if ((num_online_cpus() != 1) || (num_possible_cpus() != 1)) { | |
065b807c | 1002 | printk(KERN_ERR PFX "MP systems not supported by PSB BIOS structure\n"); |
1da177e4 LT |
1003 | kfree(data); |
1004 | return -ENODEV; | |
1005 | } | |
1006 | if (pol->cpu != 0) { | |
1007 | printk(KERN_ERR PFX "init not cpu 0\n"); | |
1008 | kfree(data); | |
1009 | return -ENODEV; | |
1010 | } | |
1011 | rc = find_psb_table(data); | |
1012 | if (rc) { | |
1013 | kfree(data); | |
1014 | return -ENODEV; | |
1015 | } | |
1016 | } | |
1017 | ||
1018 | /* only run on specific CPU from here on */ | |
1019 | oldmask = current->cpus_allowed; | |
1020 | set_cpus_allowed(current, cpumask_of_cpu(pol->cpu)); | |
1da177e4 LT |
1021 | |
1022 | if (smp_processor_id() != pol->cpu) { | |
8aae8284 | 1023 | printk(KERN_ERR PFX "limiting to cpu %u failed\n", pol->cpu); |
1da177e4 LT |
1024 | goto err_out; |
1025 | } | |
1026 | ||
1027 | if (pending_bit_stuck()) { | |
1028 | printk(KERN_ERR PFX "failing init, change pending bit set\n"); | |
1029 | goto err_out; | |
1030 | } | |
1031 | ||
1032 | if (query_current_values_with_pending_wait(data)) | |
1033 | goto err_out; | |
1034 | ||
1035 | fidvid_msr_init(); | |
1036 | ||
1037 | /* run on any CPU again */ | |
1038 | set_cpus_allowed(current, oldmask); | |
1da177e4 LT |
1039 | |
1040 | pol->governor = CPUFREQ_DEFAULT_GOVERNOR; | |
065b807c | 1041 | pol->cpus = cpu_core_map[pol->cpu]; |
1da177e4 | 1042 | |
32ee8c3e | 1043 | /* Take a crude guess here. |
1da177e4 LT |
1044 | * That guess was in microseconds, so multiply with 1000 */ |
1045 | pol->cpuinfo.transition_latency = (((data->rvo + 8) * data->vstable * VST_UNITS_20US) | |
1046 | + (3 * (1 << data->irt) * 10)) * 1000; | |
1047 | ||
1048 | pol->cur = find_khz_freq_from_fid(data->currfid); | |
1049 | dprintk("policy current frequency %d kHz\n", pol->cur); | |
1050 | ||
1051 | /* min/max the cpu is capable of */ | |
1052 | if (cpufreq_frequency_table_cpuinfo(pol, data->powernow_table)) { | |
1053 | printk(KERN_ERR PFX "invalid powernow_table\n"); | |
1054 | powernow_k8_cpu_exit_acpi(data); | |
1055 | kfree(data->powernow_table); | |
1056 | kfree(data); | |
1057 | return -EINVAL; | |
1058 | } | |
1059 | ||
1060 | cpufreq_frequency_table_get_attr(data->powernow_table, pol->cpu); | |
1061 | ||
1062 | printk("cpu_init done, current fid 0x%x, vid 0x%x\n", | |
1063 | data->currfid, data->currvid); | |
1064 | ||
ad90573f AK |
1065 | for_each_cpu_mask(i, cpu_core_map[pol->cpu]) |
1066 | powernow_data[i] = data; | |
1da177e4 LT |
1067 | |
1068 | return 0; | |
1069 | ||
1070 | err_out: | |
1071 | set_cpus_allowed(current, oldmask); | |
1da177e4 LT |
1072 | powernow_k8_cpu_exit_acpi(data); |
1073 | ||
1074 | kfree(data); | |
1075 | return -ENODEV; | |
1076 | } | |
1077 | ||
1078 | static int __devexit powernowk8_cpu_exit (struct cpufreq_policy *pol) | |
1079 | { | |
1080 | struct powernow_k8_data *data = powernow_data[pol->cpu]; | |
1081 | ||
1082 | if (!data) | |
1083 | return -EINVAL; | |
1084 | ||
1085 | powernow_k8_cpu_exit_acpi(data); | |
1086 | ||
1087 | cpufreq_frequency_table_put_attr(pol->cpu); | |
1088 | ||
1089 | kfree(data->powernow_table); | |
1090 | kfree(data); | |
1091 | ||
1092 | return 0; | |
1093 | } | |
1094 | ||
1095 | static unsigned int powernowk8_get (unsigned int cpu) | |
1096 | { | |
1097 | struct powernow_k8_data *data = powernow_data[cpu]; | |
1098 | cpumask_t oldmask = current->cpus_allowed; | |
1099 | unsigned int khz = 0; | |
1100 | ||
1101 | set_cpus_allowed(current, cpumask_of_cpu(cpu)); | |
1102 | if (smp_processor_id() != cpu) { | |
1103 | printk(KERN_ERR PFX "limiting to CPU %d failed in powernowk8_get\n", cpu); | |
1104 | set_cpus_allowed(current, oldmask); | |
1105 | return 0; | |
1106 | } | |
b9111b7b | 1107 | |
1da177e4 LT |
1108 | if (query_current_values_with_pending_wait(data)) |
1109 | goto out; | |
1110 | ||
1111 | khz = find_khz_freq_from_fid(data->currfid); | |
1112 | ||
b9111b7b | 1113 | out: |
1da177e4 | 1114 | set_cpus_allowed(current, oldmask); |
1da177e4 LT |
1115 | return khz; |
1116 | } | |
1117 | ||
1118 | static struct freq_attr* powernow_k8_attr[] = { | |
1119 | &cpufreq_freq_attr_scaling_available_freqs, | |
1120 | NULL, | |
1121 | }; | |
1122 | ||
1123 | static struct cpufreq_driver cpufreq_amd64_driver = { | |
1124 | .verify = powernowk8_verify, | |
1125 | .target = powernowk8_target, | |
1126 | .init = powernowk8_cpu_init, | |
1127 | .exit = __devexit_p(powernowk8_cpu_exit), | |
1128 | .get = powernowk8_get, | |
1129 | .name = "powernow-k8", | |
1130 | .owner = THIS_MODULE, | |
1131 | .attr = powernow_k8_attr, | |
1132 | }; | |
1133 | ||
1134 | /* driver entry point for init */ | |
aa41eb99 | 1135 | static int __cpuinit powernowk8_init(void) |
1da177e4 LT |
1136 | { |
1137 | unsigned int i, supported_cpus = 0; | |
1138 | ||
a7201156 | 1139 | for_each_online_cpu(i) { |
1da177e4 LT |
1140 | if (check_supported_cpu(i)) |
1141 | supported_cpus++; | |
1142 | } | |
1143 | ||
1144 | if (supported_cpus == num_online_cpus()) { | |
a7201156 AM |
1145 | printk(KERN_INFO PFX "Found %d AMD Athlon 64 / Opteron " |
1146 | "processors (" VERSION ")\n", supported_cpus); | |
1da177e4 LT |
1147 | return cpufreq_register_driver(&cpufreq_amd64_driver); |
1148 | } | |
1149 | ||
1150 | return -ENODEV; | |
1151 | } | |
1152 | ||
1153 | /* driver entry point for term */ | |
1154 | static void __exit powernowk8_exit(void) | |
1155 | { | |
1156 | dprintk("exit\n"); | |
1157 | ||
1158 | cpufreq_unregister_driver(&cpufreq_amd64_driver); | |
1159 | } | |
1160 | ||
8aae8284 | 1161 | MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com> and Mark Langsdorf <mark.langsdorf@amd.com>"); |
1da177e4 LT |
1162 | MODULE_DESCRIPTION("AMD Athlon 64 and Opteron processor frequency driver."); |
1163 | MODULE_LICENSE("GPL"); | |
1164 | ||
1165 | late_initcall(powernowk8_init); | |
1166 | module_exit(powernowk8_exit); |