[net-next-2.6.git] / arch / cris / arch-v32 / drivers / i2c.c

/*!***************************************************************************
*!
*! FILE NAME  : i2c.c
*!
*! DESCRIPTION: implements an interface for IIC/I2C, both directly from other
*!              kernel modules (i2c_writereg/readreg) and from userspace using
*!              ioctl()'s
*!
*! Nov 30 1998  Torbjorn Eliasson  Initial version.
*!              Bjorn Wesen        Elinux kernel version.
*! Jan 14 2000  Johan Adolfsson    Fixed PB shadow register stuff -
*!                                 don't use PB_I2C if DS1302 uses same bits,
*!                                 use PB.
*| June 23 2003 Pieter Grimmerink  Added 'i2c_sendnack'. i2c_readreg now
*|                                 generates nack on last received byte,
*|                                 instead of ack.
*|                                 i2c_getack changed data level while clock
*|                                 was high, causing DS75 to see  a stop condition
*!
*! ---------------------------------------------------------------------------
*!
*! (C) Copyright 1999-2007 Axis Communications AB, LUND, SWEDEN
*!
*!***************************************************************************/

/****************** INCLUDE FILES SECTION ***********************************/

#include <linux/module.h>
#include <linux/sched.h>
#include <linux/errno.h>
#include <linux/kernel.h>
#include <linux/fs.h>
#include <linux/string.h>
#include <linux/init.h>
#include <linux/smp_lock.h>

#include <asm/etraxi2c.h>

#include <asm/system.h>
#include <asm/io.h>
#include <asm/delay.h>

#include "i2c.h"

/****************** I2C DEFINITION SECTION *************************/

#define D(x)

#define I2C_MAJOR 123  /* LOCAL/EXPERIMENTAL */
static const char i2c_name[] = "i2c";

#define CLOCK_LOW_TIME            8
#define CLOCK_HIGH_TIME           8
#define START_CONDITION_HOLD_TIME 8
#define STOP_CONDITION_HOLD_TIME  8
#define ENABLE_OUTPUT 0x01
#define ENABLE_INPUT 0x00
#define I2C_CLOCK_HIGH 1
#define I2C_CLOCK_LOW 0
#define I2C_DATA_HIGH 1
#define I2C_DATA_LOW 0

#define i2c_enable()
#define i2c_disable()

/* enable or disable output-enable, to select output or input on the i2c bus */

#define i2c_dir_out() crisv32_io_set_dir(&cris_i2c_data, crisv32_io_dir_out)
#define i2c_dir_in() crisv32_io_set_dir(&cris_i2c_data, crisv32_io_dir_in)

/* control the i2c clock and data signals */

#define i2c_clk(x) crisv32_io_set(&cris_i2c_clk, x)
#define i2c_data(x) crisv32_io_set(&cris_i2c_data, x)

/* read a bit from the i2c interface */

#define i2c_getbit() crisv32_io_rd(&cris_i2c_data)

#define i2c_delay(usecs) udelay(usecs)

static DEFINE_SPINLOCK(i2c_lock); /* Protect directions etc */

/****************** VARIABLE SECTION ************************************/

static struct crisv32_iopin cris_i2c_clk;
static struct crisv32_iopin cris_i2c_data;

/****************** FUNCTION DEFINITION SECTION *************************/


/* generate i2c start condition */

void
i2c_start(void)
{
	/*
	 * SCL=1 SDA=1
	 */
	i2c_dir_out();
	i2c_delay(CLOCK_HIGH_TIME/6);
	i2c_data(I2C_DATA_HIGH);
	i2c_clk(I2C_CLOCK_HIGH);
	i2c_delay(CLOCK_HIGH_TIME);
	/*
	 * SCL=1 SDA=0
	 */
	i2c_data(I2C_DATA_LOW);
	i2c_delay(START_CONDITION_HOLD_TIME);
	/*
	 * SCL=0 SDA=0
	 */
	i2c_clk(I2C_CLOCK_LOW);
	i2c_delay(CLOCK_LOW_TIME);
}

/* generate i2c stop condition */

void
i2c_stop(void)
{
	i2c_dir_out();

	/*
	 * SCL=0 SDA=0
	 */
	i2c_clk(I2C_CLOCK_LOW);
	i2c_data(I2C_DATA_LOW);
	i2c_delay(CLOCK_LOW_TIME*2);
	/*
	 * SCL=1 SDA=0
	 */
	i2c_clk(I2C_CLOCK_HIGH);
	i2c_delay(CLOCK_HIGH_TIME*2);
	/*
	 * SCL=1 SDA=1
	 */
	i2c_data(I2C_DATA_HIGH);
	i2c_delay(STOP_CONDITION_HOLD_TIME);

	i2c_dir_in();
}

/* write a byte to the i2c interface */

void
i2c_outbyte(unsigned char x)
{
	int i;

	i2c_dir_out();

	for (i = 0; i < 8; i++) {
		if (x & 0x80) {
			i2c_data(I2C_DATA_HIGH);
		} else {
			i2c_data(I2C_DATA_LOW);
		}

		i2c_delay(CLOCK_LOW_TIME/2);
		i2c_clk(I2C_CLOCK_HIGH);
		i2c_delay(CLOCK_HIGH_TIME);
		i2c_clk(I2C_CLOCK_LOW);
		i2c_delay(CLOCK_LOW_TIME/2);
		x <<= 1;
	}
	i2c_data(I2C_DATA_LOW);
	i2c_delay(CLOCK_LOW_TIME/2);

	/*
	 * enable input
	 */
	i2c_dir_in();
}

/* read a byte from the i2c interface */

unsigned char
i2c_inbyte(void)
{
	unsigned char aBitByte = 0;
	int i;

	/* Switch off I2C to get bit */
	i2c_disable();
	i2c_dir_in();
	i2c_delay(CLOCK_HIGH_TIME/2);

	/* Get bit */
	aBitByte |= i2c_getbit();

	/* Enable I2C */
	i2c_enable();
	i2c_delay(CLOCK_LOW_TIME/2);

	for (i = 1; i < 8; i++) {
		aBitByte <<= 1;
		/* Clock pulse */
		i2c_clk(I2C_CLOCK_HIGH);
		i2c_delay(CLOCK_HIGH_TIME);
		i2c_clk(I2C_CLOCK_LOW);
		i2c_delay(CLOCK_LOW_TIME);

		/* Switch off I2C to get bit */
		i2c_disable();
		i2c_dir_in();
		i2c_delay(CLOCK_HIGH_TIME/2);

		/* Get bit */
		aBitByte |= i2c_getbit();

		/* Enable I2C */
		i2c_enable();
		i2c_delay(CLOCK_LOW_TIME/2);
	}
	i2c_clk(I2C_CLOCK_HIGH);
	i2c_delay(CLOCK_HIGH_TIME);

	/*
	 * we leave the clock low, getbyte is usually followed
	 * by sendack/nack, they assume the clock to be low
	 */
	i2c_clk(I2C_CLOCK_LOW);
	return aBitByte;
}

/*#---------------------------------------------------------------------------
*#
*# FUNCTION NAME: i2c_getack
*#
*# DESCRIPTION  : checks if ack was received from ic2
*#
*#--------------------------------------------------------------------------*/

int
i2c_getack(void)
{
	int ack = 1;
	/*
	 * enable output
	 */
	i2c_dir_out();
	/*
	 * Release data bus by setting
	 * data high
	 */
	i2c_data(I2C_DATA_HIGH);
	/*
	 * enable input
	 */
	i2c_dir_in();
	i2c_delay(CLOCK_HIGH_TIME/4);
	/*
	 * generate ACK clock pulse
	 */
	i2c_clk(I2C_CLOCK_HIGH);
#if 0
	/*
	 * Use PORT PB instead of I2C
	 * for input. (I2C not working)
	 */
	i2c_clk(1);
	i2c_data(1);
	/*
	 * switch off I2C
	 */
	i2c_data(1);
	i2c_disable();
	i2c_dir_in();
#endif

	/*
	 * now wait for ack
	 */
	i2c_delay(CLOCK_HIGH_TIME/2);
	/*
	 * check for ack
	 */
	if (i2c_getbit())
		ack = 0;
	i2c_delay(CLOCK_HIGH_TIME/2);
	if (!ack) {
		if (!i2c_getbit()) /* receiver pulld SDA low */
			ack = 1;
		i2c_delay(CLOCK_HIGH_TIME/2);
	}

   /*
    * our clock is high now, make sure data is low
    * before we enable our output. If we keep data high
    * and enable output, we would generate a stop condition.
    */
#if 0
   i2c_data(I2C_DATA_LOW);

	/*
	 * end clock pulse
	 */
	i2c_enable();
	i2c_dir_out();
#endif
	i2c_clk(I2C_CLOCK_LOW);
	i2c_delay(CLOCK_HIGH_TIME/4);
	/*
	 * enable output
	 */
	i2c_dir_out();
	/*
	 * remove ACK clock pulse
	 */
	i2c_data(I2C_DATA_HIGH);
	i2c_delay(CLOCK_LOW_TIME/2);
	return ack;
}

/*#---------------------------------------------------------------------------
*#
*# FUNCTION NAME: I2C::sendAck
*#
*# DESCRIPTION  : Send ACK on received data
*#
*#--------------------------------------------------------------------------*/
void
i2c_sendack(void)
{
	/*
	 * enable output
	 */
	i2c_delay(CLOCK_LOW_TIME);
	i2c_dir_out();
	/*
	 * set ack pulse high
	 */
	i2c_data(I2C_DATA_LOW);
	/*
	 * generate clock pulse
	 */
	i2c_delay(CLOCK_HIGH_TIME/6);
	i2c_clk(I2C_CLOCK_HIGH);
	i2c_delay(CLOCK_HIGH_TIME);
	i2c_clk(I2C_CLOCK_LOW);
	i2c_delay(CLOCK_LOW_TIME/6);
	/*
	 * reset data out
	 */
	i2c_data(I2C_DATA_HIGH);
	i2c_delay(CLOCK_LOW_TIME);

	i2c_dir_in();
}

/*#---------------------------------------------------------------------------
*#
*# FUNCTION NAME: i2c_sendnack
*#
*# DESCRIPTION  : Sends NACK on received data
*#
*#--------------------------------------------------------------------------*/
void
i2c_sendnack(void)
{
	/*
	 * enable output
	 */
	i2c_delay(CLOCK_LOW_TIME);
	i2c_dir_out();
	/*
	 * set data high
	 */
	i2c_data(I2C_DATA_HIGH);
	/*
	 * generate clock pulse
	 */
	i2c_delay(CLOCK_HIGH_TIME/6);
	i2c_clk(I2C_CLOCK_HIGH);
	i2c_delay(CLOCK_HIGH_TIME);
	i2c_clk(I2C_CLOCK_LOW);
	i2c_delay(CLOCK_LOW_TIME);

	i2c_dir_in();
}

/*#---------------------------------------------------------------------------
*#
*# FUNCTION NAME: i2c_write
*#
*# DESCRIPTION  : Writes a value to an I2C device
*#
*#--------------------------------------------------------------------------*/
int
i2c_write(unsigned char theSlave, void *data, size_t nbytes)
{
	int error, cntr = 3;
	unsigned char bytes_wrote = 0;
	unsigned char value;
	unsigned long flags;

	spin_lock_irqsave(&i2c_lock, flags);

	do {
		error = 0;

		i2c_start();
		/*
		 * send slave address
		 */
		i2c_outbyte((theSlave & 0xfe));
		/*
		 * wait for ack
		 */
		if (!i2c_getack())
			error = 1;
		/*
		 * send data
		 */
		for (bytes_wrote = 0; bytes_wrote < nbytes; bytes_wrote++) {
			memcpy(&value, data + bytes_wrote, sizeof value);
			i2c_outbyte(value);
			/*
			 * now it's time to wait for ack
			 */
			if (!i2c_getack())
				error |= 4;
		}
		/*
		 * end byte stream
		 */
		i2c_stop();

	} while (error && cntr--);

	i2c_delay(CLOCK_LOW_TIME);

	spin_unlock_irqrestore(&i2c_lock, flags);

	return -error;
}

/*#---------------------------------------------------------------------------
*#
*# FUNCTION NAME: i2c_read
*#
*# DESCRIPTION  : Reads a value from an I2C device
*#
*#--------------------------------------------------------------------------*/
int
i2c_read(unsigned char theSlave, void *data, size_t nbytes)
{
	unsigned char b = 0;
	unsigned char bytes_read = 0;
	int error, cntr = 3;
	unsigned long flags;

	spin_lock_irqsave(&i2c_lock, flags);

	do {
		error = 0;
		memset(data, 0, nbytes);
		/*
		 * generate start condition
		 */
		i2c_start();
		/*
		 * send slave address
		 */
		i2c_outbyte((theSlave | 0x01));
		/*
		 * wait for ack
		 */
		if (!i2c_getack())
			error = 1;
		/*
		 * fetch data
		 */
		for (bytes_read = 0; bytes_read < nbytes; bytes_read++) {
			b = i2c_inbyte();
			memcpy(data + bytes_read, &b, sizeof b);

			if (bytes_read < (nbytes - 1))
				i2c_sendack();
		}
		/*
		 * last received byte needs to be nacked
		 * instead of acked
		 */
		i2c_sendnack();
		/*
		 * end sequence
		 */
		i2c_stop();
	} while (error && cntr--);

	spin_unlock_irqrestore(&i2c_lock, flags);

	return -error;
}

/*#---------------------------------------------------------------------------
*#
*# FUNCTION NAME: i2c_writereg
*#
*# DESCRIPTION  : Writes a value to an I2C device
*#
*#--------------------------------------------------------------------------*/
int
i2c_writereg(unsigned char theSlave, unsigned char theReg,
	     unsigned char theValue)
{
	int error, cntr = 3;
	unsigned long flags;

	spin_lock_irqsave(&i2c_lock, flags);

	do {
		error = 0;

		i2c_start();
		/*
		 * send slave address
		 */
		i2c_outbyte((theSlave & 0xfe));
		/*
		 * wait for ack
		 */
		if(!i2c_getack())
			error = 1;
		/*
		 * now select register
		 */
		i2c_dir_out();
		i2c_outbyte(theReg);
		/*
		 * now it's time to wait for ack
		 */
		if(!i2c_getack())
			error |= 2;
		/*
		 * send register register data
		 */
		i2c_outbyte(theValue);
		/*
		 * now it's time to wait for ack
		 */
		if(!i2c_getack())
			error |= 4;
		/*
		 * end byte stream
		 */
		i2c_stop();
	} while(error && cntr--);

	i2c_delay(CLOCK_LOW_TIME);

	spin_unlock_irqrestore(&i2c_lock, flags);

	return -error;
}

/*#---------------------------------------------------------------------------
*#
*# FUNCTION NAME: i2c_readreg
*#
*# DESCRIPTION  : Reads a value from the decoder registers.
*#
*#--------------------------------------------------------------------------*/
unsigned char
i2c_readreg(unsigned char theSlave, unsigned char theReg)
{
	unsigned char b = 0;
	int error, cntr = 3;
	unsigned long flags;

	spin_lock_irqsave(&i2c_lock, flags);

	do {
		error = 0;
		/*
		 * generate start condition
		 */
		i2c_start();

		/*
		 * send slave address
		 */
		i2c_outbyte((theSlave & 0xfe));
		/*
		 * wait for ack
		 */
		if(!i2c_getack())
			error = 1;
		/*
		 * now select register
		 */
		i2c_dir_out();
		i2c_outbyte(theReg);
		/*
		 * now it's time to wait for ack
		 */
		if(!i2c_getack())
			error |= 2;
		/*
		 * repeat start condition
		 */
		i2c_delay(CLOCK_LOW_TIME);
		i2c_start();
		/*
		 * send slave address
		 */
		i2c_outbyte(theSlave | 0x01);
		/*
		 * wait for ack
		 */
		if(!i2c_getack())
			error |= 4;
		/*
		 * fetch register
		 */
		b = i2c_inbyte();
		/*
		 * last received byte needs to be nacked
		 * instead of acked
		 */
		i2c_sendnack();
		/*
		 * end sequence
		 */
		i2c_stop();

	} while(error && cntr--);

	spin_unlock_irqrestore(&i2c_lock, flags);

	return b;
}

static int
i2c_open(struct inode *inode, struct file *filp)
{
	cycle_kernel_lock();
	return 0;
}

static int
i2c_release(struct inode *inode, struct file *filp)
{
	return 0;
}

/* Main device API. ioctl's to write or read to/from i2c registers.
 */

static int
i2c_ioctl(struct inode *inode, struct file *file,
	  unsigned int cmd, unsigned long arg)
{
	if(_IOC_TYPE(cmd) != ETRAXI2C_IOCTYPE) {
		return -ENOTTY;
	}

	switch (_IOC_NR(cmd)) {
		case I2C_WRITEREG:
			/* write to an i2c slave */
			D(printk("i2cw %d %d %d\n",
				 I2C_ARGSLAVE(arg),
				 I2C_ARGREG(arg),
				 I2C_ARGVALUE(arg)));

			return i2c_writereg(I2C_ARGSLAVE(arg),
					    I2C_ARGREG(arg),
					    I2C_ARGVALUE(arg));
		case I2C_READREG:
		{
			unsigned char val;
			/* read from an i2c slave */
			D(printk("i2cr %d %d ",
				I2C_ARGSLAVE(arg),
				I2C_ARGREG(arg)));
			val = i2c_readreg(I2C_ARGSLAVE(arg), I2C_ARGREG(arg));
			D(printk("= %d\n", val));
			return val;
		}
		default:
			return -EINVAL;

	}

	return 0;
}

static const struct file_operations i2c_fops = {
	.owner =    THIS_MODULE,
	.ioctl =    i2c_ioctl,
	.open =     i2c_open,
	.release =  i2c_release,
};

static int __init i2c_init(void)
{
	static int res;
	static int first = 1;

	if (!first)
		return res;

	first = 0;

	/* Setup and enable the DATA and CLK pins */

	res = crisv32_io_get_name(&cris_i2c_data,
		CONFIG_ETRAX_V32_I2C_DATA_PORT);
	if (res < 0)
		return res;

	res = crisv32_io_get_name(&cris_i2c_clk, CONFIG_ETRAX_V32_I2C_CLK_PORT);
	crisv32_io_set_dir(&cris_i2c_clk, crisv32_io_dir_out);

	return res;
}


static int __init i2c_register(void)
{
	int res;

	res = i2c_init();
	if (res < 0)
		return res;

	/* register char device */

	res = register_chrdev(I2C_MAJOR, i2c_name, &i2c_fops);
	if (res < 0) {
		printk(KERN_ERR "i2c: couldn't get a major number.\n");
		return res;
	}

	printk(KERN_INFO
		"I2C driver v2.2, (c) 1999-2007 Axis Communications AB\n");

	return 0;
}
/* this makes sure that i2c_init is called during boot */
module_init(i2c_register);

/****************** END OF FILE i2c.c ********************************/
Commit	Line	Data
51533b61 MS	1	/!**************************************************************************
	2	*!
	3	*! FILE NAME : i2c.c
	4	*!
	5	*! DESCRIPTION: implements an interface for IIC/I2C, both directly from other
	6	*! kernel modules (i2c_writereg/readreg) and from userspace using
	7	*! ioctl()'s
	8	*!
	9	*! Nov 30 1998 Torbjorn Eliasson Initial version.
	10	*! Bjorn Wesen Elinux kernel version.
	11	*! Jan 14 2000 Johan Adolfsson Fixed PB shadow register stuff -
	12	*! don't use PB_I2C if DS1302 uses same bits,
	13	*! use PB.
	14	*\| June 23 2003 Pieter Grimmerink Added 'i2c_sendnack'. i2c_readreg now
	15	*\| generates nack on last received byte,
	16	*\| instead of ack.
	17	*\| i2c_getack changed data level while clock
	18	*\| was high, causing DS75 to see a stop condition
	19	*!
	20	*! ---------------------------------------------------------------------------
	21	*!
201ca54a	22	*! (C) Copyright 1999-2007 Axis Communications AB, LUND, SWEDEN
51533b61 MS	23	*!
51533b61 MS	24	!**************************************************************************/
201ca54a	25
51533b61 MS	26	/**************** INCLUDE FILES SECTION *********************************/
	27
	28	#include <linux/module.h>
	29	#include <linux/sched.h>
51533b61 MS	30	#include <linux/errno.h>
	31	#include <linux/kernel.h>
	32	#include <linux/fs.h>
	33	#include <linux/string.h>
	34	#include <linux/init.h>
f2b9857e	35	#include <linux/smp_lock.h>
51533b61 MS	36
	37	#include <asm/etraxi2c.h>
	38
	39	#include <asm/system.h>
	40	#include <asm/io.h>
	41	#include <asm/delay.h>
	42
	43	#include "i2c.h"
	44
	45	/**************** I2C DEFINITION SECTION ***********************/
	46
	47	#define D(x)
	48
	49	#define I2C_MAJOR 123 /* LOCAL/EXPERIMENTAL */
	50	static const char i2c_name[] = "i2c";
	51
	52	#define CLOCK_LOW_TIME 8
	53	#define CLOCK_HIGH_TIME 8
	54	#define START_CONDITION_HOLD_TIME 8
	55	#define STOP_CONDITION_HOLD_TIME 8
	56	#define ENABLE_OUTPUT 0x01
	57	#define ENABLE_INPUT 0x00
	58	#define I2C_CLOCK_HIGH 1
	59	#define I2C_CLOCK_LOW 0
	60	#define I2C_DATA_HIGH 1
	61	#define I2C_DATA_LOW 0
	62
	63	#define i2c_enable()
	64	#define i2c_disable()
	65
	66	/* enable or disable output-enable, to select output or input on the i2c bus */
	67
	68	#define i2c_dir_out() crisv32_io_set_dir(&cris_i2c_data, crisv32_io_dir_out)
	69	#define i2c_dir_in() crisv32_io_set_dir(&cris_i2c_data, crisv32_io_dir_in)
	70
	71	/* control the i2c clock and data signals */
	72
	73	#define i2c_clk(x) crisv32_io_set(&cris_i2c_clk, x)
	74	#define i2c_data(x) crisv32_io_set(&cris_i2c_data, x)
	75
	76	/* read a bit from the i2c interface */
	77
	78	#define i2c_getbit() crisv32_io_rd(&cris_i2c_data)
	79
	80	#define i2c_delay(usecs) udelay(usecs)
	81
201ca54a JN	82	static DEFINE_SPINLOCK(i2c_lock); /* Protect directions etc */
201ca54a JN	83
51533b61 MS	84	/**************** VARIABLE SECTION **********************************/
	85
	86	static struct crisv32_iopin cris_i2c_clk;
	87	static struct crisv32_iopin cris_i2c_data;
	88
	89	/**************** FUNCTION DEFINITION SECTION ***********************/
	90
	91
	92	/* generate i2c start condition */
	93
	94	void
	95	i2c_start(void)
	96	{
	97	/*
	98	* SCL=1 SDA=1
	99	*/
	100	i2c_dir_out();
	101	i2c_delay(CLOCK_HIGH_TIME/6);
	102	i2c_data(I2C_DATA_HIGH);
	103	i2c_clk(I2C_CLOCK_HIGH);
	104	i2c_delay(CLOCK_HIGH_TIME);
	105	/*
	106	* SCL=1 SDA=0
	107	*/
	108	i2c_data(I2C_DATA_LOW);
	109	i2c_delay(START_CONDITION_HOLD_TIME);
	110	/*
	111	* SCL=0 SDA=0
	112	*/
	113	i2c_clk(I2C_CLOCK_LOW);
	114	i2c_delay(CLOCK_LOW_TIME);
	115	}
	116
	117	/* generate i2c stop condition */
	118
	119	void
	120	i2c_stop(void)
	121	{
	122	i2c_dir_out();
	123
	124	/*
	125	* SCL=0 SDA=0
	126	*/
	127	i2c_clk(I2C_CLOCK_LOW);
	128	i2c_data(I2C_DATA_LOW);
	129	i2c_delay(CLOCK_LOW_TIME*2);
	130	/*
	131	* SCL=1 SDA=0
	132	*/
	133	i2c_clk(I2C_CLOCK_HIGH);
	134	i2c_delay(CLOCK_HIGH_TIME*2);
	135	/*
	136	* SCL=1 SDA=1
	137	*/
	138	i2c_data(I2C_DATA_HIGH);
	139	i2c_delay(STOP_CONDITION_HOLD_TIME);
	140
	141	i2c_dir_in();
	142	}
	143
	144	/* write a byte to the i2c interface */
	145
	146	void
	147	i2c_outbyte(unsigned char x)
148	{
149	int i;
150
151	i2c_dir_out();
152
153	for (i = 0; i < 8; i++) {
154	if (x & 0x80) {
155	i2c_data(I2C_DATA_HIGH);
156	} else {
157	i2c_data(I2C_DATA_LOW);
158	}
159
160	i2c_delay(CLOCK_LOW_TIME/2);
161	i2c_clk(I2C_CLOCK_HIGH);
162	i2c_delay(CLOCK_HIGH_TIME);
163	i2c_clk(I2C_CLOCK_LOW);
164	i2c_delay(CLOCK_LOW_TIME/2);
165	x <<= 1;
166	}
167	i2c_data(I2C_DATA_LOW);
168	i2c_delay(CLOCK_LOW_TIME/2);
169
170	/*
171	* enable input
172	*/
173	i2c_dir_in();
174	}
175
176	/* read a byte from the i2c interface */
177
178	unsigned char
179	i2c_inbyte(void)
180	{
181	unsigned char aBitByte = 0;
182	int i;
183
184	/* Switch off I2C to get bit */
185	i2c_disable();
186	i2c_dir_in();
187	i2c_delay(CLOCK_HIGH_TIME/2);
188
189	/* Get bit */
190	aBitByte \|= i2c_getbit();
191
192	/* Enable I2C */
193	i2c_enable();
194	i2c_delay(CLOCK_LOW_TIME/2);
195
196	for (i = 1; i < 8; i++) {
197	aBitByte <<= 1;
198	/* Clock pulse */
199	i2c_clk(I2C_CLOCK_HIGH);
200	i2c_delay(CLOCK_HIGH_TIME);
201	i2c_clk(I2C_CLOCK_LOW);
202	i2c_delay(CLOCK_LOW_TIME);
203
204	/* Switch off I2C to get bit */
205	i2c_disable();
206	i2c_dir_in();
207	i2c_delay(CLOCK_HIGH_TIME/2);
208
209	/* Get bit */
210	aBitByte \|= i2c_getbit();
211
212	/* Enable I2C */
213	i2c_enable();
214	i2c_delay(CLOCK_LOW_TIME/2);
215	}
216	i2c_clk(I2C_CLOCK_HIGH);
217	i2c_delay(CLOCK_HIGH_TIME);
218
219	/*
220	* we leave the clock low, getbyte is usually followed
221	* by sendack/nack, they assume the clock to be low
222	*/
223	i2c_clk(I2C_CLOCK_LOW);
224	return aBitByte;
225	}
226
227	/*#---------------------------------------------------------------------------
228	*#
229	*# FUNCTION NAME: i2c_getack
230	*#
231	*# DESCRIPTION : checks if ack was received from ic2
232	*#
233	#--------------------------------------------------------------------------/
234
235	int
236	i2c_getack(void)
237	{
238	int ack = 1;
239	/*
240	* enable output
241	*/
242	i2c_dir_out();
243	/*
244	* Release data bus by setting
245	* data high
246	*/
247	i2c_data(I2C_DATA_HIGH);
248	/*
249	* enable input
250	*/
251	i2c_dir_in();
252	i2c_delay(CLOCK_HIGH_TIME/4);
253	/*
254	* generate ACK clock pulse
255	*/
256	i2c_clk(I2C_CLOCK_HIGH);
201ca54a	257	#if 0
51533b61 MS	258	/*
	259	* Use PORT PB instead of I2C
	260	* for input. (I2C not working)
	261	*/
	262	i2c_clk(1);
	263	i2c_data(1);
	264	/*
	265	* switch off I2C
	266	*/
	267	i2c_data(1);
	268	i2c_disable();
	269	i2c_dir_in();
201ca54a JN	270	#endif
201ca54a JN	271
51533b61 MS	272	/*
	273	* now wait for ack
	274	*/
	275	i2c_delay(CLOCK_HIGH_TIME/2);
	276	/*
	277	* check for ack
	278	*/
201ca54a	279	if (i2c_getbit())
51533b61 MS	280	ack = 0;
51533b61 MS	281	i2c_delay(CLOCK_HIGH_TIME/2);
201ca54a JN	282	if (!ack) {
201ca54a JN	283	if (!i2c_getbit()) /* receiver pulld SDA low */
51533b61 MS	284	ack = 1;
	285	i2c_delay(CLOCK_HIGH_TIME/2);
	286	}
	287
	288	/*
	289	* our clock is high now, make sure data is low
	290	* before we enable our output. If we keep data high
	291	* and enable output, we would generate a stop condition.
	292	*/
201ca54a	293	#if 0
51533b61 MS	294	i2c_data(I2C_DATA_LOW);
	295
	296	/*
	297	* end clock pulse
	298	*/
	299	i2c_enable();
	300	i2c_dir_out();
201ca54a	301	#endif
51533b61 MS	302	i2c_clk(I2C_CLOCK_LOW);
	303	i2c_delay(CLOCK_HIGH_TIME/4);
	304	/*
	305	* enable output
	306	*/
	307	i2c_dir_out();
	308	/*
	309	* remove ACK clock pulse
	310	*/
	311	i2c_data(I2C_DATA_HIGH);
	312	i2c_delay(CLOCK_LOW_TIME/2);
	313	return ack;
	314	}
	315
	316	/*#---------------------------------------------------------------------------
	317	*#
	318	*# FUNCTION NAME: I2C::sendAck
	319	*#
	320	*# DESCRIPTION : Send ACK on received data
	321	*#
	322	#--------------------------------------------------------------------------/
	323	void
	324	i2c_sendack(void)
	325	{
	326	/*
	327	* enable output
	328	*/
	329	i2c_delay(CLOCK_LOW_TIME);
	330	i2c_dir_out();
	331	/*
	332	* set ack pulse high
	333	*/
	334	i2c_data(I2C_DATA_LOW);
	335	/*
	336	* generate clock pulse
	337	*/
	338	i2c_delay(CLOCK_HIGH_TIME/6);
	339	i2c_clk(I2C_CLOCK_HIGH);
	340	i2c_delay(CLOCK_HIGH_TIME);
	341	i2c_clk(I2C_CLOCK_LOW);
	342	i2c_delay(CLOCK_LOW_TIME/6);
	343	/*
	344	* reset data out
	345	*/
	346	i2c_data(I2C_DATA_HIGH);
	347	i2c_delay(CLOCK_LOW_TIME);
	348
	349	i2c_dir_in();
	350	}
	351
	352	/*#---------------------------------------------------------------------------
	353	*#
	354	*# FUNCTION NAME: i2c_sendnack
	355	*#
	356	*# DESCRIPTION : Sends NACK on received data
	357	*#
	358	#--------------------------------------------------------------------------/
	359	void
	360	i2c_sendnack(void)
	361	{
	362	/*
	363	* enable output
	364	*/
	365	i2c_delay(CLOCK_LOW_TIME);
366	i2c_dir_out();
367	/*
368	* set data high
369	*/
370	i2c_data(I2C_DATA_HIGH);
371	/*
372	* generate clock pulse
373	*/
374	i2c_delay(CLOCK_HIGH_TIME/6);
375	i2c_clk(I2C_CLOCK_HIGH);
376	i2c_delay(CLOCK_HIGH_TIME);
377	i2c_clk(I2C_CLOCK_LOW);
378	i2c_delay(CLOCK_LOW_TIME);
379
380	i2c_dir_in();
381	}
382
201ca54a JN	383	/*#---------------------------------------------------------------------------
	384	*#
	385	*# FUNCTION NAME: i2c_write
	386	*#
	387	*# DESCRIPTION : Writes a value to an I2C device
	388	*#
	389	#--------------------------------------------------------------------------/
	390	int
	391	i2c_write(unsigned char theSlave, void *data, size_t nbytes)
	392	{
	393	int error, cntr = 3;
	394	unsigned char bytes_wrote = 0;
	395	unsigned char value;
	396	unsigned long flags;
	397
69b06c15	398	spin_lock_irqsave(&i2c_lock, flags);
201ca54a JN	399
	400	do {
	401	error = 0;
201ca54a JN	402
	403	i2c_start();
	404	/*
	405	* send slave address
	406	*/
	407	i2c_outbyte((theSlave & 0xfe));
	408	/*
	409	* wait for ack
	410	*/
	411	if (!i2c_getack())
	412	error = 1;
	413	/*
	414	* send data
	415	*/
	416	for (bytes_wrote = 0; bytes_wrote < nbytes; bytes_wrote++) {
	417	memcpy(&value, data + bytes_wrote, sizeof value);
	418	i2c_outbyte(value);
	419	/*
	420	* now it's time to wait for ack
	421	*/
	422	if (!i2c_getack())
	423	error \|= 4;
	424	}
	425	/*
	426	* end byte stream
	427	*/
	428	i2c_stop();
201ca54a JN	429
	430	} while (error && cntr--);
	431
	432	i2c_delay(CLOCK_LOW_TIME);
	433
69b06c15	434	spin_unlock_irqrestore(&i2c_lock, flags);
201ca54a JN	435
	436	return -error;
	437	}
	438
	439	/*#---------------------------------------------------------------------------
	440	*#
	441	*# FUNCTION NAME: i2c_read
	442	*#
	443	*# DESCRIPTION : Reads a value from an I2C device
	444	*#
	445	#--------------------------------------------------------------------------/
	446	int
	447	i2c_read(unsigned char theSlave, void *data, size_t nbytes)
	448	{
	449	unsigned char b = 0;
	450	unsigned char bytes_read = 0;
	451	int error, cntr = 3;
	452	unsigned long flags;
	453
69b06c15	454	spin_lock_irqsave(&i2c_lock, flags);
201ca54a JN	455
	456	do {
	457	error = 0;
	458	memset(data, 0, nbytes);
201ca54a JN	459	/*
	460	* generate start condition
	461	*/
	462	i2c_start();
	463	/*
	464	* send slave address
	465	*/
	466	i2c_outbyte((theSlave \| 0x01));
	467	/*
	468	* wait for ack
	469	*/
	470	if (!i2c_getack())
	471	error = 1;
	472	/*
	473	* fetch data
	474	*/
	475	for (bytes_read = 0; bytes_read < nbytes; bytes_read++) {
	476	b = i2c_inbyte();
	477	memcpy(data + bytes_read, &b, sizeof b);
	478
	479	if (bytes_read < (nbytes - 1))
	480	i2c_sendack();
	481	}
	482	/*
	483	* last received byte needs to be nacked
	484	* instead of acked
	485	*/
	486	i2c_sendnack();
	487	/*
	488	* end sequence
	489	*/
	490	i2c_stop();
201ca54a JN	491	} while (error && cntr--);
201ca54a JN	492
69b06c15	493	spin_unlock_irqrestore(&i2c_lock, flags);
201ca54a JN	494
	495	return -error;
	496	}
	497
51533b61 MS	498	/*#---------------------------------------------------------------------------
	499	*#
	500	*# FUNCTION NAME: i2c_writereg
	501	*#
	502	*# DESCRIPTION : Writes a value to an I2C device
	503	*#
	504	#--------------------------------------------------------------------------/
	505	int
	506	i2c_writereg(unsigned char theSlave, unsigned char theReg,
	507	unsigned char theValue)
	508	{
	509	int error, cntr = 3;
	510	unsigned long flags;
	511
69b06c15	512	spin_lock_irqsave(&i2c_lock, flags);
201ca54a	513
51533b61 MS	514	do {
51533b61 MS	515	error = 0;
51533b61 MS	516
	517	i2c_start();
	518	/*
	519	* send slave address
	520	*/
	521	i2c_outbyte((theSlave & 0xfe));
	522	/*
	523	* wait for ack
	524	*/
	525	if(!i2c_getack())
	526	error = 1;
	527	/*
	528	* now select register
	529	*/
	530	i2c_dir_out();
	531	i2c_outbyte(theReg);
	532	/*
	533	* now it's time to wait for ack
	534	*/
	535	if(!i2c_getack())
	536	error \|= 2;
	537	/*
	538	* send register register data
	539	*/
	540	i2c_outbyte(theValue);
	541	/*
	542	* now it's time to wait for ack
	543	*/
	544	if(!i2c_getack())
	545	error \|= 4;
	546	/*
	547	* end byte stream
	548	*/
	549	i2c_stop();
51533b61 MS	550	} while(error && cntr--);
	551
	552	i2c_delay(CLOCK_LOW_TIME);
	553
69b06c15	554	spin_unlock_irqrestore(&i2c_lock, flags);
201ca54a	555
51533b61 MS	556	return -error;
	557	}
	558
	559	/*#---------------------------------------------------------------------------
	560	*#
	561	*# FUNCTION NAME: i2c_readreg
	562	*#
	563	*# DESCRIPTION : Reads a value from the decoder registers.
	564	*#
	565	#--------------------------------------------------------------------------/
	566	unsigned char
	567	i2c_readreg(unsigned char theSlave, unsigned char theReg)
	568	{
	569	unsigned char b = 0;
	570	int error, cntr = 3;
	571	unsigned long flags;
	572
69b06c15	573	spin_lock_irqsave(&i2c_lock, flags);
201ca54a	574
51533b61 MS	575	do {
51533b61 MS	576	error = 0;
51533b61 MS	577	/*
	578	* generate start condition
	579	*/
	580	i2c_start();
	581
	582	/*
	583	* send slave address
	584	*/
	585	i2c_outbyte((theSlave & 0xfe));
	586	/*
	587	* wait for ack
	588	*/
	589	if(!i2c_getack())
	590	error = 1;
	591	/*
	592	* now select register
	593	*/
	594	i2c_dir_out();
	595	i2c_outbyte(theReg);
	596	/*
	597	* now it's time to wait for ack
	598	*/
	599	if(!i2c_getack())
201ca54a	600	error \|= 2;
51533b61 MS	601	/*
	602	* repeat start condition
	603	*/
	604	i2c_delay(CLOCK_LOW_TIME);
	605	i2c_start();
	606	/*
	607	* send slave address
	608	*/
	609	i2c_outbyte(theSlave \| 0x01);
	610	/*
	611	* wait for ack
	612	*/
	613	if(!i2c_getack())
201ca54a	614	error \|= 4;
51533b61 MS	615	/*
	616	* fetch register
	617	*/
	618	b = i2c_inbyte();
	619	/*
	620	* last received byte needs to be nacked
	621	* instead of acked
	622	*/
	623	i2c_sendnack();
	624	/*
	625	* end sequence
	626	*/
	627	i2c_stop();
51533b61 MS	628
	629	} while(error && cntr--);
	630
69b06c15	631	spin_unlock_irqrestore(&i2c_lock, flags);
201ca54a	632
51533b61 MS	633	return b;
	634	}
	635
	636	static int
	637	i2c_open(struct inode inode, struct file filp)
	638	{
f2b9857e	639	cycle_kernel_lock();
51533b61 MS	640	return 0;
	641	}
	642
	643	static int
	644	i2c_release(struct inode inode, struct file filp)
	645	{
	646	return 0;
	647	}
	648
	649	/* Main device API. ioctl's to write or read to/from i2c registers.
	650	*/
	651
	652	static int
	653	i2c_ioctl(struct inode inode, struct file file,
	654	unsigned int cmd, unsigned long arg)
	655	{
	656	if(_IOC_TYPE(cmd) != ETRAXI2C_IOCTYPE) {
69b06c15	657	return -ENOTTY;
51533b61 MS	658	}
	659
	660	switch (_IOC_NR(cmd)) {
	661	case I2C_WRITEREG:
	662	/* write to an i2c slave */
	663	D(printk("i2cw %d %d %d\n",
	664	I2C_ARGSLAVE(arg),
	665	I2C_ARGREG(arg),
	666	I2C_ARGVALUE(arg)));
	667
	668	return i2c_writereg(I2C_ARGSLAVE(arg),
	669	I2C_ARGREG(arg),
	670	I2C_ARGVALUE(arg));
	671	case I2C_READREG:
	672	{
	673	unsigned char val;
	674	/* read from an i2c slave */
	675	D(printk("i2cr %d %d ",
	676	I2C_ARGSLAVE(arg),
	677	I2C_ARGREG(arg)));
	678	val = i2c_readreg(I2C_ARGSLAVE(arg), I2C_ARGREG(arg));
	679	D(printk("= %d\n", val));
	680	return val;
	681	}
	682	default:
	683	return -EINVAL;
	684
	685	}
	686
	687	return 0;
	688	}
	689
5dfe4c96	690	static const struct file_operations i2c_fops = {
7ff9057d RD	691	.owner = THIS_MODULE,
	692	.ioctl = i2c_ioctl,
	693	.open = i2c_open,
	694	.release = i2c_release,
51533b61 MS	695	};
51533b61 MS	696
69b06c15	697	static int __init i2c_init(void)
51533b61	698	{
201ca54a JN	699	static int res;
201ca54a JN	700	static int first = 1;
51533b61	701
201ca54a JN	702	if (!first)
	703	return res;
	704
	705	first = 0;
	706
	707	/* Setup and enable the DATA and CLK pins */
	708
	709	res = crisv32_io_get_name(&cris_i2c_data,
	710	CONFIG_ETRAX_V32_I2C_DATA_PORT);
	711	if (res < 0)
	712	return res;
	713
	714	res = crisv32_io_get_name(&cris_i2c_clk, CONFIG_ETRAX_V32_I2C_CLK_PORT);
	715	crisv32_io_set_dir(&cris_i2c_clk, crisv32_io_dir_out);
	716
	717	return res;
	718	}
51533b61	719
201ca54a	720
69b06c15	721	static int __init i2c_register(void)
201ca54a	722	{
201ca54a JN	723	int res;
	724
	725	res = i2c_init();
	726	if (res < 0)
	727	return res;
51533b61 MS	728
	729	/* register char device */
	730
	731	res = register_chrdev(I2C_MAJOR, i2c_name, &i2c_fops);
69b06c15	732	if (res < 0) {
51533b61 MS	733	printk(KERN_ERR "i2c: couldn't get a major number.\n");
	734	return res;
	735	}
	736
201ca54a JN	737	printk(KERN_INFO
201ca54a JN	738	"I2C driver v2.2, (c) 1999-2007 Axis Communications AB\n");
51533b61 MS	739
	740	return 0;
	741	}
51533b61	742	/* this makes sure that i2c_init is called during boot */
201ca54a	743	module_init(i2c_register);
51533b61 MS	744
51533b61 MS	745	/**************** END OF FILE i2c.c ******************************/