[net-next-2.6.git] / arch / blackfin / mach-common / head.S

/*
 * Common Blackfin startup code
 *
 * Copyright 2004-2008 Analog Devices Inc.
 *
 * Enter bugs at http://blackfin.uclinux.org/
 *
 * Licensed under the GPL-2 or later.
 */

#include <linux/linkage.h>
#include <linux/init.h>
#include <asm/blackfin.h>
#include <asm/thread_info.h>
#include <asm/trace.h>
#include <asm/asm-offsets.h>

__INIT

ENTRY(__init_clear_bss)
	r2 = r2 - r1;
	cc = r2 == 0;
	if cc jump .L_bss_done;
	r2 >>= 2;
	p1 = r1;
	p2 = r2;
	lsetup (1f, 1f) lc0 = p2;
1:	[p1++] = r0;
.L_bss_done:
	rts;
ENDPROC(__init_clear_bss)

#define INITIAL_STACK	(L1_SCRATCH_START + L1_SCRATCH_LENGTH - 12)

ENTRY(__start)
	/* R0: argument of command line string, passed from uboot, save it */
	R7 = R0;
	/* Enable Cycle Counter and Nesting Of Interrupts */
#ifdef CONFIG_BFIN_SCRATCH_REG_CYCLES
	R0 = SYSCFG_SNEN;
#else
	R0 = SYSCFG_SNEN | SYSCFG_CCEN;
#endif
	SYSCFG = R0;
	R0 = 0;

	/* Clear Out All the data and pointer Registers */
	R1 = R0;
	R2 = R0;
	R3 = R0;
	R4 = R0;
	R5 = R0;
	R6 = R0;

	P0 = R0;
	P1 = R0;
	P2 = R0;
	P3 = R0;
	P4 = R0;
	P5 = R0;

	LC0 = r0;
	LC1 = r0;
	L0 = r0;
	L1 = r0;
	L2 = r0;
	L3 = r0;

	/* Clear Out All the DAG Registers */
	B0 = r0;
	B1 = r0;
	B2 = r0;
	B3 = r0;

	I0 = r0;
	I1 = r0;
	I2 = r0;
	I3 = r0;

	M0 = r0;
	M1 = r0;
	M2 = r0;
	M3 = r0;

	/*
	 * Clear ITEST_COMMAND and DTEST_COMMAND registers,
	 * Leaving these as non-zero can confuse the emulator
	 */
	p0.L = LO(DTEST_COMMAND);
	p0.H = HI(DTEST_COMMAND);
	[p0] = R0;
	[p0 + (ITEST_COMMAND - DTEST_COMMAND)] = R0;
	CSYNC;

	trace_buffer_init(p0,r0);
	P0 = R1;
	R0 = R1;

	/* Turn off the icache */
	p0.l = LO(IMEM_CONTROL);
	p0.h = HI(IMEM_CONTROL);
	R1 = [p0];
	R0 = ~ENICPLB;
	R0 = R0 & R1;
	[p0] = R0;
	SSYNC;

	/* Turn off the dcache */
	p0.l = LO(DMEM_CONTROL);
	p0.h = HI(DMEM_CONTROL);
	R1 = [p0];
	R0 = ~ENDCPLB;
	R0 = R0 & R1;
	[p0] = R0;
	SSYNC;

	/* in case of double faults, save a few things */
	p0.l = _init_retx;
	p0.h = _init_retx;
	R0 = RETX;
	[P0] = R0;

#ifdef CONFIG_DEBUG_DOUBLEFAULT
	/* Only save these if we are storing them,
	 * This happens here, since L1 gets clobbered
	 * below
	 */
	GET_PDA(p0, r0);
	r7 = [p0 + PDA_RETX];
	p1.l = _init_saved_retx;
	p1.h = _init_saved_retx;
	[p1] = r7;

	r7 = [p0 + PDA_DCPLB];
	p1.l = _init_saved_dcplb_fault_addr;
	p1.h = _init_saved_dcplb_fault_addr;
	[p1] = r7;

	r7 = [p0 + PDA_ICPLB];
	p1.l = _init_saved_icplb_fault_addr;
	p1.h = _init_saved_icplb_fault_addr;
	[p1] = r7;

	r7 = [p0 + PDA_SEQSTAT];
	p1.l = _init_saved_seqstat;
	p1.h = _init_saved_seqstat;
	[p1] = r7;
#endif

	/* Initialize stack pointer */
	sp.l = lo(INITIAL_STACK);
	sp.h = hi(INITIAL_STACK);
	fp = sp;
	usp = sp;

#ifdef CONFIG_EARLY_PRINTK
	call _init_early_exception_vectors;
#endif

	r0 = 0 (x);
	/* Zero out all of the fun bss regions */
#if L1_DATA_A_LENGTH > 0
	r1.l = __sbss_l1;
	r1.h = __sbss_l1;
	r2.l = __ebss_l1;
	r2.h = __ebss_l1;
	call __init_clear_bss
#endif
#if L1_DATA_B_LENGTH > 0
	r1.l = __sbss_b_l1;
	r1.h = __sbss_b_l1;
	r2.l = __ebss_b_l1;
	r2.h = __ebss_b_l1;
	call __init_clear_bss
#endif
#if L2_LENGTH > 0
	r1.l = __sbss_l2;
	r1.h = __sbss_l2;
	r2.l = __ebss_l2;
	r2.h = __ebss_l2;
	call __init_clear_bss
#endif
	r1.l = ___bss_start;
	r1.h = ___bss_start;
	r2.l = ___bss_stop;
	r2.h = ___bss_stop;
	call __init_clear_bss

	/* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */
	call _bfin_relocate_l1_mem;
#ifdef CONFIG_BFIN_KERNEL_CLOCK
	call _init_clocks;
#endif

	/* This section keeps the processor in supervisor mode
	 * during kernel boot.  Switches to user mode at end of boot.
	 * See page 3-9 of Hardware Reference manual for documentation.
	 */

	/* EVT15 = _real_start */

	p0.l = lo(EVT15);
	p0.h = hi(EVT15);
	p1.l = _real_start;
	p1.h = _real_start;
	[p0] = p1;
	csync;

	r0 = EVT_IVG15 (z);
	sti r0;

	raise 15;
	p0.l = .LWAIT_HERE;
	p0.h = .LWAIT_HERE;
	reti = p0;
#if ANOMALY_05000281
	nop; nop; nop;
#endif
	rti;

.LWAIT_HERE:
	jump .LWAIT_HERE;
ENDPROC(__start)

/* A little BF561 glue ... */
#ifndef WDOG_CTL
# define WDOG_CTL WDOGA_CTL
#endif

ENTRY(_real_start)
	/* Enable nested interrupts */
	[--sp] = reti;

	/* watchdog off for now */
	p0.l = lo(WDOG_CTL);
	p0.h = hi(WDOG_CTL);
	r0 = 0xAD6(z);
	w[p0] = r0;
	ssync;

	/* Pass the u-boot arguments to the global value command line */
	R0 = R7;
	call _cmdline_init;

	/* Load the current thread pointer and stack */
	sp.l = _init_thread_union;
	sp.h = _init_thread_union;
	p1 = THREAD_SIZE (z);
	sp = sp + p1;
	usp = sp;
	fp = sp;
	sp += -12;
	call _init_pda
	sp += 12;
	jump.l _start_kernel;
ENDPROC(_real_start)

__FINIT
Commit	Line	Data
09e1f70e MF	1	/*
	2	* Common Blackfin startup code
	3	*
	4	* Copyright 2004-2008 Analog Devices Inc.
	5	*
	6	* Enter bugs at http://blackfin.uclinux.org/
	7	*
	8	* Licensed under the GPL-2 or later.
	9	*/
	10
	11	#include <linux/linkage.h>
	12	#include <linux/init.h>
	13	#include <asm/blackfin.h>
67618fd8	14	#include <asm/thread_info.h>
09e1f70e	15	#include <asm/trace.h>
6b3087c6	16	#include <asm/asm-offsets.h>
09e1f70e	17
17e89bcf MF	18	__INIT
17e89bcf MF	19
9960aa6a GY	20	ENTRY(__init_clear_bss)
	21	r2 = r2 - r1;
	22	cc = r2 == 0;
	23	if cc jump .L_bss_done;
	24	r2 >>= 2;
	25	p1 = r1;
	26	p2 = r2;
	27	lsetup (1f, 1f) lc0 = p2;
	28	1: [p1++] = r0;
	29	.L_bss_done:
	30	rts;
	31	ENDPROC(__init_clear_bss)
	32
17e89bcf MF	33	#define INITIAL_STACK (L1_SCRATCH_START + L1_SCRATCH_LENGTH - 12)
	34
	35	ENTRY(__start)
	36	/* R0: argument of command line string, passed from uboot, save it */
	37	R7 = R0;
	38	/* Enable Cycle Counter and Nesting Of Interrupts */
	39	#ifdef CONFIG_BFIN_SCRATCH_REG_CYCLES
	40	R0 = SYSCFG_SNEN;
	41	#else
	42	R0 = SYSCFG_SNEN \| SYSCFG_CCEN;
	43	#endif
	44	SYSCFG = R0;
	45	R0 = 0;
	46
	47	/* Clear Out All the data and pointer Registers */
	48	R1 = R0;
	49	R2 = R0;
	50	R3 = R0;
	51	R4 = R0;
	52	R5 = R0;
	53	R6 = R0;
	54
	55	P0 = R0;
	56	P1 = R0;
	57	P2 = R0;
	58	P3 = R0;
	59	P4 = R0;
	60	P5 = R0;
	61
	62	LC0 = r0;
	63	LC1 = r0;
	64	L0 = r0;
	65	L1 = r0;
	66	L2 = r0;
	67	L3 = r0;
	68
	69	/* Clear Out All the DAG Registers */
	70	B0 = r0;
	71	B1 = r0;
	72	B2 = r0;
	73	B3 = r0;
	74
	75	I0 = r0;
	76	I1 = r0;
	77	I2 = r0;
	78	I3 = r0;
	79
	80	M0 = r0;
	81	M1 = r0;
	82	M2 = r0;
	83	M3 = r0;
	84
9df10281 RG	85	/*
	86	* Clear ITEST_COMMAND and DTEST_COMMAND registers,
	87	* Leaving these as non-zero can confuse the emulator
	88	*/
	89	p0.L = LO(DTEST_COMMAND);
	90	p0.H = HI(DTEST_COMMAND);
	91	[p0] = R0;
	92	[p0 + (ITEST_COMMAND - DTEST_COMMAND)] = R0;
	93	CSYNC;
	94
17e89bcf MF	95	trace_buffer_init(p0,r0);
	96	P0 = R1;
	97	R0 = R1;
	98
	99	/* Turn off the icache */
	100	p0.l = LO(IMEM_CONTROL);
	101	p0.h = HI(IMEM_CONTROL);
	102	R1 = [p0];
	103	R0 = ~ENICPLB;
	104	R0 = R0 & R1;
	105	[p0] = R0;
	106	SSYNC;
	107
	108	/* Turn off the dcache */
	109	p0.l = LO(DMEM_CONTROL);
	110	p0.h = HI(DMEM_CONTROL);
	111	R1 = [p0];
	112	R0 = ~ENDCPLB;
	113	R0 = R0 & R1;
	114	[p0] = R0;
	115	SSYNC;
	116
0c7a6b21 RG	117	/* in case of double faults, save a few things */
	118	p0.l = _init_retx;
	119	p0.h = _init_retx;
cd8fb8df RG	120	R0 = RETX;
	121	[P0] = R0;
	122
0c7a6b21 RG	123	#ifdef CONFIG_DEBUG_DOUBLEFAULT
	124	/* Only save these if we are storing them,
	125	* This happens here, since L1 gets clobbered
	126	* below
	127	*/
6b3087c6 GY	128	GET_PDA(p0, r0);
6b3087c6 GY	129	r7 = [p0 + PDA_RETX];
0c7a6b21 RG	130	p1.l = _init_saved_retx;
0c7a6b21 RG	131	p1.h = _init_saved_retx;
6b3087c6	132	[p1] = r7;
0c7a6b21	133
6b3087c6	134	r7 = [p0 + PDA_DCPLB];
0c7a6b21 RG	135	p1.l = _init_saved_dcplb_fault_addr;
0c7a6b21 RG	136	p1.h = _init_saved_dcplb_fault_addr;
6b3087c6	137	[p1] = r7;
0c7a6b21	138
6b3087c6	139	r7 = [p0 + PDA_ICPLB];
0c7a6b21 RG	140	p1.l = _init_saved_icplb_fault_addr;
0c7a6b21 RG	141	p1.h = _init_saved_icplb_fault_addr;
6b3087c6	142	[p1] = r7;
0c7a6b21	143
6b3087c6	144	r7 = [p0 + PDA_SEQSTAT];
0c7a6b21 RG	145	p1.l = _init_saved_seqstat;
0c7a6b21 RG	146	p1.h = _init_saved_seqstat;
6b3087c6	147	[p1] = r7;
0c7a6b21 RG	148	#endif
0c7a6b21 RG	149
17e89bcf MF	150	/* Initialize stack pointer */
	151	sp.l = lo(INITIAL_STACK);
	152	sp.h = hi(INITIAL_STACK);
	153	fp = sp;
	154	usp = sp;
	155
	156	#ifdef CONFIG_EARLY_PRINTK
	157	call _init_early_exception_vectors;
	158	#endif
	159
9960aa6a GY	160	r0 = 0 (x);
	161	/* Zero out all of the fun bss regions */
	162	#if L1_DATA_A_LENGTH > 0
	163	r1.l = __sbss_l1;
	164	r1.h = __sbss_l1;
	165	r2.l = __ebss_l1;
	166	r2.h = __ebss_l1;
	167	call __init_clear_bss
	168	#endif
	169	#if L1_DATA_B_LENGTH > 0
	170	r1.l = __sbss_b_l1;
	171	r1.h = __sbss_b_l1;
	172	r2.l = __ebss_b_l1;
	173	r2.h = __ebss_b_l1;
	174	call __init_clear_bss
	175	#endif
	176	#if L2_LENGTH > 0
	177	r1.l = __sbss_l2;
	178	r1.h = __sbss_l2;
	179	r2.l = __ebss_l2;
	180	r2.h = __ebss_l2;
	181	call __init_clear_bss
	182	#endif
	183	r1.l = ___bss_start;
	184	r1.h = ___bss_start;
	185	r2.l = ___bss_stop;
	186	r2.h = ___bss_stop;
	187	call __init_clear_bss
	188
17e89bcf	189	/* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */
5b04f271	190	call _bfin_relocate_l1_mem;
17e89bcf	191	#ifdef CONFIG_BFIN_KERNEL_CLOCK
73feb5c0	192	call _init_clocks;
17e89bcf MF	193	#endif
	194
	195	/* This section keeps the processor in supervisor mode
	196	* during kernel boot. Switches to user mode at end of boot.
	197	* See page 3-9 of Hardware Reference manual for documentation.
	198	*/
	199
	200	/* EVT15 = _real_start */
	201
	202	p0.l = lo(EVT15);
	203	p0.h = hi(EVT15);
	204	p1.l = _real_start;
	205	p1.h = _real_start;
	206	[p0] = p1;
	207	csync;
	208
c2414bd0 MF	209	r0 = EVT_IVG15 (z);
c2414bd0 MF	210	sti r0;
17e89bcf MF	211
	212	raise 15;
	213	p0.l = .LWAIT_HERE;
	214	p0.h = .LWAIT_HERE;
	215	reti = p0;
	216	#if ANOMALY_05000281
	217	nop; nop; nop;
	218	#endif
	219	rti;
	220
	221	.LWAIT_HERE:
	222	jump .LWAIT_HERE;
	223	ENDPROC(__start)
	224
09e1f70e MF	225	/* A little BF561 glue ... */
	226	#ifndef WDOG_CTL
	227	# define WDOG_CTL WDOGA_CTL
	228	#endif
	229
09e1f70e MF	230	ENTRY(_real_start)
	231	/* Enable nested interrupts */
	232	[--sp] = reti;
	233
	234	/* watchdog off for now */
	235	p0.l = lo(WDOG_CTL);
	236	p0.h = hi(WDOG_CTL);
	237	r0 = 0xAD6(z);
	238	w[p0] = r0;
	239	ssync;
	240
09e1f70e MF	241	/* Pass the u-boot arguments to the global value command line */
	242	R0 = R7;
	243	call _cmdline_init;
	244
	245	/* Load the current thread pointer and stack */
	246	sp.l = _init_thread_union;
	247	sp.h = _init_thread_union;
	248	p1 = THREAD_SIZE (z);
	249	sp = sp + p1;
	250	usp = sp;
	251	fp = sp;
6b3087c6 GY	252	sp += -12;
	253	call _init_pda
	254	sp += 12;
09e1f70e MF	255	jump.l _start_kernel;
	256	ENDPROC(_real_start)
	257
	258	__FINIT