[net-next-2.6.git] / arch / blackfin / mach-bf561 / boards / cm_bf561.c

/*
 * Copyright 2004-2009 Analog Devices Inc.
 *               2008-2009 Bluetechnix
 *               2005 National ICT Australia (NICTA)
 *                    Aidan Williams <aidan@nicta.com.au>
 *
 * Licensed under the GPL-2 or later.
 */

#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
#include <linux/usb/isp1362.h>
#endif
#include <linux/ata_platform.h>
#include <linux/irq.h>
#include <asm/dma.h>
#include <asm/bfin5xx_spi.h>
#include <asm/portmux.h>
#include <asm/dpmc.h>
#include <linux/mtd/physmap.h>

/*
 * Name the Board for the /proc/cpuinfo
 */
const char bfin_board_name[] = "Bluetechnix CM BF561";

#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
/* all SPI peripherals info goes here */

#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
static struct mtd_partition bfin_spi_flash_partitions[] = {
	{
		.name = "bootloader(spi)",
		.size = 0x00020000,
		.offset = 0,
		.mask_flags = MTD_CAP_ROM
	}, {
		.name = "linux kernel(spi)",
		.size = 0xe0000,
		.offset = 0x20000
	}, {
		.name = "file system(spi)",
		.size = 0x700000,
		.offset = 0x00100000,
	}
};

static struct flash_platform_data bfin_spi_flash_data = {
	.name = "m25p80",
	.parts = bfin_spi_flash_partitions,
	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
	.type = "m25p64",
};

/* SPI flash chip (m25p64) */
static struct bfin5xx_spi_chip spi_flash_chip_info = {
	.enable_dma = 0,         /* use dma transfer with this chip*/
	.bits_per_word = 8,
};
#endif

#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
/* SPI ADC chip */
static struct bfin5xx_spi_chip spi_adc_chip_info = {
	.enable_dma = 1,         /* use dma transfer with this chip*/
	.bits_per_word = 16,
};
#endif

#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
	.enable_dma = 0,
	.bits_per_word = 16,
};
#endif

#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
static struct bfin5xx_spi_chip mmc_spi_chip_info = {
	.enable_dma = 0,
	.bits_per_word = 8,
};
#endif

static struct spi_board_info bfin_spi_board_info[] __initdata = {
#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
	{
		/* the modalias must be the same as spi device driver name */
		.modalias = "m25p80", /* Name of spi_driver for this device */
		.max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0, /* Framework bus number */
		.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
		.platform_data = &bfin_spi_flash_data,
		.controller_data = &spi_flash_chip_info,
		.mode = SPI_MODE_3,
	},
#endif

#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
	{
		.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
		.max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0, /* Framework bus number */
		.chip_select = 1, /* Framework chip select. */
		.platform_data = NULL, /* No spi_driver specific config */
		.controller_data = &spi_adc_chip_info,
	},
#endif

#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
	{
		.modalias = "ad1836",
		.max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0,
		.chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
		.controller_data = &ad1836_spi_chip_info,
	},
#endif
#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
	{
		.modalias = "mmc_spi",
		.max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0,
		.chip_select = 1,
		.controller_data = &mmc_spi_chip_info,
		.mode = SPI_MODE_3,
	},
#endif
};

/* SPI (0) */
static struct resource bfin_spi0_resource[] = {
	[0] = {
		.start = SPI0_REGBASE,
		.end   = SPI0_REGBASE + 0xFF,
		.flags = IORESOURCE_MEM,
	},
	[1] = {
		.start = CH_SPI,
		.end   = CH_SPI,
		.flags = IORESOURCE_DMA,
	},
	[2] = {
		.start = IRQ_SPI,
		.end   = IRQ_SPI,
		.flags = IORESOURCE_IRQ,
	},
};

/* SPI controller data */
static struct bfin5xx_spi_master bfin_spi0_info = {
	.num_chipselect = 8,
	.enable_dma = 1,  /* master has the ability to do dma transfer */
	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
};

static struct platform_device bfin_spi0_device = {
	.name = "bfin-spi",
	.id = 0, /* Bus number */
	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
	.resource = bfin_spi0_resource,
	.dev = {
		.platform_data = &bfin_spi0_info, /* Passed to driver */
	},
};
#endif  /* spi master and devices */


#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
static struct platform_device hitachi_fb_device = {
	.name = "hitachi-tx09",
};
#endif


#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
#include <linux/smc91x.h>

static struct smc91x_platdata smc91x_info = {
	.flags = SMC91X_USE_32BIT | SMC91X_NOWAIT,
	.leda = RPC_LED_100_10,
	.ledb = RPC_LED_TX_RX,
};

static struct resource smc91x_resources[] = {
	{
		.name = "smc91x-regs",
		.start = 0x28000300,
		.end = 0x28000300 + 16,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PF0,
		.end = IRQ_PF0,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};
static struct platform_device smc91x_device = {
	.name = "smc91x",
	.id = 0,
	.num_resources = ARRAY_SIZE(smc91x_resources),
	.resource = smc91x_resources,
	.dev	= {
		.platform_data	= &smc91x_info,
	},
};
#endif

#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
#include <linux/smsc911x.h>

static struct resource smsc911x_resources[] = {
	{
		.name = "smsc911x-memory",
		.start = 0x24008000,
		.end = 0x24008000 + 0xFF,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = IRQ_PF43,
		.end = IRQ_PF43,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
	},
};

static struct smsc911x_platform_config smsc911x_config = {
	.flags = SMSC911X_USE_16BIT,
	.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
	.irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
	.phy_interface = PHY_INTERFACE_MODE_MII,
};

static struct platform_device smsc911x_device = {
	.name = "smsc911x",
	.id = 0,
	.num_resources = ARRAY_SIZE(smsc911x_resources),
	.resource = smsc911x_resources,
	.dev = {
		.platform_data = &smsc911x_config,
	},
};
#endif

#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
static struct resource net2272_bfin_resources[] = {
	{
		.start = 0x24000000,
		.end = 0x24000000 + 0x100,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PF45,
		.end = IRQ_PF45,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};

static struct platform_device net2272_bfin_device = {
	.name = "net2272",
	.id = -1,
	.num_resources = ARRAY_SIZE(net2272_bfin_resources),
	.resource = net2272_bfin_resources,
};
#endif

#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
static struct resource isp1362_hcd_resources[] = {
	{
		.start = 0x24008000,
		.end = 0x24008000,
		.flags = IORESOURCE_MEM,
	}, {
		.start = 0x24008004,
		.end = 0x24008004,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PF47,
		.end = IRQ_PF47,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};

static struct isp1362_platform_data isp1362_priv = {
	.sel15Kres = 1,
	.clknotstop = 0,
	.oc_enable = 0,
	.int_act_high = 0,
	.int_edge_triggered = 0,
	.remote_wakeup_connected = 0,
	.no_power_switching = 1,
	.power_switching_mode = 0,
};

static struct platform_device isp1362_hcd_device = {
	.name = "isp1362-hcd",
	.id = 0,
	.dev = {
		.platform_data = &isp1362_priv,
	},
	.num_resources = ARRAY_SIZE(isp1362_hcd_resources),
	.resource = isp1362_hcd_resources,
};
#endif

#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
#ifdef CONFIG_SERIAL_BFIN_UART0
static struct resource bfin_uart0_resources[] = {
	{
		.start = BFIN_UART_THR,
		.end = BFIN_UART_GCTL+2,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = IRQ_UART_RX,
		.end = IRQ_UART_RX+1,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = IRQ_UART_ERROR,
		.end = IRQ_UART_ERROR,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = CH_UART_TX,
		.end = CH_UART_TX,
		.flags = IORESOURCE_DMA,
	},
	{
		.start = CH_UART_RX,
		.end = CH_UART_RX,
		.flags = IORESOURCE_DMA,
	},
};

unsigned short bfin_uart0_peripherals[] = {
	P_UART0_TX, P_UART0_RX, 0
};

static struct platform_device bfin_uart0_device = {
	.name = "bfin-uart",
	.id = 0,
	.num_resources = ARRAY_SIZE(bfin_uart0_resources),
	.resource = bfin_uart0_resources,
	.dev = {
		.platform_data = &bfin_uart0_peripherals, /* Passed to driver */
	},
};
#endif
#endif

#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
#ifdef CONFIG_BFIN_SIR0
static struct resource bfin_sir0_resources[] = {
	{
		.start = 0xFFC00400,
		.end = 0xFFC004FF,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = IRQ_UART0_RX,
		.end = IRQ_UART0_RX+1,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = CH_UART0_RX,
		.end = CH_UART0_RX+1,
		.flags = IORESOURCE_DMA,
	},
};

static struct platform_device bfin_sir0_device = {
	.name = "bfin_sir",
	.id = 0,
	.num_resources = ARRAY_SIZE(bfin_sir0_resources),
	.resource = bfin_sir0_resources,
};
#endif
#endif

#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
#define PATA_INT	IRQ_PF46

static struct pata_platform_info bfin_pata_platform_data = {
	.ioport_shift = 2,
	.irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
};

static struct resource bfin_pata_resources[] = {
	{
		.start = 0x2400C000,
		.end = 0x2400C001F,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = 0x2400D018,
		.end = 0x2400D01B,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = PATA_INT,
		.end = PATA_INT,
		.flags = IORESOURCE_IRQ,
	},
};

static struct platform_device bfin_pata_device = {
	.name = "pata_platform",
	.id = -1,
	.num_resources = ARRAY_SIZE(bfin_pata_resources),
	.resource = bfin_pata_resources,
	.dev = {
		.platform_data = &bfin_pata_platform_data,
	}
};
#endif

#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
static struct mtd_partition para_partitions[] = {
	{
		.name       = "bootloader(nor)",
		.size       = 0x40000,
		.offset     = 0,
	}, {
		.name       = "linux kernel(nor)",
		.size       = 0x100000,
		.offset     = MTDPART_OFS_APPEND,
	}, {
		.name       = "file system(nor)",
		.size       = MTDPART_SIZ_FULL,
		.offset     = MTDPART_OFS_APPEND,
	}
};

static struct physmap_flash_data para_flash_data = {
	.width      = 2,
	.parts      = para_partitions,
	.nr_parts   = ARRAY_SIZE(para_partitions),
};

static struct resource para_flash_resource = {
	.start = 0x20000000,
	.end   = 0x207fffff,
	.flags = IORESOURCE_MEM,
};

static struct platform_device para_flash_device = {
	.name          = "physmap-flash",
	.id            = 0,
	.dev = {
		.platform_data = &para_flash_data,
	},
	.num_resources = 1,
	.resource      = &para_flash_resource,
};
#endif

static const unsigned int cclk_vlev_datasheet[] =
{
	VRPAIR(VLEV_085, 250000000),
	VRPAIR(VLEV_090, 300000000),
	VRPAIR(VLEV_095, 313000000),
	VRPAIR(VLEV_100, 350000000),
	VRPAIR(VLEV_105, 400000000),
	VRPAIR(VLEV_110, 444000000),
	VRPAIR(VLEV_115, 450000000),
	VRPAIR(VLEV_120, 475000000),
	VRPAIR(VLEV_125, 500000000),
	VRPAIR(VLEV_130, 600000000),
};

static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
	.tuple_tab = cclk_vlev_datasheet,
	.tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
	.vr_settling_time = 25 /* us */,
};

static struct platform_device bfin_dpmc = {
	.name = "bfin dpmc",
	.dev = {
		.platform_data = &bfin_dmpc_vreg_data,
	},
};

static struct platform_device *cm_bf561_devices[] __initdata = {

	&bfin_dpmc,

#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
	&hitachi_fb_device,
#endif

#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
#ifdef CONFIG_SERIAL_BFIN_UART0
	&bfin_uart0_device,
#endif
#endif

#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
#ifdef CONFIG_BFIN_SIR0
	&bfin_sir0_device,
#endif
#endif

#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
	&isp1362_hcd_device,
#endif

#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
	&smc91x_device,
#endif

#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
	&smsc911x_device,
#endif

#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
	&net2272_bfin_device,
#endif

#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
	&bfin_spi0_device,
#endif

#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
	&bfin_pata_device,
#endif

#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
	&para_flash_device,
#endif
};

static int __init cm_bf561_init(void)
{
	printk(KERN_INFO "%s(): registering device resources\n", __func__);
	platform_add_devices(cm_bf561_devices, ARRAY_SIZE(cm_bf561_devices));
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
	spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
#endif

#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
	irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
#endif
	return 0;
}

arch_initcall(cm_bf561_init);

static struct platform_device *cm_bf561_early_devices[] __initdata = {
#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
#ifdef CONFIG_SERIAL_BFIN_UART0
	&bfin_uart0_device,
#endif
#endif
};

void __init native_machine_early_platform_add_devices(void)
{
	printk(KERN_INFO "register early platform devices\n");
	early_platform_add_devices(cm_bf561_early_devices,
		ARRAY_SIZE(cm_bf561_early_devices));
}
Commit	Line	Data
1394f032	1	/*
96f1050d RG	2	* Copyright 2004-2009 Analog Devices Inc.
	3	* 2008-2009 Bluetechnix
	4	* 2005 National ICT Australia (NICTA)
	5	* Aidan Williams <aidan@nicta.com.au>
1394f032	6	*
96f1050d	7	* Licensed under the GPL-2 or later.
1394f032 BW	8	*/
	9
	10	#include <linux/device.h>
	11	#include <linux/platform_device.h>
	12	#include <linux/mtd/mtd.h>
	13	#include <linux/mtd/partitions.h>
	14	#include <linux/spi/spi.h>
	15	#include <linux/spi/flash.h>
b964c592	16	#if defined(CONFIG_USB_ISP1362_HCD) \|\| defined(CONFIG_USB_ISP1362_HCD_MODULE)
f02bcec5	17	#include <linux/usb/isp1362.h>
b964c592	18	#endif
0a87e3e9	19	#include <linux/ata_platform.h>
1f83b8f1	20	#include <linux/irq.h>
c6c4d7bb	21	#include <asm/dma.h>
1394f032	22	#include <asm/bfin5xx_spi.h>
5d448dd5	23	#include <asm/portmux.h>
14b03204	24	#include <asm/dpmc.h>
9c21453e	25	#include <linux/mtd/physmap.h>
1394f032 BW	26
	27	/*
	28	* Name the Board for the /proc/cpuinfo
	29	*/
066954a3	30	const char bfin_board_name[] = "Bluetechnix CM BF561";
1394f032 BW	31
1394f032 BW	32	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
d2d50aa9	33	/* all SPI peripherals info goes here */
1394f032 BW	34
	35	#if defined(CONFIG_MTD_M25P80) \|\| defined(CONFIG_MTD_M25P80_MODULE)
	36	static struct mtd_partition bfin_spi_flash_partitions[] = {
	37	{
aa582977	38	.name = "bootloader(spi)",
1394f032 BW	39	.size = 0x00020000,
	40	.offset = 0,
	41	.mask_flags = MTD_CAP_ROM
1f83b8f1	42	}, {
aa582977	43	.name = "linux kernel(spi)",
1394f032 BW	44	.size = 0xe0000,
1394f032 BW	45	.offset = 0x20000
1f83b8f1	46	}, {
aa582977	47	.name = "file system(spi)",
1394f032 BW	48	.size = 0x700000,
	49	.offset = 0x00100000,
	50	}
	51	};
	52
	53	static struct flash_platform_data bfin_spi_flash_data = {
	54	.name = "m25p80",
	55	.parts = bfin_spi_flash_partitions,
	56	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
	57	.type = "m25p64",
	58	};
	59
	60	/* SPI flash chip (m25p64) */
	61	static struct bfin5xx_spi_chip spi_flash_chip_info = {
	62	.enable_dma = 0, /* use dma transfer with this chip*/
	63	.bits_per_word = 8,
	64	};
	65	#endif
	66
a261eec0	67	#if defined(CONFIG_BFIN_SPI_ADC) \|\| defined(CONFIG_BFIN_SPI_ADC_MODULE)
1394f032 BW	68	/* SPI ADC chip */
	69	static struct bfin5xx_spi_chip spi_adc_chip_info = {
	70	.enable_dma = 1, /* use dma transfer with this chip*/
	71	.bits_per_word = 16,
	72	};
	73	#endif
	74
d40bd71f	75	#if defined(CONFIG_SND_BLACKFIN_AD183X) \|\| defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
1394f032 BW	76	static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
	77	.enable_dma = 0,
	78	.bits_per_word = 16,
	79	};
	80	#endif
	81
f3f704d3 MH	82	#if defined(CONFIG_MMC_SPI) \|\| defined(CONFIG_MMC_SPI_MODULE)
	83	static struct bfin5xx_spi_chip mmc_spi_chip_info = {
	84	.enable_dma = 0,
1394f032 BW	85	.bits_per_word = 8,
	86	};
	87	#endif
	88
	89	static struct spi_board_info bfin_spi_board_info[] __initdata = {
	90	#if defined(CONFIG_MTD_M25P80) \|\| defined(CONFIG_MTD_M25P80_MODULE)
	91	{
	92	/* the modalias must be the same as spi device driver name */
	93	.modalias = "m25p80", /* Name of spi_driver for this device */
	94	.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	95	.bus_num = 0, /* Framework bus number */
1394f032 BW	96	.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
	97	.platform_data = &bfin_spi_flash_data,
	98	.controller_data = &spi_flash_chip_info,
	99	.mode = SPI_MODE_3,
	100	},
	101	#endif
	102
a261eec0	103	#if defined(CONFIG_BFIN_SPI_ADC) \|\| defined(CONFIG_BFIN_SPI_ADC_MODULE)
1394f032 BW	104	{
	105	.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
	106	.max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	107	.bus_num = 0, /* Framework bus number */
1394f032 BW	108	.chip_select = 1, /* Framework chip select. */
	109	.platform_data = NULL, /* No spi_driver specific config */
	110	.controller_data = &spi_adc_chip_info,
	111	},
	112	#endif
	113
d40bd71f	114	#if defined(CONFIG_SND_BLACKFIN_AD183X) \|\| defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
1394f032	115	{
dac98174	116	.modalias = "ad1836",
1394f032	117	.max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	118	.bus_num = 0,
1394f032 BW	119	.chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
	120	.controller_data = &ad1836_spi_chip_info,
	121	},
	122	#endif
f3f704d3	123	#if defined(CONFIG_MMC_SPI) \|\| defined(CONFIG_MMC_SPI_MODULE)
1394f032	124	{
f3f704d3	125	.modalias = "mmc_spi",
9c21453e	126	.max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	127	.bus_num = 0,
9c21453e	128	.chip_select = 1,
f3f704d3	129	.controller_data = &mmc_spi_chip_info,
1394f032 BW	130	.mode = SPI_MODE_3,
	131	},
	132	#endif
	133	};
	134
c6c4d7bb BW	135	/* SPI (0) */
	136	static struct resource bfin_spi0_resource[] = {
	137	[0] = {
	138	.start = SPI0_REGBASE,
	139	.end = SPI0_REGBASE + 0xFF,
	140	.flags = IORESOURCE_MEM,
	141	},
	142	[1] = {
	143	.start = CH_SPI,
	144	.end = CH_SPI,
53122693 YL	145	.flags = IORESOURCE_DMA,
	146	},
	147	[2] = {
	148	.start = IRQ_SPI,
	149	.end = IRQ_SPI,
c6c4d7bb	150	.flags = IORESOURCE_IRQ,
53122693	151	},
c6c4d7bb BW	152	};
c6c4d7bb BW	153
1394f032	154	/* SPI controller data */
c6c4d7bb	155	static struct bfin5xx_spi_master bfin_spi0_info = {
1394f032 BW	156	.num_chipselect = 8,
1394f032 BW	157	.enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5	158	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1394f032 BW	159	};
1394f032 BW	160
c6c4d7bb BW	161	static struct platform_device bfin_spi0_device = {
	162	.name = "bfin-spi",
	163	.id = 0, /* Bus number */
	164	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
	165	.resource = bfin_spi0_resource,
1394f032	166	.dev = {
c6c4d7bb	167	.platform_data = &bfin_spi0_info, /* Passed to driver */
1394f032 BW	168	},
	169	};
	170	#endif /* spi master and devices */
	171
	172
0d4a89bb MH	173	#if defined(CONFIG_FB_HITACHI_TX09) \|\| defined(CONFIG_FB_HITACHI_TX09_MODULE)
	174	static struct platform_device hitachi_fb_device = {
	175	.name = "hitachi-tx09",
	176	};
	177	#endif
	178
	179
1394f032	180	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
61f09b5a MH	181	#include <linux/smc91x.h>
	182
	183	static struct smc91x_platdata smc91x_info = {
	184	.flags = SMC91X_USE_32BIT \| SMC91X_NOWAIT,
	185	.leda = RPC_LED_100_10,
	186	.ledb = RPC_LED_TX_RX,
	187	};
1394f032 BW	188
	189	static struct resource smc91x_resources[] = {
	190	{
	191	.name = "smc91x-regs",
	192	.start = 0x28000300,
	193	.end = 0x28000300 + 16,
	194	.flags = IORESOURCE_MEM,
1f83b8f1	195	}, {
1394f032 BW	196	.start = IRQ_PF0,
	197	.end = IRQ_PF0,
	198	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	199	},
	200	};
	201	static struct platform_device smc91x_device = {
	202	.name = "smc91x",
	203	.id = 0,
	204	.num_resources = ARRAY_SIZE(smc91x_resources),
	205	.resource = smc91x_resources,
61f09b5a MH	206	.dev = {
	207	.platform_data = &smc91x_info,
	208	},
1394f032 BW	209	};
	210	#endif
	211
9c21453e HK	212	#if defined(CONFIG_SMSC911X) \|\| defined(CONFIG_SMSC911X_MODULE)
	213	#include <linux/smsc911x.h>
	214
	215	static struct resource smsc911x_resources[] = {
	216	{
	217	.name = "smsc911x-memory",
	218	.start = 0x24008000,
	219	.end = 0x24008000 + 0xFF,
	220	.flags = IORESOURCE_MEM,
	221	},
	222	{
	223	.start = IRQ_PF43,
	224	.end = IRQ_PF43,
	225	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_LOWLEVEL,
	226	},
	227	};
	228
	229	static struct smsc911x_platform_config smsc911x_config = {
	230	.flags = SMSC911X_USE_16BIT,
	231	.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
	232	.irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
	233	.phy_interface = PHY_INTERFACE_MODE_MII,
	234	};
	235
	236	static struct platform_device smsc911x_device = {
	237	.name = "smsc911x",
	238	.id = 0,
	239	.num_resources = ARRAY_SIZE(smsc911x_resources),
	240	.resource = smsc911x_resources,
	241	.dev = {
	242	.platform_data = &smsc911x_config,
	243	},
	244	};
	245	#endif
	246
	247	#if defined(CONFIG_USB_NET2272) \|\| defined(CONFIG_USB_NET2272_MODULE)
	248	static struct resource net2272_bfin_resources[] = {
	249	{
	250	.start = 0x24000000,
	251	.end = 0x24000000 + 0x100,
	252	.flags = IORESOURCE_MEM,
	253	}, {
	254	.start = IRQ_PF45,
	255	.end = IRQ_PF45,
	256	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	257	},
	258	};
	259
	260	static struct platform_device net2272_bfin_device = {
	261	.name = "net2272",
	262	.id = -1,
	263	.num_resources = ARRAY_SIZE(net2272_bfin_resources),
	264	.resource = net2272_bfin_resources,
	265	};
	266	#endif
	267
1394f032 BW	268	#if defined(CONFIG_USB_ISP1362_HCD) \|\| defined(CONFIG_USB_ISP1362_HCD_MODULE)
	269	static struct resource isp1362_hcd_resources[] = {
	270	{
	271	.start = 0x24008000,
	272	.end = 0x24008000,
	273	.flags = IORESOURCE_MEM,
1f83b8f1	274	}, {
1394f032 BW	275	.start = 0x24008004,
	276	.end = 0x24008004,
	277	.flags = IORESOURCE_MEM,
1f83b8f1	278	}, {
1394f032 BW	279	.start = IRQ_PF47,
	280	.end = IRQ_PF47,
	281	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	282	},
	283	};
	284
	285	static struct isp1362_platform_data isp1362_priv = {
	286	.sel15Kres = 1,
	287	.clknotstop = 0,
	288	.oc_enable = 0,
	289	.int_act_high = 0,
	290	.int_edge_triggered = 0,
	291	.remote_wakeup_connected = 0,
	292	.no_power_switching = 1,
	293	.power_switching_mode = 0,
	294	};
	295
	296	static struct platform_device isp1362_hcd_device = {
	297	.name = "isp1362-hcd",
	298	.id = 0,
	299	.dev = {
	300	.platform_data = &isp1362_priv,
	301	},
	302	.num_resources = ARRAY_SIZE(isp1362_hcd_resources),
	303	.resource = isp1362_hcd_resources,
	304	};
	305	#endif
	306
	307	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
6bd1fbea SZ	308	#ifdef CONFIG_SERIAL_BFIN_UART0
6bd1fbea SZ	309	static struct resource bfin_uart0_resources[] = {
1f83b8f1	310	{
6bd1fbea SZ	311	.start = BFIN_UART_THR,
6bd1fbea SZ	312	.end = BFIN_UART_GCTL+2,
1f83b8f1 MF	313	.flags = IORESOURCE_MEM,
1f83b8f1 MF	314	},
6bd1fbea SZ	315	{
	316	.start = IRQ_UART_RX,
	317	.end = IRQ_UART_RX+1,
	318	.flags = IORESOURCE_IRQ,
	319	},
	320	{
	321	.start = IRQ_UART_ERROR,
	322	.end = IRQ_UART_ERROR,
	323	.flags = IORESOURCE_IRQ,
	324	},
	325	{
	326	.start = CH_UART_TX,
	327	.end = CH_UART_TX,
	328	.flags = IORESOURCE_DMA,
	329	},
	330	{
	331	.start = CH_UART_RX,
	332	.end = CH_UART_RX,
	333	.flags = IORESOURCE_DMA,
	334	},
	335	};
	336
	337	unsigned short bfin_uart0_peripherals[] = {
	338	P_UART0_TX, P_UART0_RX, 0
1394f032 BW	339	};
1394f032 BW	340
6bd1fbea	341	static struct platform_device bfin_uart0_device = {
1f83b8f1	342	.name = "bfin-uart",
6bd1fbea SZ	343	.id = 0,
	344	.num_resources = ARRAY_SIZE(bfin_uart0_resources),
	345	.resource = bfin_uart0_resources,
	346	.dev = {
	347	.platform_data = &bfin_uart0_peripherals, /* Passed to driver */
	348	},
1394f032 BW	349	};
1394f032 BW	350	#endif
6bd1fbea	351	#endif
1394f032	352
5be36d22	353	#if defined(CONFIG_BFIN_SIR) \|\| defined(CONFIG_BFIN_SIR_MODULE)
5be36d22	354	#ifdef CONFIG_BFIN_SIR0
42bd8bcb	355	static struct resource bfin_sir0_resources[] = {
5be36d22 GY	356	{
	357	.start = 0xFFC00400,
	358	.end = 0xFFC004FF,
	359	.flags = IORESOURCE_MEM,
	360	},
42bd8bcb GY	361	{
	362	.start = IRQ_UART0_RX,
	363	.end = IRQ_UART0_RX+1,
	364	.flags = IORESOURCE_IRQ,
	365	},
	366	{
	367	.start = CH_UART0_RX,
	368	.end = CH_UART0_RX+1,
	369	.flags = IORESOURCE_DMA,
	370	},
5be36d22 GY	371	};
5be36d22 GY	372
42bd8bcb	373	static struct platform_device bfin_sir0_device = {
5be36d22 GY	374	.name = "bfin_sir",
5be36d22 GY	375	.id = 0,
42bd8bcb GY	376	.num_resources = ARRAY_SIZE(bfin_sir0_resources),
42bd8bcb GY	377	.resource = bfin_sir0_resources,
5be36d22 GY	378	};
5be36d22 GY	379	#endif
42bd8bcb	380	#endif
5be36d22	381
c6c4d7bb	382	#if defined(CONFIG_PATA_PLATFORM) \|\| defined(CONFIG_PATA_PLATFORM_MODULE)
fe5aeb93	383	#define PATA_INT IRQ_PF46
c6c4d7bb BW	384
	385	static struct pata_platform_info bfin_pata_platform_data = {
	386	.ioport_shift = 2,
	387	.irq_type = IRQF_TRIGGER_HIGH \| IRQF_DISABLED,
	388	};
	389
	390	static struct resource bfin_pata_resources[] = {
	391	{
	392	.start = 0x2400C000,
	393	.end = 0x2400C001F,
	394	.flags = IORESOURCE_MEM,
	395	},
	396	{
	397	.start = 0x2400D018,
	398	.end = 0x2400D01B,
	399	.flags = IORESOURCE_MEM,
	400	},
	401	{
	402	.start = PATA_INT,
	403	.end = PATA_INT,
	404	.flags = IORESOURCE_IRQ,
	405	},
	406	};
	407
	408	static struct platform_device bfin_pata_device = {
	409	.name = "pata_platform",
	410	.id = -1,
	411	.num_resources = ARRAY_SIZE(bfin_pata_resources),
	412	.resource = bfin_pata_resources,
	413	.dev = {
	414	.platform_data = &bfin_pata_platform_data,
	415	}
	416	};
	417	#endif
	418
9c21453e HK	419	#if defined(CONFIG_MTD_PHYSMAP) \|\| defined(CONFIG_MTD_PHYSMAP_MODULE)
	420	static struct mtd_partition para_partitions[] = {
	421	{
	422	.name = "bootloader(nor)",
	423	.size = 0x40000,
	424	.offset = 0,
	425	}, {
	426	.name = "linux kernel(nor)",
	427	.size = 0x100000,
	428	.offset = MTDPART_OFS_APPEND,
	429	}, {
	430	.name = "file system(nor)",
	431	.size = MTDPART_SIZ_FULL,
	432	.offset = MTDPART_OFS_APPEND,
	433	}
	434	};
	435
	436	static struct physmap_flash_data para_flash_data = {
	437	.width = 2,
	438	.parts = para_partitions,
	439	.nr_parts = ARRAY_SIZE(para_partitions),
	440	};
	441
	442	static struct resource para_flash_resource = {
	443	.start = 0x20000000,
	444	.end = 0x207fffff,
	445	.flags = IORESOURCE_MEM,
	446	};
	447
	448	static struct platform_device para_flash_device = {
	449	.name = "physmap-flash",
	450	.id = 0,
	451	.dev = {
	452	.platform_data = &para_flash_data,
	453	},
	454	.num_resources = 1,
	455	.resource = &para_flash_resource,
	456	};
	457	#endif
	458
14b03204 MH	459	static const unsigned int cclk_vlev_datasheet[] =
	460	{
	461	VRPAIR(VLEV_085, 250000000),
	462	VRPAIR(VLEV_090, 300000000),
	463	VRPAIR(VLEV_095, 313000000),
	464	VRPAIR(VLEV_100, 350000000),
	465	VRPAIR(VLEV_105, 400000000),
	466	VRPAIR(VLEV_110, 444000000),
	467	VRPAIR(VLEV_115, 450000000),
	468	VRPAIR(VLEV_120, 475000000),
	469	VRPAIR(VLEV_125, 500000000),
	470	VRPAIR(VLEV_130, 600000000),
	471	};
	472
	473	static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
	474	.tuple_tab = cclk_vlev_datasheet,
	475	.tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
	476	.vr_settling_time = 25 /* us */,
	477	};
	478
	479	static struct platform_device bfin_dpmc = {
	480	.name = "bfin dpmc",
	481	.dev = {
	482	.platform_data = &bfin_dmpc_vreg_data,
	483	},
	484	};
	485
1394f032 BW	486	static struct platform_device *cm_bf561_devices[] __initdata = {
1394f032 BW	487
14b03204 MH	488	&bfin_dpmc,
14b03204 MH	489
0d4a89bb MH	490	#if defined(CONFIG_FB_HITACHI_TX09) \|\| defined(CONFIG_FB_HITACHI_TX09_MODULE)
	491	&hitachi_fb_device,
	492	#endif
	493
1394f032	494	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
6bd1fbea SZ	495	#ifdef CONFIG_SERIAL_BFIN_UART0
	496	&bfin_uart0_device,
	497	#endif
1394f032 BW	498	#endif
1394f032 BW	499
5be36d22	500	#if defined(CONFIG_BFIN_SIR) \|\| defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb GY	501	#ifdef CONFIG_BFIN_SIR0
	502	&bfin_sir0_device,
	503	#endif
5be36d22 GY	504	#endif
5be36d22 GY	505
1394f032 BW	506	#if defined(CONFIG_USB_ISP1362_HCD) \|\| defined(CONFIG_USB_ISP1362_HCD_MODULE)
	507	&isp1362_hcd_device,
	508	#endif
	509
	510	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
	511	&smc91x_device,
	512	#endif
	513
9c21453e HK	514	#if defined(CONFIG_SMSC911X) \|\| defined(CONFIG_SMSC911X_MODULE)
	515	&smsc911x_device,
	516	#endif
	517
	518	#if defined(CONFIG_USB_NET2272) \|\| defined(CONFIG_USB_NET2272_MODULE)
	519	&net2272_bfin_device,
	520	#endif
	521
1394f032	522	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
c6c4d7bb	523	&bfin_spi0_device,
1394f032 BW	524	#endif
1394f032 BW	525
c6c4d7bb BW	526	#if defined(CONFIG_PATA_PLATFORM) \|\| defined(CONFIG_PATA_PLATFORM_MODULE)
	527	&bfin_pata_device,
	528	#endif
c97618d3	529
9c21453e HK	530	#if defined(CONFIG_MTD_PHYSMAP) \|\| defined(CONFIG_MTD_PHYSMAP_MODULE)
	531	&para_flash_device,
	532	#endif
1394f032 BW	533	};
	534
	535	static int __init cm_bf561_init(void)
	536	{
b85d858b	537	printk(KERN_INFO "%s(): registering device resources\n", __func__);
1394f032 BW	538	platform_add_devices(cm_bf561_devices, ARRAY_SIZE(cm_bf561_devices));
	539	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	540	spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
	541	#endif
c6c4d7bb BW	542
	543	#if defined(CONFIG_PATA_PLATFORM) \|\| defined(CONFIG_PATA_PLATFORM_MODULE)
	544	irq_desc[PATA_INT].status \|= IRQ_NOAUTOEN;
	545	#endif
1394f032 BW	546	return 0;
	547	}
	548
	549	arch_initcall(cm_bf561_init);
c13ce9fd SZ	550
	551	static struct platform_device *cm_bf561_early_devices[] __initdata = {
	552	#if defined(CONFIG_SERIAL_BFIN_CONSOLE) \|\| defined(CONFIG_EARLY_PRINTK)
	553	#ifdef CONFIG_SERIAL_BFIN_UART0
	554	&bfin_uart0_device,
	555	#endif
	556	#endif
	557	};
	558
	559	void __init native_machine_early_platform_add_devices(void)
	560	{
	561	printk(KERN_INFO "register early platform devices\n");
	562	early_platform_add_devices(cm_bf561_early_devices,
	563	ARRAY_SIZE(cm_bf561_early_devices));
	564	}