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[net-next-2.6.git] / arch / blackfin / mach-bf537 / boards / stamp.c
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1394f032 1/*
96f1050d
RG		 2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
1394f032 5 *
96f1050d 6 * Licensed under the GPL-2 or later.
1394f032
BW		 7 */
8
9#include <linux/device.h>
fc68911e 10#include <linux/kernel.h>
1394f032 11#include <linux/platform_device.h>
6e364755 12#include <linux/io.h>
1394f032 13#include <linux/mtd/mtd.h>
fc68911e 14#include <linux/mtd/nand.h>
1394f032 15#include <linux/mtd/partitions.h>
fc68911e 16#include <linux/mtd/plat-ram.h>
de8c43f2 17#include <linux/mtd/physmap.h>
1394f032
BW		 18#include <linux/spi/spi.h>
19#include <linux/spi/flash.h>
20#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
f02bcec5 21#include <linux/usb/isp1362.h>
1394f032 22#endif
7a9cc489
SZ		 23#include <linux/i2c.h>
24#include <linux/i2c/adp5588.h>
0531c467 25#include <linux/etherdevice.h>
0a87e3e9 26#include <linux/ata_platform.h>
1394f032
BW		 27#include <linux/irq.h>
28#include <linux/interrupt.h>
27f5d75a 29#include <linux/usb/sl811.h>
f79ea4cb 30#include <linux/spi/mmc_spi.h>
78756c62
MH		 31#include <linux/leds.h>
32#include <linux/input.h>
c6c4d7bb 33#include <asm/dma.h>
1f83b8f1 34#include <asm/bfin5xx_spi.h>
c6c4d7bb 35#include <asm/reboot.h>
5d448dd5 36#include <asm/portmux.h>
14b03204 37#include <asm/dpmc.h>
f8e6dbff
SZ		 38#ifdef CONFIG_REGULATOR_ADP_SWITCH
39#include <linux/regulator/adp_switch.h>
40#endif
f32792d0
SZ		 41#ifdef CONFIG_REGULATOR_AD5398
42#include <linux/regulator/ad5398.h>
43#endif
44#include <linux/regulator/consumer.h>
45#include <linux/regulator/userspace-consumer.h>
1394f032
BW		 46
47/*
48 * Name the Board for the /proc/cpuinfo
49 */
fe85cad2 50const char bfin_board_name[] = "ADI BF537-STAMP";
1394f032
BW		 51
52/*
53 * Driver needs to know address, irq and flag pin.
54 */
55
1394f032 56#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
3f375690
MH		 57#include <linux/usb/isp1760.h>
58static struct resource bfin_isp1760_resources[] = {
1394f032 59 [0] = {
3f375690
MH		 60 .start = 0x203C0000,
61 .end = 0x203C0000 + 0x000fffff,
1394f032
BW		 62 .flags = IORESOURCE_MEM,
63 },
64 [1] = {
3f375690
MH		 65 .start = IRQ_PF7,
66 .end = IRQ_PF7,
6a6be3d1 67 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
1394f032
BW		 68 },
69};
70
3f375690
MH		 71static struct isp1760_platform_data isp1760_priv = {
72 .is_isp1761 = 0,
3f375690
MH		 73 .bus_width_16 = 1,
74 .port1_otg = 0,
75 .analog_oc = 0,
76 .dack_polarity_high = 0,
77 .dreq_polarity_high = 0,
1394f032
BW		 78};
79
3f375690 80static struct platform_device bfin_isp1760_device = {
c6feb768 81 .name = "isp1760",
3f375690
MH		 82 .id = 0,
83 .dev = {
84 .platform_data = &isp1760_priv,
85 },
86 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
87 .resource = bfin_isp1760_resources,
1394f032 88};
1394f032
BW		 89#endif
90
2463ef22 91#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
2463ef22
MH		 92#include <linux/gpio_keys.h>
93
94static struct gpio_keys_button bfin_gpio_keys_table[] = {
95 {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"},
96 {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"},
97 {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"},
98 {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"},
99};
100
101static struct gpio_keys_platform_data bfin_gpio_keys_data = {
102 .buttons = bfin_gpio_keys_table,
103 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
104};
105
106static struct platform_device bfin_device_gpiokeys = {
107 .name = "gpio-keys",
108 .dev = {
109 .platform_data = &bfin_gpio_keys_data,
110 },
111};
112#endif
113
1394f032
BW		 114#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
115static struct resource bfin_pcmcia_cf_resources[] = {
116 {
117 .start = 0x20310000, /* IO PORT */
118 .end = 0x20312000,
119 .flags = IORESOURCE_MEM,
1f83b8f1 120 }, {
d2d50aa9 121 .start = 0x20311000, /* Attribute Memory */
1394f032
BW		 122 .end = 0x20311FFF,
123 .flags = IORESOURCE_MEM,
1f83b8f1 124 }, {
1394f032
BW		 125 .start = IRQ_PF4,
126 .end = IRQ_PF4,
127 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
1f83b8f1 128 }, {
1394f032
BW		 129 .start = 6, /* Card Detect PF6 */
130 .end = 6,
131 .flags = IORESOURCE_IRQ,
132 },
133};
134
135static struct platform_device bfin_pcmcia_cf_device = {
136 .name = "bfin_cf_pcmcia",
137 .id = -1,
138 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
139 .resource = bfin_pcmcia_cf_resources,
140};
141#endif
142
143#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
144static struct platform_device rtc_device = {
145 .name = "rtc-bfin",
146 .id = -1,
147};
148#endif
149
150#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
61f09b5a
MH		 151#include <linux/smc91x.h>
152
153static struct smc91x_platdata smc91x_info = {
154 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
155 .leda = RPC_LED_100_10,
156 .ledb = RPC_LED_TX_RX,
157};
158
1394f032
BW		 159static struct resource smc91x_resources[] = {
160 {
161 .name = "smc91x-regs",
162 .start = 0x20300300,
163 .end = 0x20300300 + 16,
164 .flags = IORESOURCE_MEM,
1f83b8f1 165 }, {
1394f032
BW		 166
167 .start = IRQ_PF7,
168 .end = IRQ_PF7,
169 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
170 },
171};
172static struct platform_device smc91x_device = {
173 .name = "smc91x",
174 .id = 0,
175 .num_resources = ARRAY_SIZE(smc91x_resources),
176 .resource = smc91x_resources,
61f09b5a
MH		 177 .dev = {
178 .platform_data = &smc91x_info,
179 },
1394f032
BW		 180};
181#endif
182
f40d24d9
AL		 183#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
184static struct resource dm9000_resources[] = {
185 [0] = {
186 .start = 0x203FB800,
b3dec4a4 187 .end = 0x203FB800 + 1,
f40d24d9
AL		 188 .flags = IORESOURCE_MEM,
189 },
190 [1] = {
b3dec4a4
BS		 191 .start = 0x203FB804,
192 .end = 0x203FB804 + 1,
193 .flags = IORESOURCE_MEM,
194 },
195 [2] = {
f40d24d9
AL		 196 .start = IRQ_PF9,
197 .end = IRQ_PF9,
198 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
199 },
200};
201
202static struct platform_device dm9000_device = {
203 .name = "dm9000",
204 .id = -1,
205 .num_resources = ARRAY_SIZE(dm9000_resources),
206 .resource = dm9000_resources,
207};
208#endif
209
1394f032
BW		 210#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
211static struct resource sl811_hcd_resources[] = {
212 {
213 .start = 0x20340000,
214 .end = 0x20340000,
215 .flags = IORESOURCE_MEM,
1f83b8f1 216 }, {
1394f032
BW		 217 .start = 0x20340004,
218 .end = 0x20340004,
219 .flags = IORESOURCE_MEM,
1f83b8f1 220 }, {
01218654
MF		 221 .start = IRQ_PF4,
222 .end = IRQ_PF4,
1394f032
BW		 223 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
224 },
225};
226
227#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
228void sl811_port_power(struct device *dev, int is_on)
229{
c6c4d7bb 230 gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
acbcd263 231 gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
1394f032
BW		 232}
233#endif
234
235static struct sl811_platform_data sl811_priv = {
236 .potpg = 10,
237 .power = 250, /* == 500mA */
238#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
239 .port_power = &sl811_port_power,
240#endif
241};
242
243static struct platform_device sl811_hcd_device = {
244 .name = "sl811-hcd",
245 .id = 0,
246 .dev = {
247 .platform_data = &sl811_priv,
248 },
249 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
250 .resource = sl811_hcd_resources,
251};
252#endif
253
254#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
255static struct resource isp1362_hcd_resources[] = {
256 {
257 .start = 0x20360000,
258 .end = 0x20360000,
259 .flags = IORESOURCE_MEM,
1f83b8f1 260 }, {
1394f032
BW		 261 .start = 0x20360004,
262 .end = 0x20360004,
263 .flags = IORESOURCE_MEM,
1f83b8f1 264 }, {
21b03cfe
MF		 265 .start = IRQ_PF3,
266 .end = IRQ_PF3,
1394f032
BW		 267 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
268 },
269};
270
271static struct isp1362_platform_data isp1362_priv = {
272 .sel15Kres = 1,
273 .clknotstop = 0,
274 .oc_enable = 0,
275 .int_act_high = 0,
276 .int_edge_triggered = 0,
277 .remote_wakeup_connected = 0,
278 .no_power_switching = 1,
279 .power_switching_mode = 0,
280};
281
282static struct platform_device isp1362_hcd_device = {
283 .name = "isp1362-hcd",
284 .id = 0,
285 .dev = {
286 .platform_data = &isp1362_priv,
287 },
288 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
289 .resource = isp1362_hcd_resources,
290};
291#endif
292
706a01b1
BS		 293#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
294unsigned short bfin_can_peripherals[] = {
295 P_CAN0_RX, P_CAN0_TX, 0
296};
297
298static struct resource bfin_can_resources[] = {
299 {
300 .start = 0xFFC02A00,
301 .end = 0xFFC02FFF,
302 .flags = IORESOURCE_MEM,
303 },
304 {
305 .start = IRQ_CAN_RX,
306 .end = IRQ_CAN_RX,
307 .flags = IORESOURCE_IRQ,
308 },
309 {
310 .start = IRQ_CAN_TX,
311 .end = IRQ_CAN_TX,
312 .flags = IORESOURCE_IRQ,
313 },
314 {
315 .start = IRQ_CAN_ERROR,
316 .end = IRQ_CAN_ERROR,
317 .flags = IORESOURCE_IRQ,
318 },
319};
320
321static struct platform_device bfin_can_device = {
322 .name = "bfin_can",
323 .num_resources = ARRAY_SIZE(bfin_can_resources),
324 .resource = bfin_can_resources,
325 .dev = {
326 .platform_data = &bfin_can_peripherals, /* Passed to driver */
327 },
328};
329#endif
330
1394f032 331#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
65319628
GY		 332static struct platform_device bfin_mii_bus = {
333 .name = "bfin_mii_bus",
334};
335
1394f032
BW		 336static struct platform_device bfin_mac_device = {
337 .name = "bfin_mac",
65319628 338 .dev.platform_data = &bfin_mii_bus,
1394f032
BW		 339};
340#endif
341
342#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
343static struct resource net2272_bfin_resources[] = {
344 {
345 .start = 0x20300000,
346 .end = 0x20300000 + 0x100,
347 .flags = IORESOURCE_MEM,
1f83b8f1 348 }, {
1394f032
BW		 349 .start = IRQ_PF7,
350 .end = IRQ_PF7,
351 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
352 },
353};
354
355static struct platform_device net2272_bfin_device = {
356 .name = "net2272",
357 .id = -1,
358 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
359 .resource = net2272_bfin_resources,
360};
361#endif
362
fc68911e
MF		 363#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
364#ifdef CONFIG_MTD_PARTITIONS
365const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
366
367static struct mtd_partition bfin_plat_nand_partitions[] = {
368 {
aa582977 369 .name = "linux kernel(nand)",
fc68911e
MF		 370 .size = 0x400000,
371 .offset = 0,
372 }, {
aa582977 373 .name = "file system(nand)",
fc68911e
MF		 374 .size = MTDPART_SIZ_FULL,
375 .offset = MTDPART_OFS_APPEND,
376 },
377};
378#endif
379
380#define BFIN_NAND_PLAT_CLE 2
381#define BFIN_NAND_PLAT_ALE 1
382static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
383{
384 struct nand_chip *this = mtd->priv;
385
386 if (cmd == NAND_CMD_NONE)
387 return;
388
389 if (ctrl & NAND_CLE)
390 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE));
391 else
392 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE));
393}
394
395#define BFIN_NAND_PLAT_READY GPIO_PF3
396static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)
397{
398 return gpio_get_value(BFIN_NAND_PLAT_READY);
399}
400
401static struct platform_nand_data bfin_plat_nand_data = {
402 .chip = {
403 .chip_delay = 30,
404#ifdef CONFIG_MTD_PARTITIONS
405 .part_probe_types = part_probes,
406 .partitions = bfin_plat_nand_partitions,
407 .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),
408#endif
409 },
410 .ctrl = {
411 .cmd_ctrl = bfin_plat_nand_cmd_ctrl,
412 .dev_ready = bfin_plat_nand_dev_ready,
413 },
414};
415
416#define MAX(x, y) (x > y ? x : y)
417static struct resource bfin_plat_nand_resources = {
418 .start = 0x20212000,
419 .end = 0x20212000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),
420 .flags = IORESOURCE_IO,
421};
422
423static struct platform_device bfin_async_nand_device = {
424 .name = "gen_nand",
425 .id = -1,
426 .num_resources = 1,
427 .resource = &bfin_plat_nand_resources,
428 .dev = {
429 .platform_data = &bfin_plat_nand_data,
430 },
431};
432
433static void bfin_plat_nand_init(void)
434{
435 gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat");
436}
437#else
438static void bfin_plat_nand_init(void) {}
439#endif
440
793dc27b 441#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
de8c43f2
MF		 442static struct mtd_partition stamp_partitions[] = {
443 {
aa582977 444 .name = "bootloader(nor)",
edf05641 445 .size = 0x40000,
de8c43f2
MF		 446 .offset = 0,
447 }, {
aa582977 448 .name = "linux kernel(nor)",
6ecb5b6d 449 .size = 0x180000,
de8c43f2
MF		 450 .offset = MTDPART_OFS_APPEND,
451 }, {
aa582977 452 .name = "file system(nor)",
6ecb5b6d 453 .size = 0x400000 - 0x40000 - 0x180000 - 0x10000,
de8c43f2
MF		 454 .offset = MTDPART_OFS_APPEND,
455 }, {
aa582977 456 .name = "MAC Address(nor)",
de8c43f2
MF		 457 .size = MTDPART_SIZ_FULL,
458 .offset = 0x3F0000,
459 .mask_flags = MTD_WRITEABLE,
460 }
461};
462
463static struct physmap_flash_data stamp_flash_data = {
464 .width = 2,
465 .parts = stamp_partitions,
466 .nr_parts = ARRAY_SIZE(stamp_partitions),
38e7673f
BS		 467#ifdef CONFIG_ROMKERNEL
468 .probe_type = "map_rom",
469#endif
de8c43f2
MF		 470};
471
472static struct resource stamp_flash_resource = {
473 .start = 0x20000000,
474 .end = 0x203fffff,
475 .flags = IORESOURCE_MEM,
476};
477
478static struct platform_device stamp_flash_device = {
479 .name = "physmap-flash",
480 .id = 0,
481 .dev = {
482 .platform_data = &stamp_flash_data,
483 },
484 .num_resources = 1,
485 .resource = &stamp_flash_resource,
486};
793dc27b 487#endif
de8c43f2 488
1394f032
BW		 489#if defined(CONFIG_MTD_M25P80) \
490 || defined(CONFIG_MTD_M25P80_MODULE)
491static struct mtd_partition bfin_spi_flash_partitions[] = {
492 {
aa582977 493 .name = "bootloader(spi)",
edf05641 494 .size = 0x00040000,
1394f032
BW		 495 .offset = 0,
496 .mask_flags = MTD_CAP_ROM
1f83b8f1 497 }, {
aa582977 498 .name = "linux kernel(spi)",
6ecb5b6d 499 .size = 0x180000,
edf05641 500 .offset = MTDPART_OFS_APPEND,
1f83b8f1 501 }, {
aa582977 502 .name = "file system(spi)",
edf05641
MF		 503 .size = MTDPART_SIZ_FULL,
504 .offset = MTDPART_OFS_APPEND,
1394f032
BW		 505 }
506};
507
508static struct flash_platform_data bfin_spi_flash_data = {
509 .name = "m25p80",
510 .parts = bfin_spi_flash_partitions,
511 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
88a8078b 512 /* .type = "m25p64", */
1394f032
BW		 513};
514
515/* SPI flash chip (m25p64) */
516static struct bfin5xx_spi_chip spi_flash_chip_info = {
517 .enable_dma = 0, /* use dma transfer with this chip*/
518 .bits_per_word = 8,
519};
520#endif
521
a261eec0
MF		 522#if defined(CONFIG_BFIN_SPI_ADC) \
523 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
1394f032
BW		 524/* SPI ADC chip */
525static struct bfin5xx_spi_chip spi_adc_chip_info = {
526 .enable_dma = 1, /* use dma transfer with this chip*/
527 .bits_per_word = 16,
528};
529#endif
530
d40bd71f
BS		 531#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
532 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
1394f032
BW		 533static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
534 .enable_dma = 0,
535 .bits_per_word = 16,
536};
537#endif
538
3b82790c
BS		 539#if defined(CONFIG_SND_BF5XX_SOC_AD193X) \
540 || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
d4b834c1
BS		 541static struct bfin5xx_spi_chip ad1938_spi_chip_info = {
542 .enable_dma = 0,
543 .bits_per_word = 8,
d4b834c1
BS		 544};
545#endif
546
5b7c5775 547#if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
427f277e
BS		 548#include <linux/input/ad714x.h>
549static struct bfin5xx_spi_chip ad7147_spi_chip_info = {
550 .enable_dma = 0,
551 .bits_per_word = 16,
552};
553
5b7c5775 554static struct ad714x_slider_plat ad7147_spi_slider_plat[] = {
427f277e
BS		 555 {
556 .start_stage = 0,
557 .end_stage = 7,
558 .max_coord = 128,
559 },
560};
561
5b7c5775 562static struct ad714x_button_plat ad7147_spi_button_plat[] = {
427f277e
BS		 563 {
564 .keycode = BTN_FORWARD,
565 .l_mask = 0,
566 .h_mask = 0x600,
567 },
568 {
569 .keycode = BTN_LEFT,
570 .l_mask = 0,
571 .h_mask = 0x500,
572 },
573 {
574 .keycode = BTN_MIDDLE,
575 .l_mask = 0,
576 .h_mask = 0x800,
577 },
578 {
579 .keycode = BTN_RIGHT,
580 .l_mask = 0x100,
581 .h_mask = 0x400,
582 },
583 {
584 .keycode = BTN_BACK,
585 .l_mask = 0x200,
586 .h_mask = 0x400,
587 },
588};
5b7c5775 589static struct ad714x_platform_data ad7147_spi_platform_data = {
427f277e
BS		 590 .slider_num = 1,
591 .button_num = 5,
5b7c5775
MF		 592 .slider = ad7147_spi_slider_plat,
593 .button = ad7147_spi_button_plat,
427f277e
BS		 594 .stage_cfg_reg = {
595 {0xFBFF, 0x1FFF, 0, 0x2626, 1600, 1600, 1600, 1600},
596 {0xEFFF, 0x1FFF, 0, 0x2626, 1650, 1650, 1650, 1650},
597 {0xFFFF, 0x1FFE, 0, 0x2626, 1650, 1650, 1650, 1650},
598 {0xFFFF, 0x1FFB, 0, 0x2626, 1650, 1650, 1650, 1650},
599 {0xFFFF, 0x1FEF, 0, 0x2626, 1650, 1650, 1650, 1650},
600 {0xFFFF, 0x1FBF, 0, 0x2626, 1650, 1650, 1650, 1650},
601 {0xFFFF, 0x1EFF, 0, 0x2626, 1650, 1650, 1650, 1650},
602 {0xFFFF, 0x1BFF, 0, 0x2626, 1600, 1600, 1600, 1600},
603 {0xFF7B, 0x3FFF, 0x506, 0x2626, 1100, 1100, 1150, 1150},
604 {0xFDFE, 0x3FFF, 0x606, 0x2626, 1100, 1100, 1150, 1150},
605 {0xFEBA, 0x1FFF, 0x1400, 0x2626, 1200, 1200, 1300, 1300},
606 {0xFFEF, 0x1FFF, 0x0, 0x2626, 1100, 1100, 1150, 1150},
607 },
608 .sys_cfg_reg = {0x2B2, 0x0, 0x3233, 0x819, 0x832, 0xCFF, 0xCFF, 0x0},
609};
610#endif
611
5b7c5775 612#if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
427f277e 613#include <linux/input/ad714x.h>
5b7c5775 614static struct ad714x_button_plat ad7142_i2c_button_plat[] = {
427f277e
BS		 615 {
616 .keycode = BTN_1,
617 .l_mask = 0,
618 .h_mask = 0x1,
619 },
620 {
621 .keycode = BTN_2,
622 .l_mask = 0,
623 .h_mask = 0x2,
624 },
625 {
626 .keycode = BTN_3,
627 .l_mask = 0,
628 .h_mask = 0x4,
629 },
630 {
631 .keycode = BTN_4,
632 .l_mask = 0x0,
633 .h_mask = 0x8,
634 },
635};
5b7c5775 636static struct ad714x_platform_data ad7142_i2c_platform_data = {
427f277e 637 .button_num = 4,
5b7c5775 638 .button = ad7142_i2c_button_plat,
427f277e
BS		 639 .stage_cfg_reg = {
640 /* fixme: figure out right setting for all comoponent according
641 * to hardware feature of EVAL-AD7142EB board */
642 {0xE7FF, 0x3FFF, 0x0005, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
643 {0xFDBF, 0x3FFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
644 {0xFFFF, 0x2DFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
645 {0xFFFF, 0x37BF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
646 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
647 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
648 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
649 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
650 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
651 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
652 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
653 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
654 },
655 .sys_cfg_reg = {0x0B2, 0x0, 0x690, 0x664, 0x290F, 0xF, 0xF, 0x0},
656};
657#endif
658
f5f9531c
GY		 659#if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
660static struct bfin5xx_spi_chip ad2s90_spi_chip_info = {
661 .enable_dma = 0,
662 .bits_per_word = 16,
663};
664#endif
665
df6a949b
GY		 666#if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
667unsigned short ad2s120x_platform_data[] = {
668 /* used as SAMPLE and RDVEL */
669 GPIO_PF5, GPIO_PF6, 0
670};
671
672static struct bfin5xx_spi_chip ad2s120x_spi_chip_info = {
673 .enable_dma = 0,
674 .bits_per_word = 16,
675};
676#endif
677
848c51cc
GY		 678#if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
679unsigned short ad2s1210_platform_data[] = {
680 /* use as SAMPLE, A0, A1 */
681 GPIO_PF7, GPIO_PF8, GPIO_PF9,
682# if defined(CONFIG_AD2S1210_GPIO_INPUT) || defined(CONFIG_AD2S1210_GPIO_OUTPUT)
683 /* the RES0 and RES1 pins */
684 GPIO_PF4, GPIO_PF5,
685# endif
686 0,
687};
688
689static struct bfin5xx_spi_chip ad2s1210_spi_chip_info = {
690 .enable_dma = 0,
691 .bits_per_word = 8,
692};
693#endif
694
f79ea4cb
YL		 695#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
696#define MMC_SPI_CARD_DETECT_INT IRQ_PF5
697
698static int bfin_mmc_spi_init(struct device *dev,
699 irqreturn_t (*detect_int)(int, void *), void *data)
700{
701 return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
702 IRQF_TRIGGER_FALLING, "mmc-spi-detect", data);
703}
704
705static void bfin_mmc_spi_exit(struct device *dev, void *data)
706{
707 free_irq(MMC_SPI_CARD_DETECT_INT, data);
708}
709
710static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
711 .init = bfin_mmc_spi_init,
712 .exit = bfin_mmc_spi_exit,
713 .detect_delay = 100, /* msecs */
714};
715
716static struct bfin5xx_spi_chip mmc_spi_chip_info = {
717 .enable_dma = 0,
718 .bits_per_word = 8,
e68d1ebc 719 .pio_interrupt = 0,
f79ea4cb
YL		 720};
721#endif
722
1394f032 723#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
46aa04f9 724#include <linux/spi/ad7877.h>
1394f032 725static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
1394f032
BW		 726 .enable_dma = 0,
727 .bits_per_word = 16,
728};
729
730static const struct ad7877_platform_data bfin_ad7877_ts_info = {
731 .model = 7877,
732 .vref_delay_usecs = 50, /* internal, no capacitor */
733 .x_plate_ohms = 419,
734 .y_plate_ohms = 486,
735 .pressure_max = 1000,
736 .pressure_min = 0,
6ba255f4
MH		 737 .stopacq_polarity = 1,
738 .first_conversion_delay = 3,
739 .acquisition_time = 1,
740 .averaging = 1,
741 .pen_down_acc_interval = 1,
1394f032
BW		 742};
743#endif
744
46aa04f9
MH		 745#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
746#include <linux/spi/ad7879.h>
46aa04f9
MH		 747static const struct ad7879_platform_data bfin_ad7879_ts_info = {
748 .model = 7879, /* Model = AD7879 */
749 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
750 .pressure_max = 10000,
751 .pressure_min = 0,
6ba255f4
MH		 752 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
753 .acquisition_time = 1, /* 4us acquisition time per sample */
46aa04f9 754 .median = 2, /* do 8 measurements */
6ba255f4
MH		 755 .averaging = 1, /* take the average of 4 middle samples */
756 .pen_down_acc_interval = 255, /* 9.4 ms */
244d3423
MH		 757 .gpio_export = 1, /* Export GPIO to gpiolib */
758 .gpio_base = -1, /* Dynamic allocation */
46aa04f9
MH		 759};
760#endif
761
ffc4d8bc 762#if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
57af8edf 763#include <linux/input/adxl34x.h>
ffc4d8bc
MH		 764static const struct adxl34x_platform_data adxl34x_info = {
765 .x_axis_offset = 0,
766 .y_axis_offset = 0,
767 .z_axis_offset = 0,
768 .tap_threshold = 0x31,
769 .tap_duration = 0x10,
770 .tap_latency = 0x60,
771 .tap_window = 0xF0,
772 .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
773 .act_axis_control = 0xFF,
774 .activity_threshold = 5,
775 .inactivity_threshold = 3,
776 .inactivity_time = 4,
777 .free_fall_threshold = 0x7,
778 .free_fall_time = 0x20,
779 .data_rate = 0x8,
780 .data_range = ADXL_FULL_RES,
781
782 .ev_type = EV_ABS,
783 .ev_code_x = ABS_X, /* EV_REL */
784 .ev_code_y = ABS_Y, /* EV_REL */
785 .ev_code_z = ABS_Z, /* EV_REL */
786
57af8edf 787 .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
ffc4d8bc
MH		 788
789/* .ev_code_ff = KEY_F,*/ /* EV_KEY */
790/* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
791 .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
792 .fifo_mode = ADXL_FIFO_STREAM,
6ba255f4
MH		 793 .orientation_enable = ADXL_EN_ORIENTATION_3D,
794 .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
795 .divisor_length = ADXL_LP_FILTER_DIVISOR_16,
796 /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
797 .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
ffc4d8bc
MH		 798};
799#endif
800
f5150155
MH		 801#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
802static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
803 .enable_dma = 0,
804 .bits_per_word = 16,
805};
806#endif
807
6e668936
MH		 808#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
809static struct bfin5xx_spi_chip spidev_chip_info = {
810 .enable_dma = 0,
811 .bits_per_word = 8,
812};
813#endif
814
2043f3f7
MH		 815#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
816static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
817 .enable_dma = 0,
818 .bits_per_word = 8,
819};
820#endif
821
85a192e9
MH		 822#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
823static struct bfin5xx_spi_chip enc28j60_spi_chip_info = {
824 .enable_dma = 1,
825 .bits_per_word = 8,
826 .cs_gpio = GPIO_PF10,
827};
828#endif
829
efaf7cd9
MH		 830#if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
831static struct bfin5xx_spi_chip adf7021_spi_chip_info = {
832 .bits_per_word = 16,
833 .cs_gpio = GPIO_PF10,
834};
835
836#include <linux/spi/adf702x.h>
837#define TXREG 0x0160A470
838static const u32 adf7021_regs[] = {
839 0x09608FA0,
840 0x00575011,
841 0x00A7F092,
842 0x2B141563,
843 0x81F29E94,
844 0x00003155,
845 0x050A4F66,
846 0x00000007,
847 0x00000008,
848 0x000231E9,
849 0x3296354A,
850 0x891A2B3B,
851 0x00000D9C,
852 0x0000000D,
853 0x0000000E,
854 0x0000000F,
855};
856
857static struct adf702x_platform_data adf7021_platform_data = {
858 .regs_base = (void *)SPORT1_TCR1,
859 .dma_ch_rx = CH_SPORT1_RX,
860 .dma_ch_tx = CH_SPORT1_TX,
861 .irq_sport_err = IRQ_SPORT1_ERROR,
862 .gpio_int_rfs = GPIO_PF8,
863 .pin_req = {P_SPORT1_DTPRI, P_SPORT1_RFS, P_SPORT1_DRPRI,
864 P_SPORT1_RSCLK, P_SPORT1_TSCLK, 0},
865 .adf702x_model = MODEL_ADF7021,
866 .adf702x_regs = adf7021_regs,
867 .tx_reg = TXREG,
868};
0531c467
MF		 869static inline void adf702x_mac_init(void)
870{
871 random_ether_addr(adf7021_platform_data.mac_addr);
872}
873#else
874static inline void adf702x_mac_init(void) {}
efaf7cd9
MH		 875#endif
876
fe5b25c0
MH		 877#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
878#include <linux/spi/ads7846.h>
879static struct bfin5xx_spi_chip ad7873_spi_chip_info = {
880 .bits_per_word = 8,
881};
882
883static int ads7873_get_pendown_state(void)
884{
885 return gpio_get_value(GPIO_PF6);
886}
887
888static struct ads7846_platform_data __initdata ad7873_pdata = {
889 .model = 7873, /* AD7873 */
890 .x_max = 0xfff,
891 .y_max = 0xfff,
892 .x_plate_ohms = 620,
893 .debounce_max = 1,
894 .debounce_rep = 0,
895 .debounce_tol = (~0),
896 .get_pendown_state = ads7873_get_pendown_state,
897};
898#endif
899
8e9d5c7d
MH		 900#if defined(CONFIG_MTD_DATAFLASH) \
901 || defined(CONFIG_MTD_DATAFLASH_MODULE)
ceac2651
MH		 902
903static struct mtd_partition bfin_spi_dataflash_partitions[] = {
904 {
905 .name = "bootloader(spi)",
906 .size = 0x00040000,
907 .offset = 0,
908 .mask_flags = MTD_CAP_ROM
909 }, {
910 .name = "linux kernel(spi)",
6ecb5b6d 911 .size = 0x180000,
ceac2651
MH		 912 .offset = MTDPART_OFS_APPEND,
913 }, {
914 .name = "file system(spi)",
915 .size = MTDPART_SIZ_FULL,
916 .offset = MTDPART_OFS_APPEND,
917 }
918};
919
920static struct flash_platform_data bfin_spi_dataflash_data = {
921 .name = "SPI Dataflash",
922 .parts = bfin_spi_dataflash_partitions,
923 .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),
924};
925
8e9d5c7d
MH		 926/* DataFlash chip */
927static struct bfin5xx_spi_chip data_flash_chip_info = {
928 .enable_dma = 0, /* use dma transfer with this chip*/
929 .bits_per_word = 8,
930};
931#endif
932
57af8edf
MH		 933#if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
934static struct bfin5xx_spi_chip spi_adxl34x_chip_info = {
935 .enable_dma = 0, /* use dma transfer with this chip*/
936 .bits_per_word = 8,
937};
938#endif
939
1394f032
BW		 940static struct spi_board_info bfin_spi_board_info[] __initdata = {
941#if defined(CONFIG_MTD_M25P80) \
942 || defined(CONFIG_MTD_M25P80_MODULE)
943 {
944 /* the modalias must be the same as spi device driver name */
945 .modalias = "m25p80", /* Name of spi_driver for this device */
946 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 947 .bus_num = 0, /* Framework bus number */
1394f032
BW		 948 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
949 .platform_data = &bfin_spi_flash_data,
950 .controller_data = &spi_flash_chip_info,
951 .mode = SPI_MODE_3,
952 },
953#endif
8e9d5c7d
MH		 954#if defined(CONFIG_MTD_DATAFLASH) \
955 || defined(CONFIG_MTD_DATAFLASH_MODULE)
956 { /* DataFlash chip */
957 .modalias = "mtd_dataflash",
ceac2651 958 .max_speed_hz = 33250000, /* max spi clock (SCK) speed in HZ */
8e9d5c7d
MH		 959 .bus_num = 0, /* Framework bus number */
960 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
ceac2651 961 .platform_data = &bfin_spi_dataflash_data,
8e9d5c7d
MH		 962 .controller_data = &data_flash_chip_info,
963 .mode = SPI_MODE_3,
964 },
965#endif
a261eec0
MF		 966#if defined(CONFIG_BFIN_SPI_ADC) \
967 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
1394f032
BW		 968 {
969 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
970 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 971 .bus_num = 0, /* Framework bus number */
1394f032
BW		 972 .chip_select = 1, /* Framework chip select. */
973 .platform_data = NULL, /* No spi_driver specific config */
974 .controller_data = &spi_adc_chip_info,
975 },
976#endif
977
d40bd71f
BS		 978#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
979 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
1394f032 980 {
d40bd71f 981 .modalias = "ad183x",
1394f032 982 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 983 .bus_num = 0,
8312440e 984 .chip_select = 4,/* CONFIG_SND_BLACKFIN_SPI_PFBIT */
d40bd71f 985 .platform_data = "ad1836", /* only includes chip name for the moment */
1394f032 986 .controller_data = &ad1836_spi_chip_info,
8312440e 987 .mode = SPI_MODE_3,
1394f032
BW		 988 },
989#endif
d4b834c1 990
3b82790c 991#if defined(CONFIG_SND_BF5XX_SOC_AD193X) || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
d4b834c1 992 {
3b82790c 993 .modalias = "ad193x",
d4b834c1
BS		 994 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
995 .bus_num = 0,
08a54bff 996 .chip_select = 5,
d4b834c1
BS		 997 .controller_data = &ad1938_spi_chip_info,
998 .mode = SPI_MODE_3,
999 },
1000#endif
1001
5b7c5775 1002#if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
427f277e
BS		 1003 {
1004 .modalias = "ad714x_captouch",
1005 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1006 .irq = IRQ_PF4,
1007 .bus_num = 0,
1008 .chip_select = 5,
1009 .mode = SPI_MODE_3,
5b7c5775 1010 .platform_data = &ad7147_spi_platform_data,
427f277e
BS		 1011 .controller_data = &ad7147_spi_chip_info,
1012 },
1013#endif
1014
f5f9531c
GY		 1015#if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
1016 {
1017 .modalias = "ad2s90",
1018 .bus_num = 0,
1019 .chip_select = 3, /* change it for your board */
1020 .platform_data = NULL,
1021 .controller_data = &ad2s90_spi_chip_info,
1022 },
1023#endif
1024
df6a949b
GY		 1025#if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
1026 {
1027 .modalias = "ad2s120x",
1028 .bus_num = 0,
1029 .chip_select = 4, /* CS, change it for your board */
1030 .platform_data = ad2s120x_platform_data,
1031 .controller_data = &ad2s120x_spi_chip_info,
1032 },
1033#endif
1034
848c51cc
GY		 1035#if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
1036 {
1037 .modalias = "ad2s1210",
1038 .max_speed_hz = 8192000,
1039 .bus_num = 0,
1040 .chip_select = 4, /* CS, change it for your board */
1041 .platform_data = ad2s1210_platform_data,
1042 .controller_data = &ad2s1210_spi_chip_info,
1043 },
1044#endif
1045
f79ea4cb
YL		 1046#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
1047 {
1048 .modalias = "mmc_spi",
1049 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
1050 .bus_num = 0,
1051 .chip_select = 4,
1052 .platform_data = &bfin_mmc_spi_pdata,
1053 .controller_data = &mmc_spi_chip_info,
1054 .mode = SPI_MODE_3,
1055 },
1056#endif
1394f032
BW		 1057#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
1058 {
1059 .modalias = "ad7877",
1060 .platform_data = &bfin_ad7877_ts_info,
1061 .irq = IRQ_PF6,
1062 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
c7d48966 1063 .bus_num = 0,
1394f032
BW		 1064 .chip_select = 1,
1065 .controller_data = &spi_ad7877_chip_info,
1066 },
1067#endif
f5150155 1068#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
46aa04f9
MH		 1069 {
1070 .modalias = "ad7879",
1071 .platform_data = &bfin_ad7879_ts_info,
1072 .irq = IRQ_PF7,
1073 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
1074 .bus_num = 0,
1075 .chip_select = 1,
1076 .controller_data = &spi_ad7879_chip_info,
1077 .mode = SPI_CPHA | SPI_CPOL,
1078 },
1079#endif
6e668936
MH		 1080#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
1081 {
1082 .modalias = "spidev",
1083 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
1084 .bus_num = 0,
1085 .chip_select = 1,
1086 .controller_data = &spidev_chip_info,
1087 },
1088#endif
2043f3f7
MH		 1089#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1090 {
1091 .modalias = "bfin-lq035q1-spi",
1092 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
1093 .bus_num = 0,
46aa04f9 1094 .chip_select = 2,
2043f3f7
MH		 1095 .controller_data = &lq035q1_spi_chip_info,
1096 .mode = SPI_CPHA | SPI_CPOL,
1097 },
1098#endif
85a192e9
MH		 1099#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
1100 {
1101 .modalias = "enc28j60",
1102 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
1103 .irq = IRQ_PF6,
1104 .bus_num = 0,
1105 .chip_select = 0, /* GPIO controlled SSEL */
1106 .controller_data = &enc28j60_spi_chip_info,
1107 .mode = SPI_MODE_0,
1108 },
1109#endif
57af8edf
MH		 1110#if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
1111 {
1112 .modalias = "adxl34x",
1113 .platform_data = &adxl34x_info,
1114 .irq = IRQ_PF6,
1115 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
1116 .bus_num = 0,
1117 .chip_select = 2,
1118 .controller_data = &spi_adxl34x_chip_info,
1119 .mode = SPI_MODE_3,
1120 },
1121#endif
efaf7cd9
MH		 1122#if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
1123 {
1124 .modalias = "adf702x",
1125 .max_speed_hz = 16000000, /* max spi clock (SCK) speed in HZ */
1126 .bus_num = 0,
1127 .chip_select = 0, /* GPIO controlled SSEL */
1128 .controller_data = &adf7021_spi_chip_info,
1129 .platform_data = &adf7021_platform_data,
1130 .mode = SPI_MODE_0,
1131 },
1132#endif
fe5b25c0
MH		 1133#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
1134 {
1135 .modalias = "ads7846",
1136 .max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */
1137 .bus_num = 0,
1138 .irq = IRQ_PF6,
1139 .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
1140 .controller_data = &ad7873_spi_chip_info,
1141 .platform_data = &ad7873_pdata,
1142 .mode = SPI_MODE_0,
1143 },
1144#endif
1394f032
BW		 1145};
1146
5bda2723 1147#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
1394f032 1148/* SPI controller data */
c6c4d7bb 1149static struct bfin5xx_spi_master bfin_spi0_info = {
1394f032
BW		 1150 .num_chipselect = 8,
1151 .enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5 1152 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1394f032
BW		 1153};
1154
c6c4d7bb
BW		 1155/* SPI (0) */
1156static struct resource bfin_spi0_resource[] = {
1157 [0] = {
1158 .start = SPI0_REGBASE,
1159 .end = SPI0_REGBASE + 0xFF,
1160 .flags = IORESOURCE_MEM,
1161 },
1162 [1] = {
1163 .start = CH_SPI,
1164 .end = CH_SPI,
e68d1ebc
YL		 1165 .flags = IORESOURCE_DMA,
1166 },
1167 [2] = {
1168 .start = IRQ_SPI,
1169 .end = IRQ_SPI,
c6c4d7bb
BW		 1170 .flags = IORESOURCE_IRQ,
1171 },
1172};
1173
1174static struct platform_device bfin_spi0_device = {
1175 .name = "bfin-spi",
1176 .id = 0, /* Bus number */
1177 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
1178 .resource = bfin_spi0_resource,
1394f032 1179 .dev = {
c6c4d7bb 1180 .platform_data = &bfin_spi0_info, /* Passed to driver */
1394f032
BW		 1181 },
1182};
1183#endif /* spi master and devices */
1184
1e9aa955
CC		 1185#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
1186
1187/* SPORT SPI controller data */
1188static struct bfin5xx_spi_master bfin_sport_spi0_info = {
1189 .num_chipselect = 1, /* master only supports one device */
1190 .enable_dma = 0, /* master don't support DMA */
1191 .pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,
1192 P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0},
1193};
1194
1195static struct resource bfin_sport_spi0_resource[] = {
1196 [0] = {
1197 .start = SPORT0_TCR1,
1198 .end = SPORT0_TCR1 + 0xFF,
1199 .flags = IORESOURCE_MEM,
1200 },
1201 [1] = {
1202 .start = IRQ_SPORT0_ERROR,
1203 .end = IRQ_SPORT0_ERROR,
1204 .flags = IORESOURCE_IRQ,
1205 },
1206};
1207
1208static struct platform_device bfin_sport_spi0_device = {
1209 .name = "bfin-sport-spi",
1210 .id = 1, /* Bus number */
1211 .num_resources = ARRAY_SIZE(bfin_sport_spi0_resource),
1212 .resource = bfin_sport_spi0_resource,
1213 .dev = {
1214 .platform_data = &bfin_sport_spi0_info, /* Passed to driver */
1215 },
1216};
1217
1218static struct bfin5xx_spi_master bfin_sport_spi1_info = {
1219 .num_chipselect = 1, /* master only supports one device */
1220 .enable_dma = 0, /* master don't support DMA */
1221 .pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI,
1222 P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0},
1223};
1224
1225static struct resource bfin_sport_spi1_resource[] = {
1226 [0] = {
1227 .start = SPORT1_TCR1,
1228 .end = SPORT1_TCR1 + 0xFF,
1229 .flags = IORESOURCE_MEM,
1230 },
1231 [1] = {
1232 .start = IRQ_SPORT1_ERROR,
1233 .end = IRQ_SPORT1_ERROR,
1234 .flags = IORESOURCE_IRQ,
1235 },
1236};
1237
1238static struct platform_device bfin_sport_spi1_device = {
1239 .name = "bfin-sport-spi",
1240 .id = 2, /* Bus number */
1241 .num_resources = ARRAY_SIZE(bfin_sport_spi1_resource),
1242 .resource = bfin_sport_spi1_resource,
1243 .dev = {
1244 .platform_data = &bfin_sport_spi1_info, /* Passed to driver */
1245 },
1246};
1247
1248#endif /* sport spi master and devices */
1249
1394f032
BW		 1250#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
1251static struct platform_device bfin_fb_device = {
c6c4d7bb
BW		 1252 .name = "bf537-lq035",
1253};
1254#endif
1255
2043f3f7
MH		 1256#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1257#include <asm/bfin-lq035q1.h>
1258
1259static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
d94a1aa4
MH		 1260 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
1261 .ppi_mode = USE_RGB565_16_BIT_PPI,
1262 .use_bl = 0, /* let something else control the LCD Blacklight */
1263 .gpio_bl = GPIO_PF7,
2043f3f7
MH		 1264};
1265
1266static struct resource bfin_lq035q1_resources[] = {
1267 {
1268 .start = IRQ_PPI_ERROR,
1269 .end = IRQ_PPI_ERROR,
1270 .flags = IORESOURCE_IRQ,
1271 },
1272};
1273
1274static struct platform_device bfin_lq035q1_device = {
1275 .name = "bfin-lq035q1",
1276 .id = -1,
d94a1aa4
MH		 1277 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
1278 .resource = bfin_lq035q1_resources,
2043f3f7
MH		 1279 .dev = {
1280 .platform_data = &bfin_lq035q1_data,
1281 },
1282};
1283#endif
1284
1394f032 1285#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
233b28a9 1286#ifdef CONFIG_SERIAL_BFIN_UART0
6bd1fbea 1287static struct resource bfin_uart0_resources[] = {
1394f032 1288 {
6bd1fbea
SZ		 1289 .start = UART0_THR,
1290 .end = UART0_GCTL+2,
1394f032 1291 .flags = IORESOURCE_MEM,
233b28a9 1292 },
6bd1fbea
SZ		 1293 {
1294 .start = IRQ_UART0_RX,
1295 .end = IRQ_UART0_RX+1,
1296 .flags = IORESOURCE_IRQ,
1297 },
1298 {
1299 .start = IRQ_UART0_ERROR,
1300 .end = IRQ_UART0_ERROR,
1301 .flags = IORESOURCE_IRQ,
1302 },
1303 {
1304 .start = CH_UART0_TX,
1305 .end = CH_UART0_TX,
1306 .flags = IORESOURCE_DMA,
1307 },
1308 {
1309 .start = CH_UART0_RX,
1310 .end = CH_UART0_RX,
1311 .flags = IORESOURCE_DMA,
1312 },
1313#ifdef CONFIG_BFIN_UART0_CTSRTS
1314 { /* CTS pin */
1315 .start = GPIO_PG7,
1316 .end = GPIO_PG7,
1317 .flags = IORESOURCE_IO,
1318 },
1319 { /* RTS pin */
1320 .start = GPIO_PG6,
1321 .end = GPIO_PG6,
1322 .flags = IORESOURCE_IO,
1323 },
1324#endif
1325};
1326
1327unsigned short bfin_uart0_peripherals[] = {
1328 P_UART0_TX, P_UART0_RX, 0
1329};
1330
1331static struct platform_device bfin_uart0_device = {
1332 .name = "bfin-uart",
1333 .id = 0,
1334 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
1335 .resource = bfin_uart0_resources,
1336 .dev = {
1337 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
1338 },
1339};
233b28a9
SZ		 1340#endif
1341#ifdef CONFIG_SERIAL_BFIN_UART1
6bd1fbea 1342static struct resource bfin_uart1_resources[] = {
233b28a9 1343 {
6bd1fbea
SZ		 1344 .start = UART1_THR,
1345 .end = UART1_GCTL+2,
1394f032
BW		 1346 .flags = IORESOURCE_MEM,
1347 },
6bd1fbea
SZ		 1348 {
1349 .start = IRQ_UART1_RX,
1350 .end = IRQ_UART1_RX+1,
1351 .flags = IORESOURCE_IRQ,
1352 },
1353 {
1354 .start = IRQ_UART1_ERROR,
1355 .end = IRQ_UART1_ERROR,
1356 .flags = IORESOURCE_IRQ,
1357 },
1358 {
1359 .start = CH_UART1_TX,
1360 .end = CH_UART1_TX,
1361 .flags = IORESOURCE_DMA,
1362 },
1363 {
1364 .start = CH_UART1_RX,
1365 .end = CH_UART1_RX,
1366 .flags = IORESOURCE_DMA,
1367 },
1368};
1369
1370unsigned short bfin_uart1_peripherals[] = {
1371 P_UART1_TX, P_UART1_RX, 0
1394f032
BW		 1372};
1373
6bd1fbea 1374static struct platform_device bfin_uart1_device = {
1394f032
BW		 1375 .name = "bfin-uart",
1376 .id = 1,
6bd1fbea
SZ		 1377 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
1378 .resource = bfin_uart1_resources,
1379 .dev = {
1380 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
1381 },
1394f032
BW		 1382};
1383#endif
6bd1fbea 1384#endif
1394f032 1385
5be36d22 1386#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
5be36d22 1387#ifdef CONFIG_BFIN_SIR0
42bd8bcb 1388static struct resource bfin_sir0_resources[] = {
5be36d22
GY		 1389 {
1390 .start = 0xFFC00400,
1391 .end = 0xFFC004FF,
1392 .flags = IORESOURCE_MEM,
1393 },
42bd8bcb
GY		 1394 {
1395 .start = IRQ_UART0_RX,
1396 .end = IRQ_UART0_RX+1,
1397 .flags = IORESOURCE_IRQ,
1398 },
1399 {
1400 .start = CH_UART0_RX,
1401 .end = CH_UART0_RX+1,
1402 .flags = IORESOURCE_DMA,
1403 },
1404};
1405
1406static struct platform_device bfin_sir0_device = {
1407 .name = "bfin_sir",
1408 .id = 0,
1409 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
1410 .resource = bfin_sir0_resources,
1411};
5be36d22
GY		 1412#endif
1413#ifdef CONFIG_BFIN_SIR1
42bd8bcb 1414static struct resource bfin_sir1_resources[] = {
5be36d22
GY		 1415 {
1416 .start = 0xFFC02000,
1417 .end = 0xFFC020FF,
1418 .flags = IORESOURCE_MEM,
1419 },
42bd8bcb
GY		 1420 {
1421 .start = IRQ_UART1_RX,
1422 .end = IRQ_UART1_RX+1,
1423 .flags = IORESOURCE_IRQ,
1424 },
1425 {
1426 .start = CH_UART1_RX,
1427 .end = CH_UART1_RX+1,
1428 .flags = IORESOURCE_DMA,
1429 },
5be36d22
GY		 1430};
1431
42bd8bcb 1432static struct platform_device bfin_sir1_device = {
5be36d22 1433 .name = "bfin_sir",
42bd8bcb
GY		 1434 .id = 1,
1435 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
1436 .resource = bfin_sir1_resources,
5be36d22
GY		 1437};
1438#endif
42bd8bcb 1439#endif
5be36d22 1440
1394f032 1441#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
c6c4d7bb
BW		 1442static struct resource bfin_twi0_resource[] = {
1443 [0] = {
1444 .start = TWI0_REGBASE,
1445 .end = TWI0_REGBASE,
1446 .flags = IORESOURCE_MEM,
1447 },
1448 [1] = {
1449 .start = IRQ_TWI,
1450 .end = IRQ_TWI,
1451 .flags = IORESOURCE_IRQ,
1452 },
1453};
1454
1394f032
BW		 1455static struct platform_device i2c_bfin_twi_device = {
1456 .name = "i2c-bfin-twi",
1457 .id = 0,
c6c4d7bb
BW		 1458 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
1459 .resource = bfin_twi0_resource,
1394f032
BW		 1460};
1461#endif
1462
51ed9ad7 1463#if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
51ed9ad7
MH		 1464static const unsigned short adp5588_keymap[ADP5588_KEYMAPSIZE] = {
1465 [0] = KEY_GRAVE,
1466 [1] = KEY_1,
1467 [2] = KEY_2,
1468 [3] = KEY_3,
1469 [4] = KEY_4,
1470 [5] = KEY_5,
1471 [6] = KEY_6,
1472 [7] = KEY_7,
1473 [8] = KEY_8,
1474 [9] = KEY_9,
1475 [10] = KEY_0,
1476 [11] = KEY_MINUS,
1477 [12] = KEY_EQUAL,
1478 [13] = KEY_BACKSLASH,
1479 [15] = KEY_KP0,
1480 [16] = KEY_Q,
1481 [17] = KEY_W,
1482 [18] = KEY_E,
1483 [19] = KEY_R,
1484 [20] = KEY_T,
1485 [21] = KEY_Y,
1486 [22] = KEY_U,
1487 [23] = KEY_I,
1488 [24] = KEY_O,
1489 [25] = KEY_P,
1490 [26] = KEY_LEFTBRACE,
1491 [27] = KEY_RIGHTBRACE,
1492 [29] = KEY_KP1,
1493 [30] = KEY_KP2,
1494 [31] = KEY_KP3,
1495 [32] = KEY_A,
1496 [33] = KEY_S,
1497 [34] = KEY_D,
1498 [35] = KEY_F,
1499 [36] = KEY_G,
1500 [37] = KEY_H,
1501 [38] = KEY_J,
1502 [39] = KEY_K,
1503 [40] = KEY_L,
1504 [41] = KEY_SEMICOLON,
1505 [42] = KEY_APOSTROPHE,
1506 [43] = KEY_BACKSLASH,
1507 [45] = KEY_KP4,
1508 [46] = KEY_KP5,
1509 [47] = KEY_KP6,
1510 [48] = KEY_102ND,
1511 [49] = KEY_Z,
1512 [50] = KEY_X,
1513 [51] = KEY_C,
1514 [52] = KEY_V,
1515 [53] = KEY_B,
1516 [54] = KEY_N,
1517 [55] = KEY_M,
1518 [56] = KEY_COMMA,
1519 [57] = KEY_DOT,
1520 [58] = KEY_SLASH,
1521 [60] = KEY_KPDOT,
1522 [61] = KEY_KP7,
1523 [62] = KEY_KP8,
1524 [63] = KEY_KP9,
1525 [64] = KEY_SPACE,
1526 [65] = KEY_BACKSPACE,
1527 [66] = KEY_TAB,
1528 [67] = KEY_KPENTER,
1529 [68] = KEY_ENTER,
1530 [69] = KEY_ESC,
1531 [70] = KEY_DELETE,
1532 [74] = KEY_KPMINUS,
1533 [76] = KEY_UP,
1534 [77] = KEY_DOWN,
1535 [78] = KEY_RIGHT,
1536 [79] = KEY_LEFT,
1537};
1538
1539static struct adp5588_kpad_platform_data adp5588_kpad_data = {
1540 .rows = 8,
1541 .cols = 10,
1542 .keymap = adp5588_keymap,
1543 .keymapsize = ARRAY_SIZE(adp5588_keymap),
1544 .repeat = 0,
1545};
1546#endif
1547
3ea57218
MH		 1548#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
1549#include <linux/mfd/adp5520.h>
1550
1551 /*
1552 * ADP5520/5501 Backlight Data
1553 */
1554
1d23dc89
MH		 1555static struct adp5520_backlight_platform_data adp5520_backlight_data = {
1556 .fade_in = ADP5520_FADE_T_1200ms,
1557 .fade_out = ADP5520_FADE_T_1200ms,
1558 .fade_led_law = ADP5520_BL_LAW_LINEAR,
1559 .en_ambl_sens = 1,
1560 .abml_filt = ADP5520_BL_AMBL_FILT_640ms,
1561 .l1_daylight_max = ADP5520_BL_CUR_mA(15),
1562 .l1_daylight_dim = ADP5520_BL_CUR_mA(0),
1563 .l2_office_max = ADP5520_BL_CUR_mA(7),
1564 .l2_office_dim = ADP5520_BL_CUR_mA(0),
1565 .l3_dark_max = ADP5520_BL_CUR_mA(3),
1566 .l3_dark_dim = ADP5520_BL_CUR_mA(0),
1567 .l2_trip = ADP5520_L2_COMP_CURR_uA(700),
1568 .l2_hyst = ADP5520_L2_COMP_CURR_uA(50),
1569 .l3_trip = ADP5520_L3_COMP_CURR_uA(80),
1570 .l3_hyst = ADP5520_L3_COMP_CURR_uA(20),
3ea57218
MH		 1571};
1572
1573 /*
1574 * ADP5520/5501 LEDs Data
1575 */
1576
3ea57218
MH		 1577static struct led_info adp5520_leds[] = {
1578 {
1579 .name = "adp5520-led1",
1580 .default_trigger = "none",
1d23dc89 1581 .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
3ea57218
MH		 1582 },
1583#ifdef ADP5520_EN_ALL_LEDS
1584 {
1585 .name = "adp5520-led2",
1586 .default_trigger = "none",
1587 .flags = FLAG_ID_ADP5520_LED2_ADP5501_LED1,
1588 },
1589 {
1590 .name = "adp5520-led3",
1591 .default_trigger = "none",
1592 .flags = FLAG_ID_ADP5520_LED3_ADP5501_LED2,
1593 },
1594#endif
1595};
1596
1d23dc89 1597static struct adp5520_leds_platform_data adp5520_leds_data = {
3ea57218
MH		 1598 .num_leds = ARRAY_SIZE(adp5520_leds),
1599 .leds = adp5520_leds,
1d23dc89
MH		 1600 .fade_in = ADP5520_FADE_T_600ms,
1601 .fade_out = ADP5520_FADE_T_600ms,
1602 .led_on_time = ADP5520_LED_ONT_600ms,
3ea57218
MH		 1603};
1604
1605 /*
1606 * ADP5520 GPIO Data
1607 */
1608
1d23dc89 1609static struct adp5520_gpio_platform_data adp5520_gpio_data = {
3ea57218 1610 .gpio_start = 50,
1d23dc89
MH		 1611 .gpio_en_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
1612 .gpio_pullup_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
3ea57218
MH		 1613};
1614
1615 /*
1616 * ADP5520 Keypad Data
1617 */
1618
3ea57218 1619static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
1d23dc89
MH		 1620 [ADP5520_KEY(0, 0)] = KEY_GRAVE,
1621 [ADP5520_KEY(0, 1)] = KEY_1,
1622 [ADP5520_KEY(0, 2)] = KEY_2,
1623 [ADP5520_KEY(0, 3)] = KEY_3,
1624 [ADP5520_KEY(1, 0)] = KEY_4,
1625 [ADP5520_KEY(1, 1)] = KEY_5,
1626 [ADP5520_KEY(1, 2)] = KEY_6,
1627 [ADP5520_KEY(1, 3)] = KEY_7,
1628 [ADP5520_KEY(2, 0)] = KEY_8,
1629 [ADP5520_KEY(2, 1)] = KEY_9,
1630 [ADP5520_KEY(2, 2)] = KEY_0,
1631 [ADP5520_KEY(2, 3)] = KEY_MINUS,
1632 [ADP5520_KEY(3, 0)] = KEY_EQUAL,
1633 [ADP5520_KEY(3, 1)] = KEY_BACKSLASH,
1634 [ADP5520_KEY(3, 2)] = KEY_BACKSPACE,
1635 [ADP5520_KEY(3, 3)] = KEY_ENTER,
1636};
1637
1638static struct adp5520_keys_platform_data adp5520_keys_data = {
1639 .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
1640 .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
3ea57218
MH		 1641 .keymap = adp5520_keymap,
1642 .keymapsize = ARRAY_SIZE(adp5520_keymap),
1643 .repeat = 0,
1644};
1645
1646 /*
eef35c2d 1647 * ADP5520/5501 Multifunction Device Init Data
3ea57218
MH		 1648 */
1649
3ea57218 1650static struct adp5520_platform_data adp5520_pdev_data = {
1d23dc89
MH		 1651 .backlight = &adp5520_backlight_data,
1652 .leds = &adp5520_leds_data,
1653 .gpio = &adp5520_gpio_data,
1654 .keys = &adp5520_keys_data,
3ea57218
MH		 1655};
1656
1657#endif
1658
ba877d44 1659#if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
1d23dc89 1660static struct adp5588_gpio_platform_data adp5588_gpio_data = {
ba877d44
MH		 1661 .gpio_start = 50,
1662 .pullup_dis_mask = 0,
1663};
1664#endif
1665
78756c62
MH		 1666#if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
1667#include <linux/i2c/adp8870.h>
1668static struct led_info adp8870_leds[] = {
1669 {
1670 .name = "adp8870-led7",
1671 .default_trigger = "none",
1672 .flags = ADP8870_LED_D7 | ADP8870_LED_OFFT_600ms,
1673 },
1674};
1675
1676
1677static struct adp8870_backlight_platform_data adp8870_pdata = {
1678 .bl_led_assign = ADP8870_BL_D1 | ADP8870_BL_D2 | ADP8870_BL_D3 |
1679 ADP8870_BL_D4 | ADP8870_BL_D5 | ADP8870_BL_D6, /* 1 = Backlight 0 = Individual LED */
1680 .pwm_assign = 0, /* 1 = Enables PWM mode */
1681
1682 .bl_fade_in = ADP8870_FADE_T_1200ms, /* Backlight Fade-In Timer */
1683 .bl_fade_out = ADP8870_FADE_T_1200ms, /* Backlight Fade-Out Timer */
1684 .bl_fade_law = ADP8870_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
1685
1686 .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
1687 .abml_filt = ADP8870_BL_AMBL_FILT_320ms, /* Light sensor filter time */
1688
1689 .l1_daylight_max = ADP8870_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1690 .l1_daylight_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1691 .l2_bright_max = ADP8870_BL_CUR_mA(14), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1692 .l2_bright_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1693 .l3_office_max = ADP8870_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1694 .l3_office_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1695 .l4_indoor_max = ADP8870_BL_CUR_mA(3), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1696 .l4_indor_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1697 .l5_dark_max = ADP8870_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1698 .l5_dark_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1699
1700 .l2_trip = ADP8870_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
1701 .l2_hyst = ADP8870_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
1702 .l3_trip = ADP8870_L3_COMP_CURR_uA(389), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
1703 .l3_hyst = ADP8870_L3_COMP_CURR_uA(54), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
1704 .l4_trip = ADP8870_L4_COMP_CURR_uA(167), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
1705 .l4_hyst = ADP8870_L4_COMP_CURR_uA(16), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
1706 .l5_trip = ADP8870_L5_COMP_CURR_uA(43), /* use L5_COMP_CURR_uA(I) 0 <= I <= 138 uA */
1707 .l5_hyst = ADP8870_L5_COMP_CURR_uA(11), /* use L6_COMP_CURR_uA(I) 0 <= I <= 138 uA */
1708
1709 .leds = adp8870_leds,
1710 .num_leds = ARRAY_SIZE(adp8870_leds),
1711 .led_fade_law = ADP8870_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
1712 .led_fade_in = ADP8870_FADE_T_600ms,
1713 .led_fade_out = ADP8870_FADE_T_600ms,
1714 .led_on_time = ADP8870_LED_ONT_200ms,
1715};
1716#endif
1717
72fa2e92
MH		 1718#if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
1719#include <linux/i2c/adp8860.h>
1720static struct led_info adp8860_leds[] = {
1721 {
1722 .name = "adp8860-led7",
1723 .default_trigger = "none",
1724 .flags = ADP8860_LED_D7 | ADP8860_LED_OFFT_600ms,
1725 },
1726};
1727
1728static struct adp8860_backlight_platform_data adp8860_pdata = {
1729 .bl_led_assign = ADP8860_BL_D1 | ADP8860_BL_D2 | ADP8860_BL_D3 |
1730 ADP8860_BL_D4 | ADP8860_BL_D5 | ADP8860_BL_D6, /* 1 = Backlight 0 = Individual LED */
1731
1732 .bl_fade_in = ADP8860_FADE_T_1200ms, /* Backlight Fade-In Timer */
1733 .bl_fade_out = ADP8860_FADE_T_1200ms, /* Backlight Fade-Out Timer */
1734 .bl_fade_law = ADP8860_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
1735
1736 .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
1737 .abml_filt = ADP8860_BL_AMBL_FILT_320ms, /* Light sensor filter time */
1738
1739 .l1_daylight_max = ADP8860_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1740 .l1_daylight_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1741 .l2_office_max = ADP8860_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1742 .l2_office_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1743 .l3_dark_max = ADP8860_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1744 .l3_dark_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1745
1746 .l2_trip = ADP8860_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
1747 .l2_hyst = ADP8860_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
1748 .l3_trip = ADP8860_L3_COMP_CURR_uA(43), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
1749 .l3_hyst = ADP8860_L3_COMP_CURR_uA(11), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
1750
1751 .leds = adp8860_leds,
1752 .num_leds = ARRAY_SIZE(adp8860_leds),
1753 .led_fade_law = ADP8860_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
1754 .led_fade_in = ADP8860_FADE_T_600ms,
1755 .led_fade_out = ADP8860_FADE_T_600ms,
1756 .led_on_time = ADP8860_LED_ONT_200ms,
1757};
1758#endif
1759
f32792d0
SZ		 1760#if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
1761static struct regulator_consumer_supply ad5398_consumer = {
1762 .supply = "current",
1763};
1764
1765static struct regulator_init_data ad5398_regulator_data = {
1766 .constraints = {
1767 .name = "current range",
1768 .max_uA = 120000,
1769 .valid_ops_mask = REGULATOR_CHANGE_CURRENT | REGULATOR_CHANGE_STATUS,
1770 },
1771 .num_consumer_supplies = 1,
1772 .consumer_supplies = &ad5398_consumer,
1773};
1774
1775static struct ad5398_platform_data ad5398_i2c_platform_data = {
1776 .current_bits = 10,
1777 .current_offset = 4,
1778 .regulator_data = &ad5398_regulator_data,
1779};
1780
1781#if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
1782 defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
1783static struct platform_device ad5398_virt_consumer_device = {
1784 .name = "reg-virt-consumer",
1785 .id = 0,
1786 .dev = {
1787 .platform_data = "current", /* Passed to driver */
1788 },
1789};
1790#endif
1791#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
1792 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
1793static struct regulator_bulk_data ad5398_bulk_data = {
1794 .supply = "current",
1795};
1796
1797static struct regulator_userspace_consumer_data ad5398_userspace_comsumer_data = {
1798 .name = "ad5398",
1799 .num_supplies = 1,
1800 .supplies = &ad5398_bulk_data,
1801};
1802
1803static struct platform_device ad5398_userspace_consumer_device = {
1804 .name = "reg-userspace-consumer",
1805 .id = 0,
1806 .dev = {
1807 .platform_data = &ad5398_userspace_comsumer_data,
1808 },
1809};
1810#endif
1811#endif
1812
81d9c7f2 1813static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
5b7c5775 1814#if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
81d9c7f2 1815 {
427f277e 1816 I2C_BOARD_INFO("ad7142_captouch", 0x2C),
4c94c3e0 1817 .irq = IRQ_PG5,
5b7c5775 1818 .platform_data = (void *)&ad7142_i2c_platform_data,
81d9c7f2
BW		 1819 },
1820#endif
ad6720c0
BS		 1821
1822#if defined(CONFIG_AD7150) || defined(CONFIG_AD7150_MODULE)
1823 {
1824 I2C_BOARD_INFO("ad7150", 0x48),
1825 .irq = IRQ_PG5, /* fixme: use real interrupt number */
1826 },
1827#endif
1828
1829#if defined(CONFIG_AD7152) || defined(CONFIG_AD7152_MODULE)
1830 {
1831 I2C_BOARD_INFO("ad7152", 0x48),
1832 },
1833#endif
1834
1835#if defined(CONFIG_AD774X) || defined(CONFIG_AD774X_MODULE)
1836 {
1837 I2C_BOARD_INFO("ad774x", 0x48),
1838 },
1839#endif
1840
5f022594
SZ		 1841#if defined(CONFIG_AD7414) || defined(CONFIG_AD7414_MODULE)
1842 {
1843 I2C_BOARD_INFO("ad7414", 0x9),
1844 .irq = IRQ_PG5,
1845 /*
1846 * platform_data pointer is borrwoed by the driver to
1847 * store custimer defined IRQ ALART level mode.
1848 * only IRQF_TRIGGER_HIGH and IRQF_TRIGGER_LOW are valid.
1849 */
1850 .platform_data = (void *)IRQF_TRIGGER_LOW,
1851 },
1852#endif
1853
ef8873e0
SZ		 1854#if defined(CONFIG_AD7416) || defined(CONFIG_AD7416_MODULE)
1855 {
1856 I2C_BOARD_INFO("ad7417", 0xb),
1857 .irq = IRQ_PG5,
1858 /*
1859 * platform_data pointer is borrwoed by the driver to
1860 * store custimer defined IRQ ALART level mode.
1861 * only IRQF_TRIGGER_HIGH and IRQF_TRIGGER_LOW are valid.
1862 */
1863 .platform_data = (void *)IRQF_TRIGGER_LOW,
1864 },
1865#endif
1866
ebd58333 1867#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
81d9c7f2
BW		 1868 {
1869 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
81d9c7f2
BW		 1870 },
1871#endif
204844eb 1872#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
81d9c7f2
BW		 1873 {
1874 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
f5150155
MH		 1875 .irq = IRQ_PG6,
1876 },
1877#endif
1878#if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
1879 {
1880 I2C_BOARD_INFO("ad7879", 0x2F),
1881 .irq = IRQ_PG5,
1882 .platform_data = (void *)&bfin_ad7879_ts_info,
81d9c7f2
BW		 1883 },
1884#endif
51ed9ad7
MH		 1885#if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
1886 {
1887 I2C_BOARD_INFO("adp5588-keys", 0x34),
1888 .irq = IRQ_PG0,
1889 .platform_data = (void *)&adp5588_kpad_data,
1890 },
1891#endif
3ea57218
MH		 1892#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
1893 {
1894 I2C_BOARD_INFO("pmic-adp5520", 0x32),
4f84b6e0 1895 .irq = IRQ_PG0,
3ea57218
MH		 1896 .platform_data = (void *)&adp5520_pdev_data,
1897 },
1898#endif
ffc4d8bc
MH		 1899#if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
1900 {
1901 I2C_BOARD_INFO("adxl34x", 0x53),
1902 .irq = IRQ_PG3,
1903 .platform_data = (void *)&adxl34x_info,
1904 },
1905#endif
ba877d44
MH		 1906#if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
1907 {
1908 I2C_BOARD_INFO("adp5588-gpio", 0x34),
1909 .platform_data = (void *)&adp5588_gpio_data,
1910 },
1911#endif
50c4c086
MH		 1912#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
1913 {
1914 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
1915 },
1916#endif
ddcd7cb8
MH		 1917#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
1918 {
1919 I2C_BOARD_INFO("bf537-lq035-ad5280", 0x2C),
1920 },
1921#endif
78756c62
MH		 1922#if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
1923 {
1924 I2C_BOARD_INFO("adp8870", 0x2B),
1925 .platform_data = (void *)&adp8870_pdata,
1926 },
1927#endif
d53127ff
CC		 1928#if defined(CONFIG_SND_SOC_ADAU1371) || defined(CONFIG_SND_SOC_ADAU1371_MODULE)
1929 {
1930 I2C_BOARD_INFO("adau1371", 0x1A),
1931 },
1932#endif
04267638
CC		 1933#if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
1934 {
1935 I2C_BOARD_INFO("adau1761", 0x38),
1936 },
1937#endif
c48d7675
CC		 1938#if defined(CONFIG_SND_SOC_ADAU1361) || defined(CONFIG_SND_SOC_ADAU1361_MODULE)
1939 {
1940 I2C_BOARD_INFO("adau1361", 0x38),
1941 },
1942#endif
1f13f2fd
MH		 1943#if defined(CONFIG_AD525X_DPOT) || defined(CONFIG_AD525X_DPOT_MODULE)
1944 {
1945 I2C_BOARD_INFO("ad5258", 0x18),
1946 },
1947#endif
29bb3bc0
CC		 1948#if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
1949 {
1950 I2C_BOARD_INFO("ssm2602", 0x1b),
1951 },
1952#endif
f32792d0
SZ		 1953#if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
1954 {
1955 I2C_BOARD_INFO("ad5398", 0xC),
1956 .platform_data = (void *)&ad5398_i2c_platform_data,
1957 },
1958#endif
72fa2e92
MH		 1959#if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
1960 {
1961 I2C_BOARD_INFO("adp8860", 0x2A),
1962 .platform_data = (void *)&adp8860_pdata,
1963 },
1964#endif
81d9c7f2 1965};
81d9c7f2 1966
1394f032 1967#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
df5de261
SZ		 1968#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1969static struct resource bfin_sport0_uart_resources[] = {
1970 {
1971 .start = SPORT0_TCR1,
1972 .end = SPORT0_MRCS3+4,
1973 .flags = IORESOURCE_MEM,
1974 },
1975 {
1976 .start = IRQ_SPORT0_RX,
1977 .end = IRQ_SPORT0_RX+1,
1978 .flags = IORESOURCE_IRQ,
1979 },
1980 {
1981 .start = IRQ_SPORT0_ERROR,
1982 .end = IRQ_SPORT0_ERROR,
1983 .flags = IORESOURCE_IRQ,
1984 },
1985};
1986
1987unsigned short bfin_sport0_peripherals[] = {
1988 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
1989 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
1990};
1991
1394f032
BW		 1992static struct platform_device bfin_sport0_uart_device = {
1993 .name = "bfin-sport-uart",
1994 .id = 0,
df5de261
SZ		 1995 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
1996 .resource = bfin_sport0_uart_resources,
1997 .dev = {
1998 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
1999 },
2000};
2001#endif
2002#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
2003static struct resource bfin_sport1_uart_resources[] = {
2004 {
2005 .start = SPORT1_TCR1,
2006 .end = SPORT1_MRCS3+4,
2007 .flags = IORESOURCE_MEM,
2008 },
2009 {
2010 .start = IRQ_SPORT1_RX,
2011 .end = IRQ_SPORT1_RX+1,
2012 .flags = IORESOURCE_IRQ,
2013 },
2014 {
2015 .start = IRQ_SPORT1_ERROR,
2016 .end = IRQ_SPORT1_ERROR,
2017 .flags = IORESOURCE_IRQ,
2018 },
2019};
2020
2021unsigned short bfin_sport1_peripherals[] = {
2022 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
2023 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
1394f032
BW		 2024};
2025
2026static struct platform_device bfin_sport1_uart_device = {
2027 .name = "bfin-sport-uart",
2028 .id = 1,
df5de261
SZ		 2029 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
2030 .resource = bfin_sport1_uart_resources,
2031 .dev = {
2032 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
2033 },
1394f032
BW		 2034};
2035#endif
df5de261 2036#endif
1394f032 2037
c6c4d7bb 2038#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
2c8beb2c
MH		 2039#define CF_IDE_NAND_CARD_USE_HDD_INTERFACE
2040/* #define CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE */
c6c4d7bb 2041
2c8beb2c
MH		 2042#ifdef CF_IDE_NAND_CARD_USE_HDD_INTERFACE
2043#define PATA_INT IRQ_PF5
c6c4d7bb
BW		 2044static struct pata_platform_info bfin_pata_platform_data = {
2045 .ioport_shift = 1,
64e5c512 2046 .irq_flags = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
c6c4d7bb
BW		 2047};
2048
2049static struct resource bfin_pata_resources[] = {
2050 {
2051 .start = 0x20314020,
2052 .end = 0x2031403F,
2053 .flags = IORESOURCE_MEM,
2054 },
2055 {
2056 .start = 0x2031401C,
2057 .end = 0x2031401F,
2058 .flags = IORESOURCE_MEM,
2059 },
2060 {
2061 .start = PATA_INT,
2062 .end = PATA_INT,
2063 .flags = IORESOURCE_IRQ,
2064 },
2065};
2c8beb2c
MH		 2066#elif defined(CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE)
2067static struct pata_platform_info bfin_pata_platform_data = {
2068 .ioport_shift = 0,
2069};
648882d9
MH		 2070/* CompactFlash Storage Card Memory Mapped Adressing
2071 * /REG = A11 = 1
2072 */
2c8beb2c
MH		 2073static struct resource bfin_pata_resources[] = {
2074 {
648882d9
MH		 2075 .start = 0x20211800,
2076 .end = 0x20211807,
2c8beb2c
MH		 2077 .flags = IORESOURCE_MEM,
2078 },
2079 {
648882d9
MH		 2080 .start = 0x2021180E, /* Device Ctl */
2081 .end = 0x2021180E,
2c8beb2c
MH		 2082 .flags = IORESOURCE_MEM,
2083 },
2084};
2085#endif
c6c4d7bb
BW		 2086
2087static struct platform_device bfin_pata_device = {
2088 .name = "pata_platform",
2089 .id = -1,
2090 .num_resources = ARRAY_SIZE(bfin_pata_resources),
2091 .resource = bfin_pata_resources,
2092 .dev = {
2093 .platform_data = &bfin_pata_platform_data,
2094 }
2095};
2096#endif
2097
14b03204
MH		 2098static const unsigned int cclk_vlev_datasheet[] =
2099{
2100 VRPAIR(VLEV_085, 250000000),
2101 VRPAIR(VLEV_090, 376000000),
2102 VRPAIR(VLEV_095, 426000000),
2103 VRPAIR(VLEV_100, 426000000),
2104 VRPAIR(VLEV_105, 476000000),
2105 VRPAIR(VLEV_110, 476000000),
2106 VRPAIR(VLEV_115, 476000000),
2107 VRPAIR(VLEV_120, 500000000),
2108 VRPAIR(VLEV_125, 533000000),
2109 VRPAIR(VLEV_130, 600000000),
2110};
2111
2112static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
2113 .tuple_tab = cclk_vlev_datasheet,
2114 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
2115 .vr_settling_time = 25 /* us */,
2116};
2117
2118static struct platform_device bfin_dpmc = {
2119 .name = "bfin dpmc",
2120 .dev = {
2121 .platform_data = &bfin_dmpc_vreg_data,
2122 },
2123};
2124
336746ed
BS		 2125#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
2126static struct platform_device bfin_i2s = {
2127 .name = "bfin-i2s",
2128 .id = CONFIG_SND_BF5XX_SPORT_NUM,
2129 /* TODO: add platform data here */
2130};
2131#endif
2132
8312440e
BS		 2133#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
2134static struct platform_device bfin_tdm = {
2135 .name = "bfin-tdm",
336746ed
BS		 2136 .id = CONFIG_SND_BF5XX_SPORT_NUM,
2137 /* TODO: add platform data here */
2138};
2139#endif
2140
2141#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
2142static struct platform_device bfin_ac97 = {
2143 .name = "bfin-ac97",
2144 .id = CONFIG_SND_BF5XX_SPORT_NUM,
8312440e
BS		 2145 /* TODO: add platform data here */
2146};
2147#endif
2148
f8e6dbff
SZ		 2149#if defined(CONFIG_REGULATOR_ADP_SWITCH) || defined(CONFIG_REGULATOR_ADP_SWITCH_MODULE)
2150#define REGULATOR_ADP122 "adp122"
2151#define REGULATOR_ADP150 "adp150"
2152
2153static struct regulator_consumer_supply adp122_consumers = {
2154 .supply = REGULATOR_ADP122,
2155};
2156
2157static struct regulator_consumer_supply adp150_consumers = {
2158 .supply = REGULATOR_ADP150,
2159};
2160
2161static struct regulator_init_data adp_switch_regulator_data[] = {
2162 {
2163 .constraints = {
2164 .name = REGULATOR_ADP122,
2165 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
5f022594
SZ		 2166 .min_uA = 0,
2167 .max_uA = 300000,
f8e6dbff
SZ		 2168 },
2169 .num_consumer_supplies = 1, /* only 1 */
2170 .consumer_supplies = &adp122_consumers,
2171 .driver_data = (void *)GPIO_PF2, /* gpio port only */
2172 },
2173 {
2174 .constraints = {
2175 .name = REGULATOR_ADP150,
2176 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
5f022594
SZ		 2177 .min_uA = 0,
2178 .max_uA = 150000,
f8e6dbff
SZ		 2179 },
2180 .num_consumer_supplies = 1, /* only 1 */
2181 .consumer_supplies = &adp150_consumers,
2182 .driver_data = (void *)GPIO_PF3, /* gpio port only */
2183 },
2184};
2185
2186static struct adp_switch_platform_data adp_switch_pdata = {
2187 .regulator_num = ARRAY_SIZE(adp_switch_regulator_data),
2188 .regulator_data = adp_switch_regulator_data,
2189};
2190
2191static struct platform_device adp_switch_device = {
2192 .name = "adp_switch",
2193 .id = 0,
2194 .dev = {
2195 .platform_data = &adp_switch_pdata,
2196 },
2197};
2198
2199#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2200 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2201static struct regulator_bulk_data adp122_bulk_data = {
2202 .supply = REGULATOR_ADP122,
2203};
2204
2205static struct regulator_userspace_consumer_data adp122_userspace_comsumer_data = {
2206 .name = REGULATOR_ADP122,
2207 .num_supplies = 1,
2208 .supplies = &adp122_bulk_data,
2209};
2210
2211static struct platform_device adp122_userspace_consumer_device = {
2212 .name = "reg-userspace-consumer",
2213 .id = 0,
2214 .dev = {
2215 .platform_data = &adp122_userspace_comsumer_data,
2216 },
2217};
2218
2219static struct regulator_bulk_data adp150_bulk_data = {
2220 .supply = REGULATOR_ADP150,
2221};
2222
2223static struct regulator_userspace_consumer_data adp150_userspace_comsumer_data = {
2224 .name = REGULATOR_ADP150,
2225 .num_supplies = 1,
2226 .supplies = &adp150_bulk_data,
2227};
2228
2229static struct platform_device adp150_userspace_consumer_device = {
2230 .name = "reg-userspace-consumer",
2231 .id = 1,
2232 .dev = {
2233 .platform_data = &adp150_userspace_comsumer_data,
2234 },
2235};
2236#endif
2237#endif
2238
2239
1394f032 2240static struct platform_device *stamp_devices[] __initdata = {
14b03204
MH		 2241
2242 &bfin_dpmc,
2243
1394f032
BW		 2244#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
2245 &bfin_pcmcia_cf_device,
2246#endif
2247
2248#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
2249 &rtc_device,
2250#endif
2251
2252#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
2253 &sl811_hcd_device,
2254#endif
2255
2256#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
2257 &isp1362_hcd_device,
2258#endif
2259
3f375690
MH		 2260#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
2261 &bfin_isp1760_device,
2262#endif
2263
1394f032
BW		 2264#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
2265 &smc91x_device,
2266#endif
2267
f40d24d9
AL		 2268#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
2269 &dm9000_device,
2270#endif
2271
706a01b1
BS		 2272#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
2273 &bfin_can_device,
2274#endif
2275
1394f032 2276#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
65319628 2277 &bfin_mii_bus,
1394f032
BW		 2278 &bfin_mac_device,
2279#endif
2280
2281#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
2282 &net2272_bfin_device,
2283#endif
2284
2285#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
c6c4d7bb 2286 &bfin_spi0_device,
1394f032
BW		 2287#endif
2288
1e9aa955
CC		 2289#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
2290 &bfin_sport_spi0_device,
2291 &bfin_sport_spi1_device,
2292#endif
2293
1394f032
BW		 2294#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
2295 &bfin_fb_device,
2296#endif
2297
2043f3f7
MH		 2298#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
2299 &bfin_lq035q1_device,
2300#endif
2301
1394f032 2302#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
6bd1fbea
SZ		 2303#ifdef CONFIG_SERIAL_BFIN_UART0
2304 &bfin_uart0_device,
2305#endif
2306#ifdef CONFIG_SERIAL_BFIN_UART1
2307 &bfin_uart1_device,
2308#endif
1394f032
BW		 2309#endif
2310
5be36d22 2311#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb
GY		 2312#ifdef CONFIG_BFIN_SIR0
2313 &bfin_sir0_device,
2314#endif
2315#ifdef CONFIG_BFIN_SIR1
2316 &bfin_sir1_device,
2317#endif
5be36d22
GY		 2318#endif
2319
1394f032
BW		 2320#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
2321 &i2c_bfin_twi_device,
2322#endif
2323
2324#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
df5de261 2325#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1394f032 2326 &bfin_sport0_uart_device,
df5de261
SZ		 2327#endif
2328#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1394f032
BW		 2329 &bfin_sport1_uart_device,
2330#endif
df5de261 2331#endif
c6c4d7bb
BW		 2332
2333#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
2334 &bfin_pata_device,
2335#endif
2463ef22
MH		 2336
2337#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
2338 &bfin_device_gpiokeys,
2339#endif
cad2ab65 2340
fc68911e
MF		 2341#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
2342 &bfin_async_nand_device,
2343#endif
2344
793dc27b 2345#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
de8c43f2 2346 &stamp_flash_device,
793dc27b 2347#endif
8312440e 2348
336746ed
BS		 2349#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
2350 &bfin_i2s,
2351#endif
2352
8312440e
BS		 2353#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
2354 &bfin_tdm,
2355#endif
336746ed
BS		 2356
2357#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
2358 &bfin_ac97,
2359#endif
f32792d0
SZ		 2360#if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
2361#if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
2362 defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
2363 &ad5398_virt_consumer_device,
2364#endif
2365#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2366 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2367 &ad5398_userspace_consumer_device,
2368#endif
2369#endif
f8e6dbff
SZ		 2370
2371#if defined(CONFIG_REGULATOR_ADP_SWITCH) || defined(CONFIG_REGULATOR_ADP_SWITCH_MODULE)
2372 &adp_switch_device,
2373#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2374 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2375 &adp122_userspace_consumer_device,
2376 &adp150_userspace_consumer_device,
2377#endif
2378#endif
1394f032
BW		 2379};
2380
2381static int __init stamp_init(void)
2382{
b85d858b 2383 printk(KERN_INFO "%s(): registering device resources\n", __func__);
fc68911e 2384 bfin_plat_nand_init();
0531c467 2385 adf702x_mac_init();
1394f032 2386 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
df5de261
SZ		 2387 i2c_register_board_info(0, bfin_i2c_board_info,
2388 ARRAY_SIZE(bfin_i2c_board_info));
5bda2723 2389 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
c6c4d7bb 2390
1394f032
BW		 2391 return 0;
2392}
2393
2394arch_initcall(stamp_init);
c6c4d7bb 2395
c13ce9fd
SZ		 2396
2397static struct platform_device *stamp_early_devices[] __initdata = {
2398#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
2399#ifdef CONFIG_SERIAL_BFIN_UART0
2400 &bfin_uart0_device,
2401#endif
2402#ifdef CONFIG_SERIAL_BFIN_UART1
2403 &bfin_uart1_device,
2404#endif
2405#endif
2406
2407#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
2408#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
2409 &bfin_sport0_uart_device,
2410#endif
2411#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
2412 &bfin_sport1_uart_device,
2413#endif
2414#endif
2415};
2416
2417void __init native_machine_early_platform_add_devices(void)
2418{
2419 printk(KERN_INFO "register early platform devices\n");
2420 early_platform_add_devices(stamp_early_devices,
2421 ARRAY_SIZE(stamp_early_devices));
2422}
2423
c6c4d7bb
BW		 2424void native_machine_restart(char *cmd)
2425{
2426 /* workaround reboot hang when booting from SPI */
2427 if ((bfin_read_SYSCR() & 0x7) == 0x3)
b52dae31 2428 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
c6c4d7bb 2429}
137b1529
MF		 2430
2431/*
2432 * Currently the MAC address is saved in Flash by U-Boot
2433 */
2434#define FLASH_MAC 0x203f0000
9862cc52 2435void bfin_get_ether_addr(char *addr)
137b1529
MF		 2436{
2437 *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
2438 *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
2439}
9862cc52 2440EXPORT_SYMBOL(bfin_get_ether_addr);
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