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Blackfin: rename AD1836 to AD183X in board files
[net-next-2.6.git] / arch / blackfin / mach-bf537 / boards / stamp.c
CommitLineData
1394f032 1/*
96f1050d
RG		 2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
1394f032 5 *
96f1050d 6 * Licensed under the GPL-2 or later.
1394f032
BW		 7 */
8
9#include <linux/device.h>
fc68911e 10#include <linux/kernel.h>
1394f032 11#include <linux/platform_device.h>
6e364755 12#include <linux/io.h>
1394f032 13#include <linux/mtd/mtd.h>
fc68911e 14#include <linux/mtd/nand.h>
1394f032 15#include <linux/mtd/partitions.h>
fc68911e 16#include <linux/mtd/plat-ram.h>
de8c43f2 17#include <linux/mtd/physmap.h>
1394f032
BW		 18#include <linux/spi/spi.h>
19#include <linux/spi/flash.h>
20#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
f02bcec5 21#include <linux/usb/isp1362.h>
1394f032 22#endif
7a9cc489
SZ		 23#include <linux/i2c.h>
24#include <linux/i2c/adp5588.h>
0531c467 25#include <linux/etherdevice.h>
0a87e3e9 26#include <linux/ata_platform.h>
1394f032
BW		 27#include <linux/irq.h>
28#include <linux/interrupt.h>
27f5d75a 29#include <linux/usb/sl811.h>
f79ea4cb 30#include <linux/spi/mmc_spi.h>
78756c62
MH		 31#include <linux/leds.h>
32#include <linux/input.h>
c6c4d7bb 33#include <asm/dma.h>
1f83b8f1 34#include <asm/bfin5xx_spi.h>
c6c4d7bb 35#include <asm/reboot.h>
5d448dd5 36#include <asm/portmux.h>
14b03204 37#include <asm/dpmc.h>
f8e6dbff
SZ		 38#ifdef CONFIG_REGULATOR_ADP_SWITCH
39#include <linux/regulator/adp_switch.h>
40#endif
f32792d0
SZ		 41#ifdef CONFIG_REGULATOR_AD5398
42#include <linux/regulator/ad5398.h>
43#endif
44#include <linux/regulator/consumer.h>
45#include <linux/regulator/userspace-consumer.h>
1394f032
BW		 46
47/*
48 * Name the Board for the /proc/cpuinfo
49 */
fe85cad2 50const char bfin_board_name[] = "ADI BF537-STAMP";
1394f032
BW		 51
52/*
53 * Driver needs to know address, irq and flag pin.
54 */
55
1394f032 56#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
3f375690
MH		 57#include <linux/usb/isp1760.h>
58static struct resource bfin_isp1760_resources[] = {
1394f032 59 [0] = {
3f375690
MH		 60 .start = 0x203C0000,
61 .end = 0x203C0000 + 0x000fffff,
1394f032
BW		 62 .flags = IORESOURCE_MEM,
63 },
64 [1] = {
3f375690
MH		 65 .start = IRQ_PF7,
66 .end = IRQ_PF7,
6a6be3d1 67 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
1394f032
BW		 68 },
69};
70
3f375690
MH		 71static struct isp1760_platform_data isp1760_priv = {
72 .is_isp1761 = 0,
3f375690
MH		 73 .bus_width_16 = 1,
74 .port1_otg = 0,
75 .analog_oc = 0,
76 .dack_polarity_high = 0,
77 .dreq_polarity_high = 0,
1394f032
BW		 78};
79
3f375690 80static struct platform_device bfin_isp1760_device = {
c6feb768 81 .name = "isp1760",
3f375690
MH		 82 .id = 0,
83 .dev = {
84 .platform_data = &isp1760_priv,
85 },
86 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
87 .resource = bfin_isp1760_resources,
1394f032 88};
1394f032
BW		 89#endif
90
2463ef22 91#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
2463ef22
MH		 92#include <linux/gpio_keys.h>
93
94static struct gpio_keys_button bfin_gpio_keys_table[] = {
95 {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"},
96 {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"},
97 {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"},
98 {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"},
99};
100
101static struct gpio_keys_platform_data bfin_gpio_keys_data = {
102 .buttons = bfin_gpio_keys_table,
103 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
104};
105
106static struct platform_device bfin_device_gpiokeys = {
107 .name = "gpio-keys",
108 .dev = {
109 .platform_data = &bfin_gpio_keys_data,
110 },
111};
112#endif
113
1394f032
BW		 114#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
115static struct resource bfin_pcmcia_cf_resources[] = {
116 {
117 .start = 0x20310000, /* IO PORT */
118 .end = 0x20312000,
119 .flags = IORESOURCE_MEM,
1f83b8f1 120 }, {
d2d50aa9 121 .start = 0x20311000, /* Attribute Memory */
1394f032
BW		 122 .end = 0x20311FFF,
123 .flags = IORESOURCE_MEM,
1f83b8f1 124 }, {
1394f032
BW		 125 .start = IRQ_PF4,
126 .end = IRQ_PF4,
127 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
1f83b8f1 128 }, {
1394f032
BW		 129 .start = 6, /* Card Detect PF6 */
130 .end = 6,
131 .flags = IORESOURCE_IRQ,
132 },
133};
134
135static struct platform_device bfin_pcmcia_cf_device = {
136 .name = "bfin_cf_pcmcia",
137 .id = -1,
138 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
139 .resource = bfin_pcmcia_cf_resources,
140};
141#endif
142
143#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
144static struct platform_device rtc_device = {
145 .name = "rtc-bfin",
146 .id = -1,
147};
148#endif
149
150#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
61f09b5a
MH		 151#include <linux/smc91x.h>
152
153static struct smc91x_platdata smc91x_info = {
154 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
155 .leda = RPC_LED_100_10,
156 .ledb = RPC_LED_TX_RX,
157};
158
1394f032
BW		 159static struct resource smc91x_resources[] = {
160 {
161 .name = "smc91x-regs",
162 .start = 0x20300300,
163 .end = 0x20300300 + 16,
164 .flags = IORESOURCE_MEM,
1f83b8f1 165 }, {
1394f032
BW		 166
167 .start = IRQ_PF7,
168 .end = IRQ_PF7,
169 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
170 },
171};
172static struct platform_device smc91x_device = {
173 .name = "smc91x",
174 .id = 0,
175 .num_resources = ARRAY_SIZE(smc91x_resources),
176 .resource = smc91x_resources,
61f09b5a
MH		 177 .dev = {
178 .platform_data = &smc91x_info,
179 },
1394f032
BW		 180};
181#endif
182
f40d24d9
AL		 183#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
184static struct resource dm9000_resources[] = {
185 [0] = {
186 .start = 0x203FB800,
b3dec4a4 187 .end = 0x203FB800 + 1,
f40d24d9
AL		 188 .flags = IORESOURCE_MEM,
189 },
190 [1] = {
b3dec4a4
BS		 191 .start = 0x203FB804,
192 .end = 0x203FB804 + 1,
193 .flags = IORESOURCE_MEM,
194 },
195 [2] = {
f40d24d9
AL		 196 .start = IRQ_PF9,
197 .end = IRQ_PF9,
198 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
199 },
200};
201
202static struct platform_device dm9000_device = {
203 .name = "dm9000",
204 .id = -1,
205 .num_resources = ARRAY_SIZE(dm9000_resources),
206 .resource = dm9000_resources,
207};
208#endif
209
1394f032
BW		 210#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
211static struct resource sl811_hcd_resources[] = {
212 {
213 .start = 0x20340000,
214 .end = 0x20340000,
215 .flags = IORESOURCE_MEM,
1f83b8f1 216 }, {
1394f032
BW		 217 .start = 0x20340004,
218 .end = 0x20340004,
219 .flags = IORESOURCE_MEM,
1f83b8f1 220 }, {
01218654
MF		 221 .start = IRQ_PF4,
222 .end = IRQ_PF4,
1394f032
BW		 223 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
224 },
225};
226
227#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
228void sl811_port_power(struct device *dev, int is_on)
229{
c6c4d7bb 230 gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
acbcd263 231 gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
1394f032
BW		 232}
233#endif
234
235static struct sl811_platform_data sl811_priv = {
236 .potpg = 10,
237 .power = 250, /* == 500mA */
238#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
239 .port_power = &sl811_port_power,
240#endif
241};
242
243static struct platform_device sl811_hcd_device = {
244 .name = "sl811-hcd",
245 .id = 0,
246 .dev = {
247 .platform_data = &sl811_priv,
248 },
249 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
250 .resource = sl811_hcd_resources,
251};
252#endif
253
254#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
255static struct resource isp1362_hcd_resources[] = {
256 {
257 .start = 0x20360000,
258 .end = 0x20360000,
259 .flags = IORESOURCE_MEM,
1f83b8f1 260 }, {
1394f032
BW		 261 .start = 0x20360004,
262 .end = 0x20360004,
263 .flags = IORESOURCE_MEM,
1f83b8f1 264 }, {
21b03cfe
MF		 265 .start = IRQ_PF3,
266 .end = IRQ_PF3,
1394f032
BW		 267 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
268 },
269};
270
271static struct isp1362_platform_data isp1362_priv = {
272 .sel15Kres = 1,
273 .clknotstop = 0,
274 .oc_enable = 0,
275 .int_act_high = 0,
276 .int_edge_triggered = 0,
277 .remote_wakeup_connected = 0,
278 .no_power_switching = 1,
279 .power_switching_mode = 0,
280};
281
282static struct platform_device isp1362_hcd_device = {
283 .name = "isp1362-hcd",
284 .id = 0,
285 .dev = {
286 .platform_data = &isp1362_priv,
287 },
288 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
289 .resource = isp1362_hcd_resources,
290};
291#endif
292
706a01b1
BS		 293#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
294unsigned short bfin_can_peripherals[] = {
295 P_CAN0_RX, P_CAN0_TX, 0
296};
297
298static struct resource bfin_can_resources[] = {
299 {
300 .start = 0xFFC02A00,
301 .end = 0xFFC02FFF,
302 .flags = IORESOURCE_MEM,
303 },
304 {
305 .start = IRQ_CAN_RX,
306 .end = IRQ_CAN_RX,
307 .flags = IORESOURCE_IRQ,
308 },
309 {
310 .start = IRQ_CAN_TX,
311 .end = IRQ_CAN_TX,
312 .flags = IORESOURCE_IRQ,
313 },
314 {
315 .start = IRQ_CAN_ERROR,
316 .end = IRQ_CAN_ERROR,
317 .flags = IORESOURCE_IRQ,
318 },
319};
320
321static struct platform_device bfin_can_device = {
322 .name = "bfin_can",
323 .num_resources = ARRAY_SIZE(bfin_can_resources),
324 .resource = bfin_can_resources,
325 .dev = {
326 .platform_data = &bfin_can_peripherals, /* Passed to driver */
327 },
328};
329#endif
330
1394f032 331#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
65319628
GY		 332static struct platform_device bfin_mii_bus = {
333 .name = "bfin_mii_bus",
334};
335
1394f032
BW		 336static struct platform_device bfin_mac_device = {
337 .name = "bfin_mac",
65319628 338 .dev.platform_data = &bfin_mii_bus,
1394f032
BW		 339};
340#endif
341
342#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
343static struct resource net2272_bfin_resources[] = {
344 {
345 .start = 0x20300000,
346 .end = 0x20300000 + 0x100,
347 .flags = IORESOURCE_MEM,
1f83b8f1 348 }, {
1394f032
BW		 349 .start = IRQ_PF7,
350 .end = IRQ_PF7,
351 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
352 },
353};
354
355static struct platform_device net2272_bfin_device = {
356 .name = "net2272",
357 .id = -1,
358 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
359 .resource = net2272_bfin_resources,
360};
361#endif
362
fc68911e
MF		 363#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
364#ifdef CONFIG_MTD_PARTITIONS
365const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
366
367static struct mtd_partition bfin_plat_nand_partitions[] = {
368 {
aa582977 369 .name = "linux kernel(nand)",
fc68911e
MF		 370 .size = 0x400000,
371 .offset = 0,
372 }, {
aa582977 373 .name = "file system(nand)",
fc68911e
MF		 374 .size = MTDPART_SIZ_FULL,
375 .offset = MTDPART_OFS_APPEND,
376 },
377};
378#endif
379
380#define BFIN_NAND_PLAT_CLE 2
381#define BFIN_NAND_PLAT_ALE 1
382static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
383{
384 struct nand_chip *this = mtd->priv;
385
386 if (cmd == NAND_CMD_NONE)
387 return;
388
389 if (ctrl & NAND_CLE)
390 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE));
391 else
392 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE));
393}
394
395#define BFIN_NAND_PLAT_READY GPIO_PF3
396static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)
397{
398 return gpio_get_value(BFIN_NAND_PLAT_READY);
399}
400
401static struct platform_nand_data bfin_plat_nand_data = {
402 .chip = {
403 .chip_delay = 30,
404#ifdef CONFIG_MTD_PARTITIONS
405 .part_probe_types = part_probes,
406 .partitions = bfin_plat_nand_partitions,
407 .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),
408#endif
409 },
410 .ctrl = {
411 .cmd_ctrl = bfin_plat_nand_cmd_ctrl,
412 .dev_ready = bfin_plat_nand_dev_ready,
413 },
414};
415
416#define MAX(x, y) (x > y ? x : y)
417static struct resource bfin_plat_nand_resources = {
418 .start = 0x20212000,
419 .end = 0x20212000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),
420 .flags = IORESOURCE_IO,
421};
422
423static struct platform_device bfin_async_nand_device = {
424 .name = "gen_nand",
425 .id = -1,
426 .num_resources = 1,
427 .resource = &bfin_plat_nand_resources,
428 .dev = {
429 .platform_data = &bfin_plat_nand_data,
430 },
431};
432
433static void bfin_plat_nand_init(void)
434{
435 gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat");
436}
437#else
438static void bfin_plat_nand_init(void) {}
439#endif
440
793dc27b 441#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
de8c43f2
MF		 442static struct mtd_partition stamp_partitions[] = {
443 {
aa582977 444 .name = "bootloader(nor)",
edf05641 445 .size = 0x40000,
de8c43f2
MF		 446 .offset = 0,
447 }, {
aa582977 448 .name = "linux kernel(nor)",
6ecb5b6d 449 .size = 0x180000,
de8c43f2
MF		 450 .offset = MTDPART_OFS_APPEND,
451 }, {
aa582977 452 .name = "file system(nor)",
6ecb5b6d 453 .size = 0x400000 - 0x40000 - 0x180000 - 0x10000,
de8c43f2
MF		 454 .offset = MTDPART_OFS_APPEND,
455 }, {
aa582977 456 .name = "MAC Address(nor)",
de8c43f2
MF		 457 .size = MTDPART_SIZ_FULL,
458 .offset = 0x3F0000,
459 .mask_flags = MTD_WRITEABLE,
460 }
461};
462
463static struct physmap_flash_data stamp_flash_data = {
464 .width = 2,
465 .parts = stamp_partitions,
466 .nr_parts = ARRAY_SIZE(stamp_partitions),
38e7673f
BS		 467#ifdef CONFIG_ROMKERNEL
468 .probe_type = "map_rom",
469#endif
de8c43f2
MF		 470};
471
472static struct resource stamp_flash_resource = {
473 .start = 0x20000000,
474 .end = 0x203fffff,
475 .flags = IORESOURCE_MEM,
476};
477
478static struct platform_device stamp_flash_device = {
479 .name = "physmap-flash",
480 .id = 0,
481 .dev = {
482 .platform_data = &stamp_flash_data,
483 },
484 .num_resources = 1,
485 .resource = &stamp_flash_resource,
486};
793dc27b 487#endif
de8c43f2 488
1394f032
BW		 489#if defined(CONFIG_MTD_M25P80) \
490 || defined(CONFIG_MTD_M25P80_MODULE)
491static struct mtd_partition bfin_spi_flash_partitions[] = {
492 {
aa582977 493 .name = "bootloader(spi)",
edf05641 494 .size = 0x00040000,
1394f032
BW		 495 .offset = 0,
496 .mask_flags = MTD_CAP_ROM
1f83b8f1 497 }, {
aa582977 498 .name = "linux kernel(spi)",
6ecb5b6d 499 .size = 0x180000,
edf05641 500 .offset = MTDPART_OFS_APPEND,
1f83b8f1 501 }, {
aa582977 502 .name = "file system(spi)",
edf05641
MF		 503 .size = MTDPART_SIZ_FULL,
504 .offset = MTDPART_OFS_APPEND,
1394f032
BW		 505 }
506};
507
508static struct flash_platform_data bfin_spi_flash_data = {
509 .name = "m25p80",
510 .parts = bfin_spi_flash_partitions,
511 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
88a8078b 512 /* .type = "m25p64", */
1394f032
BW		 513};
514
515/* SPI flash chip (m25p64) */
516static struct bfin5xx_spi_chip spi_flash_chip_info = {
517 .enable_dma = 0, /* use dma transfer with this chip*/
518 .bits_per_word = 8,
519};
520#endif
521
a261eec0
MF		 522#if defined(CONFIG_BFIN_SPI_ADC) \
523 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
1394f032
BW		 524/* SPI ADC chip */
525static struct bfin5xx_spi_chip spi_adc_chip_info = {
526 .enable_dma = 1, /* use dma transfer with this chip*/
527 .bits_per_word = 16,
528};
529#endif
530
d40bd71f
BS		 531#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
532 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
1394f032
BW		 533static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
534 .enable_dma = 0,
535 .bits_per_word = 16,
536};
537#endif
538
3b82790c
BS		 539#if defined(CONFIG_SND_BF5XX_SOC_AD193X) \
540 || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
d4b834c1
BS		 541static struct bfin5xx_spi_chip ad1938_spi_chip_info = {
542 .enable_dma = 0,
543 .bits_per_word = 8,
d4b834c1
BS		 544};
545#endif
546
5b7c5775 547#if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
427f277e
BS		 548#include <linux/input/ad714x.h>
549static struct bfin5xx_spi_chip ad7147_spi_chip_info = {
550 .enable_dma = 0,
551 .bits_per_word = 16,
552};
553
5b7c5775 554static struct ad714x_slider_plat ad7147_spi_slider_plat[] = {
427f277e
BS		 555 {
556 .start_stage = 0,
557 .end_stage = 7,
558 .max_coord = 128,
559 },
560};
561
5b7c5775 562static struct ad714x_button_plat ad7147_spi_button_plat[] = {
427f277e
BS		 563 {
564 .keycode = BTN_FORWARD,
565 .l_mask = 0,
566 .h_mask = 0x600,
567 },
568 {
569 .keycode = BTN_LEFT,
570 .l_mask = 0,
571 .h_mask = 0x500,
572 },
573 {
574 .keycode = BTN_MIDDLE,
575 .l_mask = 0,
576 .h_mask = 0x800,
577 },
578 {
579 .keycode = BTN_RIGHT,
580 .l_mask = 0x100,
581 .h_mask = 0x400,
582 },
583 {
584 .keycode = BTN_BACK,
585 .l_mask = 0x200,
586 .h_mask = 0x400,
587 },
588};
5b7c5775 589static struct ad714x_platform_data ad7147_spi_platform_data = {
427f277e
BS		 590 .slider_num = 1,
591 .button_num = 5,
5b7c5775
MF		 592 .slider = ad7147_spi_slider_plat,
593 .button = ad7147_spi_button_plat,
427f277e
BS		 594 .stage_cfg_reg = {
595 {0xFBFF, 0x1FFF, 0, 0x2626, 1600, 1600, 1600, 1600},
596 {0xEFFF, 0x1FFF, 0, 0x2626, 1650, 1650, 1650, 1650},
597 {0xFFFF, 0x1FFE, 0, 0x2626, 1650, 1650, 1650, 1650},
598 {0xFFFF, 0x1FFB, 0, 0x2626, 1650, 1650, 1650, 1650},
599 {0xFFFF, 0x1FEF, 0, 0x2626, 1650, 1650, 1650, 1650},
600 {0xFFFF, 0x1FBF, 0, 0x2626, 1650, 1650, 1650, 1650},
601 {0xFFFF, 0x1EFF, 0, 0x2626, 1650, 1650, 1650, 1650},
602 {0xFFFF, 0x1BFF, 0, 0x2626, 1600, 1600, 1600, 1600},
603 {0xFF7B, 0x3FFF, 0x506, 0x2626, 1100, 1100, 1150, 1150},
604 {0xFDFE, 0x3FFF, 0x606, 0x2626, 1100, 1100, 1150, 1150},
605 {0xFEBA, 0x1FFF, 0x1400, 0x2626, 1200, 1200, 1300, 1300},
606 {0xFFEF, 0x1FFF, 0x0, 0x2626, 1100, 1100, 1150, 1150},
607 },
608 .sys_cfg_reg = {0x2B2, 0x0, 0x3233, 0x819, 0x832, 0xCFF, 0xCFF, 0x0},
609};
610#endif
611
5b7c5775 612#if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
427f277e 613#include <linux/input/ad714x.h>
5b7c5775 614static struct ad714x_button_plat ad7142_i2c_button_plat[] = {
427f277e
BS		 615 {
616 .keycode = BTN_1,
617 .l_mask = 0,
618 .h_mask = 0x1,
619 },
620 {
621 .keycode = BTN_2,
622 .l_mask = 0,
623 .h_mask = 0x2,
624 },
625 {
626 .keycode = BTN_3,
627 .l_mask = 0,
628 .h_mask = 0x4,
629 },
630 {
631 .keycode = BTN_4,
632 .l_mask = 0x0,
633 .h_mask = 0x8,
634 },
635};
5b7c5775 636static struct ad714x_platform_data ad7142_i2c_platform_data = {
427f277e 637 .button_num = 4,
5b7c5775 638 .button = ad7142_i2c_button_plat,
427f277e
BS		 639 .stage_cfg_reg = {
640 /* fixme: figure out right setting for all comoponent according
641 * to hardware feature of EVAL-AD7142EB board */
642 {0xE7FF, 0x3FFF, 0x0005, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
643 {0xFDBF, 0x3FFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
644 {0xFFFF, 0x2DFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
645 {0xFFFF, 0x37BF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
646 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
647 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
648 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
649 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
650 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
651 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
652 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
653 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
654 },
655 .sys_cfg_reg = {0x0B2, 0x0, 0x690, 0x664, 0x290F, 0xF, 0xF, 0x0},
656};
657#endif
658
f5f9531c
GY		 659#if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
660static struct bfin5xx_spi_chip ad2s90_spi_chip_info = {
661 .enable_dma = 0,
662 .bits_per_word = 16,
663};
664#endif
665
df6a949b
GY		 666#if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
667unsigned short ad2s120x_platform_data[] = {
668 /* used as SAMPLE and RDVEL */
669 GPIO_PF5, GPIO_PF6, 0
670};
671
672static struct bfin5xx_spi_chip ad2s120x_spi_chip_info = {
673 .enable_dma = 0,
674 .bits_per_word = 16,
675};
676#endif
677
f79ea4cb
YL		 678#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
679#define MMC_SPI_CARD_DETECT_INT IRQ_PF5
680
681static int bfin_mmc_spi_init(struct device *dev,
682 irqreturn_t (*detect_int)(int, void *), void *data)
683{
684 return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
685 IRQF_TRIGGER_FALLING, "mmc-spi-detect", data);
686}
687
688static void bfin_mmc_spi_exit(struct device *dev, void *data)
689{
690 free_irq(MMC_SPI_CARD_DETECT_INT, data);
691}
692
693static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
694 .init = bfin_mmc_spi_init,
695 .exit = bfin_mmc_spi_exit,
696 .detect_delay = 100, /* msecs */
697};
698
699static struct bfin5xx_spi_chip mmc_spi_chip_info = {
700 .enable_dma = 0,
701 .bits_per_word = 8,
e68d1ebc 702 .pio_interrupt = 0,
f79ea4cb
YL		 703};
704#endif
705
1394f032 706#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
46aa04f9 707#include <linux/spi/ad7877.h>
1394f032 708static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
1394f032
BW		 709 .enable_dma = 0,
710 .bits_per_word = 16,
711};
712
713static const struct ad7877_platform_data bfin_ad7877_ts_info = {
714 .model = 7877,
715 .vref_delay_usecs = 50, /* internal, no capacitor */
716 .x_plate_ohms = 419,
717 .y_plate_ohms = 486,
718 .pressure_max = 1000,
719 .pressure_min = 0,
720 .stopacq_polarity = 1,
721 .first_conversion_delay = 3,
722 .acquisition_time = 1,
723 .averaging = 1,
724 .pen_down_acc_interval = 1,
725};
726#endif
727
46aa04f9
MH		 728#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
729#include <linux/spi/ad7879.h>
46aa04f9
MH		 730static const struct ad7879_platform_data bfin_ad7879_ts_info = {
731 .model = 7879, /* Model = AD7879 */
732 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
733 .pressure_max = 10000,
734 .pressure_min = 0,
735 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
736 .acquisition_time = 1, /* 4us acquisition time per sample */
737 .median = 2, /* do 8 measurements */
738 .averaging = 1, /* take the average of 4 middle samples */
739 .pen_down_acc_interval = 255, /* 9.4 ms */
244d3423
MH		 740 .gpio_export = 1, /* Export GPIO to gpiolib */
741 .gpio_base = -1, /* Dynamic allocation */
46aa04f9
MH		 742};
743#endif
744
ffc4d8bc 745#if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
57af8edf 746#include <linux/input/adxl34x.h>
ffc4d8bc
MH		 747static const struct adxl34x_platform_data adxl34x_info = {
748 .x_axis_offset = 0,
749 .y_axis_offset = 0,
750 .z_axis_offset = 0,
751 .tap_threshold = 0x31,
752 .tap_duration = 0x10,
753 .tap_latency = 0x60,
754 .tap_window = 0xF0,
755 .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
756 .act_axis_control = 0xFF,
757 .activity_threshold = 5,
758 .inactivity_threshold = 3,
759 .inactivity_time = 4,
760 .free_fall_threshold = 0x7,
761 .free_fall_time = 0x20,
762 .data_rate = 0x8,
763 .data_range = ADXL_FULL_RES,
764
765 .ev_type = EV_ABS,
766 .ev_code_x = ABS_X, /* EV_REL */
767 .ev_code_y = ABS_Y, /* EV_REL */
768 .ev_code_z = ABS_Z, /* EV_REL */
769
57af8edf 770 .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
ffc4d8bc
MH		 771
772/* .ev_code_ff = KEY_F,*/ /* EV_KEY */
773/* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
774 .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
775 .fifo_mode = ADXL_FIFO_STREAM,
776};
777#endif
778
f5150155
MH		 779#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
780static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
781 .enable_dma = 0,
782 .bits_per_word = 16,
783};
784#endif
785
6e668936
MH		 786#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
787static struct bfin5xx_spi_chip spidev_chip_info = {
788 .enable_dma = 0,
789 .bits_per_word = 8,
790};
791#endif
792
2043f3f7
MH		 793#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
794static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
795 .enable_dma = 0,
796 .bits_per_word = 8,
797};
798#endif
799
85a192e9
MH		 800#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
801static struct bfin5xx_spi_chip enc28j60_spi_chip_info = {
802 .enable_dma = 1,
803 .bits_per_word = 8,
804 .cs_gpio = GPIO_PF10,
805};
806#endif
807
efaf7cd9
MH		 808#if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
809static struct bfin5xx_spi_chip adf7021_spi_chip_info = {
810 .bits_per_word = 16,
811 .cs_gpio = GPIO_PF10,
812};
813
814#include <linux/spi/adf702x.h>
815#define TXREG 0x0160A470
816static const u32 adf7021_regs[] = {
817 0x09608FA0,
818 0x00575011,
819 0x00A7F092,
820 0x2B141563,
821 0x81F29E94,
822 0x00003155,
823 0x050A4F66,
824 0x00000007,
825 0x00000008,
826 0x000231E9,
827 0x3296354A,
828 0x891A2B3B,
829 0x00000D9C,
830 0x0000000D,
831 0x0000000E,
832 0x0000000F,
833};
834
835static struct adf702x_platform_data adf7021_platform_data = {
836 .regs_base = (void *)SPORT1_TCR1,
837 .dma_ch_rx = CH_SPORT1_RX,
838 .dma_ch_tx = CH_SPORT1_TX,
839 .irq_sport_err = IRQ_SPORT1_ERROR,
840 .gpio_int_rfs = GPIO_PF8,
841 .pin_req = {P_SPORT1_DTPRI, P_SPORT1_RFS, P_SPORT1_DRPRI,
842 P_SPORT1_RSCLK, P_SPORT1_TSCLK, 0},
843 .adf702x_model = MODEL_ADF7021,
844 .adf702x_regs = adf7021_regs,
845 .tx_reg = TXREG,
846};
0531c467
MF		 847static inline void adf702x_mac_init(void)
848{
849 random_ether_addr(adf7021_platform_data.mac_addr);
850}
851#else
852static inline void adf702x_mac_init(void) {}
efaf7cd9
MH		 853#endif
854
fe5b25c0
MH		 855#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
856#include <linux/spi/ads7846.h>
857static struct bfin5xx_spi_chip ad7873_spi_chip_info = {
858 .bits_per_word = 8,
859};
860
861static int ads7873_get_pendown_state(void)
862{
863 return gpio_get_value(GPIO_PF6);
864}
865
866static struct ads7846_platform_data __initdata ad7873_pdata = {
867 .model = 7873, /* AD7873 */
868 .x_max = 0xfff,
869 .y_max = 0xfff,
870 .x_plate_ohms = 620,
871 .debounce_max = 1,
872 .debounce_rep = 0,
873 .debounce_tol = (~0),
874 .get_pendown_state = ads7873_get_pendown_state,
875};
876#endif
877
8e9d5c7d
MH		 878#if defined(CONFIG_MTD_DATAFLASH) \
879 || defined(CONFIG_MTD_DATAFLASH_MODULE)
ceac2651
MH		 880
881static struct mtd_partition bfin_spi_dataflash_partitions[] = {
882 {
883 .name = "bootloader(spi)",
884 .size = 0x00040000,
885 .offset = 0,
886 .mask_flags = MTD_CAP_ROM
887 }, {
888 .name = "linux kernel(spi)",
6ecb5b6d 889 .size = 0x180000,
ceac2651
MH		 890 .offset = MTDPART_OFS_APPEND,
891 }, {
892 .name = "file system(spi)",
893 .size = MTDPART_SIZ_FULL,
894 .offset = MTDPART_OFS_APPEND,
895 }
896};
897
898static struct flash_platform_data bfin_spi_dataflash_data = {
899 .name = "SPI Dataflash",
900 .parts = bfin_spi_dataflash_partitions,
901 .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),
902};
903
8e9d5c7d
MH		 904/* DataFlash chip */
905static struct bfin5xx_spi_chip data_flash_chip_info = {
906 .enable_dma = 0, /* use dma transfer with this chip*/
907 .bits_per_word = 8,
908};
909#endif
910
57af8edf
MH		 911#if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
912static struct bfin5xx_spi_chip spi_adxl34x_chip_info = {
913 .enable_dma = 0, /* use dma transfer with this chip*/
914 .bits_per_word = 8,
915};
916#endif
917
1394f032
BW		 918static struct spi_board_info bfin_spi_board_info[] __initdata = {
919#if defined(CONFIG_MTD_M25P80) \
920 || defined(CONFIG_MTD_M25P80_MODULE)
921 {
922 /* the modalias must be the same as spi device driver name */
923 .modalias = "m25p80", /* Name of spi_driver for this device */
924 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 925 .bus_num = 0, /* Framework bus number */
1394f032
BW		 926 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
927 .platform_data = &bfin_spi_flash_data,
928 .controller_data = &spi_flash_chip_info,
929 .mode = SPI_MODE_3,
930 },
931#endif
8e9d5c7d
MH		 932#if defined(CONFIG_MTD_DATAFLASH) \
933 || defined(CONFIG_MTD_DATAFLASH_MODULE)
934 { /* DataFlash chip */
935 .modalias = "mtd_dataflash",
ceac2651 936 .max_speed_hz = 33250000, /* max spi clock (SCK) speed in HZ */
8e9d5c7d
MH		 937 .bus_num = 0, /* Framework bus number */
938 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
ceac2651 939 .platform_data = &bfin_spi_dataflash_data,
8e9d5c7d
MH		 940 .controller_data = &data_flash_chip_info,
941 .mode = SPI_MODE_3,
942 },
943#endif
a261eec0
MF		 944#if defined(CONFIG_BFIN_SPI_ADC) \
945 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
1394f032
BW		 946 {
947 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
948 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 949 .bus_num = 0, /* Framework bus number */
1394f032
BW		 950 .chip_select = 1, /* Framework chip select. */
951 .platform_data = NULL, /* No spi_driver specific config */
952 .controller_data = &spi_adc_chip_info,
953 },
954#endif
955
d40bd71f
BS		 956#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
957 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
1394f032 958 {
d40bd71f 959 .modalias = "ad183x",
1394f032 960 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 961 .bus_num = 0,
8312440e 962 .chip_select = 4,/* CONFIG_SND_BLACKFIN_SPI_PFBIT */
d40bd71f 963 .platform_data = "ad1836", /* only includes chip name for the moment */
1394f032 964 .controller_data = &ad1836_spi_chip_info,
8312440e 965 .mode = SPI_MODE_3,
1394f032
BW		 966 },
967#endif
d4b834c1 968
3b82790c 969#if defined(CONFIG_SND_BF5XX_SOC_AD193X) || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
d4b834c1 970 {
3b82790c 971 .modalias = "ad193x",
d4b834c1
BS		 972 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
973 .bus_num = 0,
08a54bff 974 .chip_select = 5,
d4b834c1
BS		 975 .controller_data = &ad1938_spi_chip_info,
976 .mode = SPI_MODE_3,
977 },
978#endif
979
5b7c5775 980#if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
427f277e
BS		 981 {
982 .modalias = "ad714x_captouch",
983 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
984 .irq = IRQ_PF4,
985 .bus_num = 0,
986 .chip_select = 5,
987 .mode = SPI_MODE_3,
5b7c5775 988 .platform_data = &ad7147_spi_platform_data,
427f277e
BS		 989 .controller_data = &ad7147_spi_chip_info,
990 },
991#endif
992
f5f9531c
GY		 993#if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
994 {
995 .modalias = "ad2s90",
996 .bus_num = 0,
997 .chip_select = 3, /* change it for your board */
998 .platform_data = NULL,
999 .controller_data = &ad2s90_spi_chip_info,
1000 },
1001#endif
1002
df6a949b
GY		 1003#if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
1004 {
1005 .modalias = "ad2s120x",
1006 .bus_num = 0,
1007 .chip_select = 4, /* CS, change it for your board */
1008 .platform_data = ad2s120x_platform_data,
1009 .controller_data = &ad2s120x_spi_chip_info,
1010 },
1011#endif
1012
f79ea4cb
YL		 1013#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
1014 {
1015 .modalias = "mmc_spi",
1016 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
1017 .bus_num = 0,
1018 .chip_select = 4,
1019 .platform_data = &bfin_mmc_spi_pdata,
1020 .controller_data = &mmc_spi_chip_info,
1021 .mode = SPI_MODE_3,
1022 },
1023#endif
1394f032
BW		 1024#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
1025 {
1026 .modalias = "ad7877",
1027 .platform_data = &bfin_ad7877_ts_info,
1028 .irq = IRQ_PF6,
1029 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
c7d48966 1030 .bus_num = 0,
1394f032
BW		 1031 .chip_select = 1,
1032 .controller_data = &spi_ad7877_chip_info,
1033 },
1034#endif
f5150155 1035#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
46aa04f9
MH		 1036 {
1037 .modalias = "ad7879",
1038 .platform_data = &bfin_ad7879_ts_info,
1039 .irq = IRQ_PF7,
1040 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
1041 .bus_num = 0,
1042 .chip_select = 1,
1043 .controller_data = &spi_ad7879_chip_info,
1044 .mode = SPI_CPHA | SPI_CPOL,
1045 },
1046#endif
6e668936
MH		 1047#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
1048 {
1049 .modalias = "spidev",
1050 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
1051 .bus_num = 0,
1052 .chip_select = 1,
1053 .controller_data = &spidev_chip_info,
1054 },
1055#endif
2043f3f7
MH		 1056#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1057 {
1058 .modalias = "bfin-lq035q1-spi",
1059 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
1060 .bus_num = 0,
46aa04f9 1061 .chip_select = 2,
2043f3f7
MH		 1062 .controller_data = &lq035q1_spi_chip_info,
1063 .mode = SPI_CPHA | SPI_CPOL,
1064 },
1065#endif
85a192e9
MH		 1066#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
1067 {
1068 .modalias = "enc28j60",
1069 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
1070 .irq = IRQ_PF6,
1071 .bus_num = 0,
1072 .chip_select = 0, /* GPIO controlled SSEL */
1073 .controller_data = &enc28j60_spi_chip_info,
1074 .mode = SPI_MODE_0,
1075 },
1076#endif
57af8edf
MH		 1077#if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
1078 {
1079 .modalias = "adxl34x",
1080 .platform_data = &adxl34x_info,
1081 .irq = IRQ_PF6,
1082 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
1083 .bus_num = 0,
1084 .chip_select = 2,
1085 .controller_data = &spi_adxl34x_chip_info,
1086 .mode = SPI_MODE_3,
1087 },
1088#endif
efaf7cd9
MH		 1089#if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
1090 {
1091 .modalias = "adf702x",
1092 .max_speed_hz = 16000000, /* max spi clock (SCK) speed in HZ */
1093 .bus_num = 0,
1094 .chip_select = 0, /* GPIO controlled SSEL */
1095 .controller_data = &adf7021_spi_chip_info,
1096 .platform_data = &adf7021_platform_data,
1097 .mode = SPI_MODE_0,
1098 },
1099#endif
fe5b25c0
MH		 1100#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
1101 {
1102 .modalias = "ads7846",
1103 .max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */
1104 .bus_num = 0,
1105 .irq = IRQ_PF6,
1106 .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
1107 .controller_data = &ad7873_spi_chip_info,
1108 .platform_data = &ad7873_pdata,
1109 .mode = SPI_MODE_0,
1110 },
1111#endif
1394f032
BW		 1112};
1113
5bda2723 1114#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
1394f032 1115/* SPI controller data */
c6c4d7bb 1116static struct bfin5xx_spi_master bfin_spi0_info = {
1394f032
BW		 1117 .num_chipselect = 8,
1118 .enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5 1119 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1394f032
BW		 1120};
1121
c6c4d7bb
BW		 1122/* SPI (0) */
1123static struct resource bfin_spi0_resource[] = {
1124 [0] = {
1125 .start = SPI0_REGBASE,
1126 .end = SPI0_REGBASE + 0xFF,
1127 .flags = IORESOURCE_MEM,
1128 },
1129 [1] = {
1130 .start = CH_SPI,
1131 .end = CH_SPI,
e68d1ebc
YL		 1132 .flags = IORESOURCE_DMA,
1133 },
1134 [2] = {
1135 .start = IRQ_SPI,
1136 .end = IRQ_SPI,
c6c4d7bb
BW		 1137 .flags = IORESOURCE_IRQ,
1138 },
1139};
1140
1141static struct platform_device bfin_spi0_device = {
1142 .name = "bfin-spi",
1143 .id = 0, /* Bus number */
1144 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
1145 .resource = bfin_spi0_resource,
1394f032 1146 .dev = {
c6c4d7bb 1147 .platform_data = &bfin_spi0_info, /* Passed to driver */
1394f032
BW		 1148 },
1149};
1150#endif /* spi master and devices */
1151
1e9aa955
CC		 1152#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
1153
1154/* SPORT SPI controller data */
1155static struct bfin5xx_spi_master bfin_sport_spi0_info = {
1156 .num_chipselect = 1, /* master only supports one device */
1157 .enable_dma = 0, /* master don't support DMA */
1158 .pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,
1159 P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0},
1160};
1161
1162static struct resource bfin_sport_spi0_resource[] = {
1163 [0] = {
1164 .start = SPORT0_TCR1,
1165 .end = SPORT0_TCR1 + 0xFF,
1166 .flags = IORESOURCE_MEM,
1167 },
1168 [1] = {
1169 .start = IRQ_SPORT0_ERROR,
1170 .end = IRQ_SPORT0_ERROR,
1171 .flags = IORESOURCE_IRQ,
1172 },
1173};
1174
1175static struct platform_device bfin_sport_spi0_device = {
1176 .name = "bfin-sport-spi",
1177 .id = 1, /* Bus number */
1178 .num_resources = ARRAY_SIZE(bfin_sport_spi0_resource),
1179 .resource = bfin_sport_spi0_resource,
1180 .dev = {
1181 .platform_data = &bfin_sport_spi0_info, /* Passed to driver */
1182 },
1183};
1184
1185static struct bfin5xx_spi_master bfin_sport_spi1_info = {
1186 .num_chipselect = 1, /* master only supports one device */
1187 .enable_dma = 0, /* master don't support DMA */
1188 .pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI,
1189 P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0},
1190};
1191
1192static struct resource bfin_sport_spi1_resource[] = {
1193 [0] = {
1194 .start = SPORT1_TCR1,
1195 .end = SPORT1_TCR1 + 0xFF,
1196 .flags = IORESOURCE_MEM,
1197 },
1198 [1] = {
1199 .start = IRQ_SPORT1_ERROR,
1200 .end = IRQ_SPORT1_ERROR,
1201 .flags = IORESOURCE_IRQ,
1202 },
1203};
1204
1205static struct platform_device bfin_sport_spi1_device = {
1206 .name = "bfin-sport-spi",
1207 .id = 2, /* Bus number */
1208 .num_resources = ARRAY_SIZE(bfin_sport_spi1_resource),
1209 .resource = bfin_sport_spi1_resource,
1210 .dev = {
1211 .platform_data = &bfin_sport_spi1_info, /* Passed to driver */
1212 },
1213};
1214
1215#endif /* sport spi master and devices */
1216
1394f032
BW		 1217#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
1218static struct platform_device bfin_fb_device = {
c6c4d7bb
BW		 1219 .name = "bf537-lq035",
1220};
1221#endif
1222
2043f3f7
MH		 1223#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1224#include <asm/bfin-lq035q1.h>
1225
1226static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
d94a1aa4
MH		 1227 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
1228 .ppi_mode = USE_RGB565_16_BIT_PPI,
1229 .use_bl = 0, /* let something else control the LCD Blacklight */
1230 .gpio_bl = GPIO_PF7,
2043f3f7
MH		 1231};
1232
1233static struct resource bfin_lq035q1_resources[] = {
1234 {
1235 .start = IRQ_PPI_ERROR,
1236 .end = IRQ_PPI_ERROR,
1237 .flags = IORESOURCE_IRQ,
1238 },
1239};
1240
1241static struct platform_device bfin_lq035q1_device = {
1242 .name = "bfin-lq035q1",
1243 .id = -1,
d94a1aa4
MH		 1244 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
1245 .resource = bfin_lq035q1_resources,
2043f3f7
MH		 1246 .dev = {
1247 .platform_data = &bfin_lq035q1_data,
1248 },
1249};
1250#endif
1251
1394f032 1252#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
233b28a9 1253#ifdef CONFIG_SERIAL_BFIN_UART0
6bd1fbea 1254static struct resource bfin_uart0_resources[] = {
1394f032 1255 {
6bd1fbea
SZ		 1256 .start = UART0_THR,
1257 .end = UART0_GCTL+2,
1394f032 1258 .flags = IORESOURCE_MEM,
233b28a9 1259 },
6bd1fbea
SZ		 1260 {
1261 .start = IRQ_UART0_RX,
1262 .end = IRQ_UART0_RX+1,
1263 .flags = IORESOURCE_IRQ,
1264 },
1265 {
1266 .start = IRQ_UART0_ERROR,
1267 .end = IRQ_UART0_ERROR,
1268 .flags = IORESOURCE_IRQ,
1269 },
1270 {
1271 .start = CH_UART0_TX,
1272 .end = CH_UART0_TX,
1273 .flags = IORESOURCE_DMA,
1274 },
1275 {
1276 .start = CH_UART0_RX,
1277 .end = CH_UART0_RX,
1278 .flags = IORESOURCE_DMA,
1279 },
1280#ifdef CONFIG_BFIN_UART0_CTSRTS
1281 { /* CTS pin */
1282 .start = GPIO_PG7,
1283 .end = GPIO_PG7,
1284 .flags = IORESOURCE_IO,
1285 },
1286 { /* RTS pin */
1287 .start = GPIO_PG6,
1288 .end = GPIO_PG6,
1289 .flags = IORESOURCE_IO,
1290 },
1291#endif
1292};
1293
1294unsigned short bfin_uart0_peripherals[] = {
1295 P_UART0_TX, P_UART0_RX, 0
1296};
1297
1298static struct platform_device bfin_uart0_device = {
1299 .name = "bfin-uart",
1300 .id = 0,
1301 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
1302 .resource = bfin_uart0_resources,
1303 .dev = {
1304 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
1305 },
1306};
233b28a9
SZ		 1307#endif
1308#ifdef CONFIG_SERIAL_BFIN_UART1
6bd1fbea 1309static struct resource bfin_uart1_resources[] = {
233b28a9 1310 {
6bd1fbea
SZ		 1311 .start = UART1_THR,
1312 .end = UART1_GCTL+2,
1394f032
BW		 1313 .flags = IORESOURCE_MEM,
1314 },
6bd1fbea
SZ		 1315 {
1316 .start = IRQ_UART1_RX,
1317 .end = IRQ_UART1_RX+1,
1318 .flags = IORESOURCE_IRQ,
1319 },
1320 {
1321 .start = IRQ_UART1_ERROR,
1322 .end = IRQ_UART1_ERROR,
1323 .flags = IORESOURCE_IRQ,
1324 },
1325 {
1326 .start = CH_UART1_TX,
1327 .end = CH_UART1_TX,
1328 .flags = IORESOURCE_DMA,
1329 },
1330 {
1331 .start = CH_UART1_RX,
1332 .end = CH_UART1_RX,
1333 .flags = IORESOURCE_DMA,
1334 },
1335};
1336
1337unsigned short bfin_uart1_peripherals[] = {
1338 P_UART1_TX, P_UART1_RX, 0
1394f032
BW		 1339};
1340
6bd1fbea 1341static struct platform_device bfin_uart1_device = {
1394f032
BW		 1342 .name = "bfin-uart",
1343 .id = 1,
6bd1fbea
SZ		 1344 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
1345 .resource = bfin_uart1_resources,
1346 .dev = {
1347 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
1348 },
1394f032
BW		 1349};
1350#endif
6bd1fbea 1351#endif
1394f032 1352
5be36d22 1353#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
5be36d22 1354#ifdef CONFIG_BFIN_SIR0
42bd8bcb 1355static struct resource bfin_sir0_resources[] = {
5be36d22
GY		 1356 {
1357 .start = 0xFFC00400,
1358 .end = 0xFFC004FF,
1359 .flags = IORESOURCE_MEM,
1360 },
42bd8bcb
GY		 1361 {
1362 .start = IRQ_UART0_RX,
1363 .end = IRQ_UART0_RX+1,
1364 .flags = IORESOURCE_IRQ,
1365 },
1366 {
1367 .start = CH_UART0_RX,
1368 .end = CH_UART0_RX+1,
1369 .flags = IORESOURCE_DMA,
1370 },
1371};
1372
1373static struct platform_device bfin_sir0_device = {
1374 .name = "bfin_sir",
1375 .id = 0,
1376 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
1377 .resource = bfin_sir0_resources,
1378};
5be36d22
GY		 1379#endif
1380#ifdef CONFIG_BFIN_SIR1
42bd8bcb 1381static struct resource bfin_sir1_resources[] = {
5be36d22
GY		 1382 {
1383 .start = 0xFFC02000,
1384 .end = 0xFFC020FF,
1385 .flags = IORESOURCE_MEM,
1386 },
42bd8bcb
GY		 1387 {
1388 .start = IRQ_UART1_RX,
1389 .end = IRQ_UART1_RX+1,
1390 .flags = IORESOURCE_IRQ,
1391 },
1392 {
1393 .start = CH_UART1_RX,
1394 .end = CH_UART1_RX+1,
1395 .flags = IORESOURCE_DMA,
1396 },
5be36d22
GY		 1397};
1398
42bd8bcb 1399static struct platform_device bfin_sir1_device = {
5be36d22 1400 .name = "bfin_sir",
42bd8bcb
GY		 1401 .id = 1,
1402 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
1403 .resource = bfin_sir1_resources,
5be36d22
GY		 1404};
1405#endif
42bd8bcb 1406#endif
5be36d22 1407
1394f032 1408#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
c6c4d7bb
BW		 1409static struct resource bfin_twi0_resource[] = {
1410 [0] = {
1411 .start = TWI0_REGBASE,
1412 .end = TWI0_REGBASE,
1413 .flags = IORESOURCE_MEM,
1414 },
1415 [1] = {
1416 .start = IRQ_TWI,
1417 .end = IRQ_TWI,
1418 .flags = IORESOURCE_IRQ,
1419 },
1420};
1421
1394f032
BW		 1422static struct platform_device i2c_bfin_twi_device = {
1423 .name = "i2c-bfin-twi",
1424 .id = 0,
c6c4d7bb
BW		 1425 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
1426 .resource = bfin_twi0_resource,
1394f032
BW		 1427};
1428#endif
1429
51ed9ad7 1430#if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
51ed9ad7
MH		 1431static const unsigned short adp5588_keymap[ADP5588_KEYMAPSIZE] = {
1432 [0] = KEY_GRAVE,
1433 [1] = KEY_1,
1434 [2] = KEY_2,
1435 [3] = KEY_3,
1436 [4] = KEY_4,
1437 [5] = KEY_5,
1438 [6] = KEY_6,
1439 [7] = KEY_7,
1440 [8] = KEY_8,
1441 [9] = KEY_9,
1442 [10] = KEY_0,
1443 [11] = KEY_MINUS,
1444 [12] = KEY_EQUAL,
1445 [13] = KEY_BACKSLASH,
1446 [15] = KEY_KP0,
1447 [16] = KEY_Q,
1448 [17] = KEY_W,
1449 [18] = KEY_E,
1450 [19] = KEY_R,
1451 [20] = KEY_T,
1452 [21] = KEY_Y,
1453 [22] = KEY_U,
1454 [23] = KEY_I,
1455 [24] = KEY_O,
1456 [25] = KEY_P,
1457 [26] = KEY_LEFTBRACE,
1458 [27] = KEY_RIGHTBRACE,
1459 [29] = KEY_KP1,
1460 [30] = KEY_KP2,
1461 [31] = KEY_KP3,
1462 [32] = KEY_A,
1463 [33] = KEY_S,
1464 [34] = KEY_D,
1465 [35] = KEY_F,
1466 [36] = KEY_G,
1467 [37] = KEY_H,
1468 [38] = KEY_J,
1469 [39] = KEY_K,
1470 [40] = KEY_L,
1471 [41] = KEY_SEMICOLON,
1472 [42] = KEY_APOSTROPHE,
1473 [43] = KEY_BACKSLASH,
1474 [45] = KEY_KP4,
1475 [46] = KEY_KP5,
1476 [47] = KEY_KP6,
1477 [48] = KEY_102ND,
1478 [49] = KEY_Z,
1479 [50] = KEY_X,
1480 [51] = KEY_C,
1481 [52] = KEY_V,
1482 [53] = KEY_B,
1483 [54] = KEY_N,
1484 [55] = KEY_M,
1485 [56] = KEY_COMMA,
1486 [57] = KEY_DOT,
1487 [58] = KEY_SLASH,
1488 [60] = KEY_KPDOT,
1489 [61] = KEY_KP7,
1490 [62] = KEY_KP8,
1491 [63] = KEY_KP9,
1492 [64] = KEY_SPACE,
1493 [65] = KEY_BACKSPACE,
1494 [66] = KEY_TAB,
1495 [67] = KEY_KPENTER,
1496 [68] = KEY_ENTER,
1497 [69] = KEY_ESC,
1498 [70] = KEY_DELETE,
1499 [74] = KEY_KPMINUS,
1500 [76] = KEY_UP,
1501 [77] = KEY_DOWN,
1502 [78] = KEY_RIGHT,
1503 [79] = KEY_LEFT,
1504};
1505
1506static struct adp5588_kpad_platform_data adp5588_kpad_data = {
1507 .rows = 8,
1508 .cols = 10,
1509 .keymap = adp5588_keymap,
1510 .keymapsize = ARRAY_SIZE(adp5588_keymap),
1511 .repeat = 0,
1512};
1513#endif
1514
3ea57218
MH		 1515#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
1516#include <linux/mfd/adp5520.h>
1517
1518 /*
1519 * ADP5520/5501 Backlight Data
1520 */
1521
1d23dc89
MH		 1522static struct adp5520_backlight_platform_data adp5520_backlight_data = {
1523 .fade_in = ADP5520_FADE_T_1200ms,
1524 .fade_out = ADP5520_FADE_T_1200ms,
1525 .fade_led_law = ADP5520_BL_LAW_LINEAR,
1526 .en_ambl_sens = 1,
1527 .abml_filt = ADP5520_BL_AMBL_FILT_640ms,
1528 .l1_daylight_max = ADP5520_BL_CUR_mA(15),
1529 .l1_daylight_dim = ADP5520_BL_CUR_mA(0),
1530 .l2_office_max = ADP5520_BL_CUR_mA(7),
1531 .l2_office_dim = ADP5520_BL_CUR_mA(0),
1532 .l3_dark_max = ADP5520_BL_CUR_mA(3),
1533 .l3_dark_dim = ADP5520_BL_CUR_mA(0),
1534 .l2_trip = ADP5520_L2_COMP_CURR_uA(700),
1535 .l2_hyst = ADP5520_L2_COMP_CURR_uA(50),
1536 .l3_trip = ADP5520_L3_COMP_CURR_uA(80),
1537 .l3_hyst = ADP5520_L3_COMP_CURR_uA(20),
3ea57218
MH		 1538};
1539
1540 /*
1541 * ADP5520/5501 LEDs Data
1542 */
1543
3ea57218
MH		 1544static struct led_info adp5520_leds[] = {
1545 {
1546 .name = "adp5520-led1",
1547 .default_trigger = "none",
1d23dc89 1548 .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
3ea57218
MH		 1549 },
1550#ifdef ADP5520_EN_ALL_LEDS
1551 {
1552 .name = "adp5520-led2",
1553 .default_trigger = "none",
1554 .flags = FLAG_ID_ADP5520_LED2_ADP5501_LED1,
1555 },
1556 {
1557 .name = "adp5520-led3",
1558 .default_trigger = "none",
1559 .flags = FLAG_ID_ADP5520_LED3_ADP5501_LED2,
1560 },
1561#endif
1562};
1563
1d23dc89 1564static struct adp5520_leds_platform_data adp5520_leds_data = {
3ea57218
MH		 1565 .num_leds = ARRAY_SIZE(adp5520_leds),
1566 .leds = adp5520_leds,
1d23dc89
MH		 1567 .fade_in = ADP5520_FADE_T_600ms,
1568 .fade_out = ADP5520_FADE_T_600ms,
1569 .led_on_time = ADP5520_LED_ONT_600ms,
3ea57218
MH		 1570};
1571
1572 /*
1573 * ADP5520 GPIO Data
1574 */
1575
1d23dc89 1576static struct adp5520_gpio_platform_data adp5520_gpio_data = {
3ea57218 1577 .gpio_start = 50,
1d23dc89
MH		 1578 .gpio_en_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
1579 .gpio_pullup_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
3ea57218
MH		 1580};
1581
1582 /*
1583 * ADP5520 Keypad Data
1584 */
1585
3ea57218 1586static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
1d23dc89
MH		 1587 [ADP5520_KEY(0, 0)] = KEY_GRAVE,
1588 [ADP5520_KEY(0, 1)] = KEY_1,
1589 [ADP5520_KEY(0, 2)] = KEY_2,
1590 [ADP5520_KEY(0, 3)] = KEY_3,
1591 [ADP5520_KEY(1, 0)] = KEY_4,
1592 [ADP5520_KEY(1, 1)] = KEY_5,
1593 [ADP5520_KEY(1, 2)] = KEY_6,
1594 [ADP5520_KEY(1, 3)] = KEY_7,
1595 [ADP5520_KEY(2, 0)] = KEY_8,
1596 [ADP5520_KEY(2, 1)] = KEY_9,
1597 [ADP5520_KEY(2, 2)] = KEY_0,
1598 [ADP5520_KEY(2, 3)] = KEY_MINUS,
1599 [ADP5520_KEY(3, 0)] = KEY_EQUAL,
1600 [ADP5520_KEY(3, 1)] = KEY_BACKSLASH,
1601 [ADP5520_KEY(3, 2)] = KEY_BACKSPACE,
1602 [ADP5520_KEY(3, 3)] = KEY_ENTER,
1603};
1604
1605static struct adp5520_keys_platform_data adp5520_keys_data = {
1606 .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
1607 .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
3ea57218
MH		 1608 .keymap = adp5520_keymap,
1609 .keymapsize = ARRAY_SIZE(adp5520_keymap),
1610 .repeat = 0,
1611};
1612
1613 /*
1614 * ADP5520/5501 Multifuction Device Init Data
1615 */
1616
3ea57218 1617static struct adp5520_platform_data adp5520_pdev_data = {
1d23dc89
MH		 1618 .backlight = &adp5520_backlight_data,
1619 .leds = &adp5520_leds_data,
1620 .gpio = &adp5520_gpio_data,
1621 .keys = &adp5520_keys_data,
3ea57218
MH		 1622};
1623
1624#endif
1625
ba877d44 1626#if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
1d23dc89 1627static struct adp5588_gpio_platform_data adp5588_gpio_data = {
ba877d44
MH		 1628 .gpio_start = 50,
1629 .pullup_dis_mask = 0,
1630};
1631#endif
1632
78756c62
MH		 1633#if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
1634#include <linux/i2c/adp8870.h>
1635static struct led_info adp8870_leds[] = {
1636 {
1637 .name = "adp8870-led7",
1638 .default_trigger = "none",
1639 .flags = ADP8870_LED_D7 | ADP8870_LED_OFFT_600ms,
1640 },
1641};
1642
1643
1644static struct adp8870_backlight_platform_data adp8870_pdata = {
1645 .bl_led_assign = ADP8870_BL_D1 | ADP8870_BL_D2 | ADP8870_BL_D3 |
1646 ADP8870_BL_D4 | ADP8870_BL_D5 | ADP8870_BL_D6, /* 1 = Backlight 0 = Individual LED */
1647 .pwm_assign = 0, /* 1 = Enables PWM mode */
1648
1649 .bl_fade_in = ADP8870_FADE_T_1200ms, /* Backlight Fade-In Timer */
1650 .bl_fade_out = ADP8870_FADE_T_1200ms, /* Backlight Fade-Out Timer */
1651 .bl_fade_law = ADP8870_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
1652
1653 .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
1654 .abml_filt = ADP8870_BL_AMBL_FILT_320ms, /* Light sensor filter time */
1655
1656 .l1_daylight_max = ADP8870_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1657 .l1_daylight_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1658 .l2_bright_max = ADP8870_BL_CUR_mA(14), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1659 .l2_bright_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1660 .l3_office_max = ADP8870_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1661 .l3_office_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1662 .l4_indoor_max = ADP8870_BL_CUR_mA(3), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1663 .l4_indor_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1664 .l5_dark_max = ADP8870_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1665 .l5_dark_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1666
1667 .l2_trip = ADP8870_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
1668 .l2_hyst = ADP8870_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
1669 .l3_trip = ADP8870_L3_COMP_CURR_uA(389), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
1670 .l3_hyst = ADP8870_L3_COMP_CURR_uA(54), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
1671 .l4_trip = ADP8870_L4_COMP_CURR_uA(167), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
1672 .l4_hyst = ADP8870_L4_COMP_CURR_uA(16), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
1673 .l5_trip = ADP8870_L5_COMP_CURR_uA(43), /* use L5_COMP_CURR_uA(I) 0 <= I <= 138 uA */
1674 .l5_hyst = ADP8870_L5_COMP_CURR_uA(11), /* use L6_COMP_CURR_uA(I) 0 <= I <= 138 uA */
1675
1676 .leds = adp8870_leds,
1677 .num_leds = ARRAY_SIZE(adp8870_leds),
1678 .led_fade_law = ADP8870_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
1679 .led_fade_in = ADP8870_FADE_T_600ms,
1680 .led_fade_out = ADP8870_FADE_T_600ms,
1681 .led_on_time = ADP8870_LED_ONT_200ms,
1682};
1683#endif
1684
f32792d0
SZ		 1685#if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
1686static struct regulator_consumer_supply ad5398_consumer = {
1687 .supply = "current",
1688};
1689
1690static struct regulator_init_data ad5398_regulator_data = {
1691 .constraints = {
1692 .name = "current range",
1693 .max_uA = 120000,
1694 .valid_ops_mask = REGULATOR_CHANGE_CURRENT | REGULATOR_CHANGE_STATUS,
1695 },
1696 .num_consumer_supplies = 1,
1697 .consumer_supplies = &ad5398_consumer,
1698};
1699
1700static struct ad5398_platform_data ad5398_i2c_platform_data = {
1701 .current_bits = 10,
1702 .current_offset = 4,
1703 .regulator_data = &ad5398_regulator_data,
1704};
1705
1706#if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
1707 defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
1708static struct platform_device ad5398_virt_consumer_device = {
1709 .name = "reg-virt-consumer",
1710 .id = 0,
1711 .dev = {
1712 .platform_data = "current", /* Passed to driver */
1713 },
1714};
1715#endif
1716#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
1717 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
1718static struct regulator_bulk_data ad5398_bulk_data = {
1719 .supply = "current",
1720};
1721
1722static struct regulator_userspace_consumer_data ad5398_userspace_comsumer_data = {
1723 .name = "ad5398",
1724 .num_supplies = 1,
1725 .supplies = &ad5398_bulk_data,
1726};
1727
1728static struct platform_device ad5398_userspace_consumer_device = {
1729 .name = "reg-userspace-consumer",
1730 .id = 0,
1731 .dev = {
1732 .platform_data = &ad5398_userspace_comsumer_data,
1733 },
1734};
1735#endif
1736#endif
1737
81d9c7f2 1738static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
5b7c5775 1739#if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
81d9c7f2 1740 {
427f277e 1741 I2C_BOARD_INFO("ad7142_captouch", 0x2C),
4c94c3e0 1742 .irq = IRQ_PG5,
5b7c5775 1743 .platform_data = (void *)&ad7142_i2c_platform_data,
81d9c7f2
BW		 1744 },
1745#endif
ad6720c0
BS		 1746
1747#if defined(CONFIG_AD7150) || defined(CONFIG_AD7150_MODULE)
1748 {
1749 I2C_BOARD_INFO("ad7150", 0x48),
1750 .irq = IRQ_PG5, /* fixme: use real interrupt number */
1751 },
1752#endif
1753
1754#if defined(CONFIG_AD7152) || defined(CONFIG_AD7152_MODULE)
1755 {
1756 I2C_BOARD_INFO("ad7152", 0x48),
1757 },
1758#endif
1759
1760#if defined(CONFIG_AD774X) || defined(CONFIG_AD774X_MODULE)
1761 {
1762 I2C_BOARD_INFO("ad774x", 0x48),
1763 },
1764#endif
1765
ebd58333 1766#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
81d9c7f2
BW		 1767 {
1768 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
81d9c7f2
BW		 1769 },
1770#endif
204844eb 1771#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
81d9c7f2
BW		 1772 {
1773 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
f5150155
MH		 1774 .irq = IRQ_PG6,
1775 },
1776#endif
1777#if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
1778 {
1779 I2C_BOARD_INFO("ad7879", 0x2F),
1780 .irq = IRQ_PG5,
1781 .platform_data = (void *)&bfin_ad7879_ts_info,
81d9c7f2
BW		 1782 },
1783#endif
51ed9ad7
MH		 1784#if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
1785 {
1786 I2C_BOARD_INFO("adp5588-keys", 0x34),
1787 .irq = IRQ_PG0,
1788 .platform_data = (void *)&adp5588_kpad_data,
1789 },
1790#endif
3ea57218
MH		 1791#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
1792 {
1793 I2C_BOARD_INFO("pmic-adp5520", 0x32),
4f84b6e0 1794 .irq = IRQ_PG0,
3ea57218
MH		 1795 .platform_data = (void *)&adp5520_pdev_data,
1796 },
1797#endif
ffc4d8bc
MH		 1798#if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
1799 {
1800 I2C_BOARD_INFO("adxl34x", 0x53),
1801 .irq = IRQ_PG3,
1802 .platform_data = (void *)&adxl34x_info,
1803 },
1804#endif
ba877d44
MH		 1805#if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
1806 {
1807 I2C_BOARD_INFO("adp5588-gpio", 0x34),
1808 .platform_data = (void *)&adp5588_gpio_data,
1809 },
1810#endif
50c4c086
MH		 1811#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
1812 {
1813 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
1814 },
1815#endif
ddcd7cb8
MH		 1816#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
1817 {
1818 I2C_BOARD_INFO("bf537-lq035-ad5280", 0x2C),
1819 },
1820#endif
78756c62
MH		 1821#if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
1822 {
1823 I2C_BOARD_INFO("adp8870", 0x2B),
1824 .platform_data = (void *)&adp8870_pdata,
1825 },
1826#endif
d53127ff
CC		 1827#if defined(CONFIG_SND_SOC_ADAU1371) || defined(CONFIG_SND_SOC_ADAU1371_MODULE)
1828 {
1829 I2C_BOARD_INFO("adau1371", 0x1A),
1830 },
1831#endif
04267638
CC		 1832#if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
1833 {
1834 I2C_BOARD_INFO("adau1761", 0x38),
1835 },
1836#endif
c48d7675
CC		 1837#if defined(CONFIG_SND_SOC_ADAU1361) || defined(CONFIG_SND_SOC_ADAU1361_MODULE)
1838 {
1839 I2C_BOARD_INFO("adau1361", 0x38),
1840 },
1841#endif
1f13f2fd
MH		 1842#if defined(CONFIG_AD525X_DPOT) || defined(CONFIG_AD525X_DPOT_MODULE)
1843 {
1844 I2C_BOARD_INFO("ad5258", 0x18),
1845 },
1846#endif
29bb3bc0
CC		 1847#if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
1848 {
1849 I2C_BOARD_INFO("ssm2602", 0x1b),
1850 },
1851#endif
f32792d0
SZ		 1852#if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
1853 {
1854 I2C_BOARD_INFO("ad5398", 0xC),
1855 .platform_data = (void *)&ad5398_i2c_platform_data,
1856 },
1857#endif
81d9c7f2 1858};
81d9c7f2 1859
1394f032 1860#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
df5de261
SZ		 1861#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1862static struct resource bfin_sport0_uart_resources[] = {
1863 {
1864 .start = SPORT0_TCR1,
1865 .end = SPORT0_MRCS3+4,
1866 .flags = IORESOURCE_MEM,
1867 },
1868 {
1869 .start = IRQ_SPORT0_RX,
1870 .end = IRQ_SPORT0_RX+1,
1871 .flags = IORESOURCE_IRQ,
1872 },
1873 {
1874 .start = IRQ_SPORT0_ERROR,
1875 .end = IRQ_SPORT0_ERROR,
1876 .flags = IORESOURCE_IRQ,
1877 },
1878};
1879
1880unsigned short bfin_sport0_peripherals[] = {
1881 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
1882 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
1883};
1884
1394f032
BW		 1885static struct platform_device bfin_sport0_uart_device = {
1886 .name = "bfin-sport-uart",
1887 .id = 0,
df5de261
SZ		 1888 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
1889 .resource = bfin_sport0_uart_resources,
1890 .dev = {
1891 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
1892 },
1893};
1894#endif
1895#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1896static struct resource bfin_sport1_uart_resources[] = {
1897 {
1898 .start = SPORT1_TCR1,
1899 .end = SPORT1_MRCS3+4,
1900 .flags = IORESOURCE_MEM,
1901 },
1902 {
1903 .start = IRQ_SPORT1_RX,
1904 .end = IRQ_SPORT1_RX+1,
1905 .flags = IORESOURCE_IRQ,
1906 },
1907 {
1908 .start = IRQ_SPORT1_ERROR,
1909 .end = IRQ_SPORT1_ERROR,
1910 .flags = IORESOURCE_IRQ,
1911 },
1912};
1913
1914unsigned short bfin_sport1_peripherals[] = {
1915 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
1916 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
1394f032
BW		 1917};
1918
1919static struct platform_device bfin_sport1_uart_device = {
1920 .name = "bfin-sport-uart",
1921 .id = 1,
df5de261
SZ		 1922 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
1923 .resource = bfin_sport1_uart_resources,
1924 .dev = {
1925 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
1926 },
1394f032
BW		 1927};
1928#endif
df5de261 1929#endif
1394f032 1930
c6c4d7bb 1931#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
2c8beb2c
MH		 1932#define CF_IDE_NAND_CARD_USE_HDD_INTERFACE
1933/* #define CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE */
c6c4d7bb 1934
2c8beb2c
MH		 1935#ifdef CF_IDE_NAND_CARD_USE_HDD_INTERFACE
1936#define PATA_INT IRQ_PF5
c6c4d7bb
BW		 1937static struct pata_platform_info bfin_pata_platform_data = {
1938 .ioport_shift = 1,
64e5c512 1939 .irq_flags = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
c6c4d7bb
BW		 1940};
1941
1942static struct resource bfin_pata_resources[] = {
1943 {
1944 .start = 0x20314020,
1945 .end = 0x2031403F,
1946 .flags = IORESOURCE_MEM,
1947 },
1948 {
1949 .start = 0x2031401C,
1950 .end = 0x2031401F,
1951 .flags = IORESOURCE_MEM,
1952 },
1953 {
1954 .start = PATA_INT,
1955 .end = PATA_INT,
1956 .flags = IORESOURCE_IRQ,
1957 },
1958};
2c8beb2c
MH		 1959#elif defined(CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE)
1960static struct pata_platform_info bfin_pata_platform_data = {
1961 .ioport_shift = 0,
1962};
648882d9
MH		 1963/* CompactFlash Storage Card Memory Mapped Adressing
1964 * /REG = A11 = 1
1965 */
2c8beb2c
MH		 1966static struct resource bfin_pata_resources[] = {
1967 {
648882d9
MH		 1968 .start = 0x20211800,
1969 .end = 0x20211807,
2c8beb2c
MH		 1970 .flags = IORESOURCE_MEM,
1971 },
1972 {
648882d9
MH		 1973 .start = 0x2021180E, /* Device Ctl */
1974 .end = 0x2021180E,
2c8beb2c
MH		 1975 .flags = IORESOURCE_MEM,
1976 },
1977};
1978#endif
c6c4d7bb
BW		 1979
1980static struct platform_device bfin_pata_device = {
1981 .name = "pata_platform",
1982 .id = -1,
1983 .num_resources = ARRAY_SIZE(bfin_pata_resources),
1984 .resource = bfin_pata_resources,
1985 .dev = {
1986 .platform_data = &bfin_pata_platform_data,
1987 }
1988};
1989#endif
1990
14b03204
MH		 1991static const unsigned int cclk_vlev_datasheet[] =
1992{
1993 VRPAIR(VLEV_085, 250000000),
1994 VRPAIR(VLEV_090, 376000000),
1995 VRPAIR(VLEV_095, 426000000),
1996 VRPAIR(VLEV_100, 426000000),
1997 VRPAIR(VLEV_105, 476000000),
1998 VRPAIR(VLEV_110, 476000000),
1999 VRPAIR(VLEV_115, 476000000),
2000 VRPAIR(VLEV_120, 500000000),
2001 VRPAIR(VLEV_125, 533000000),
2002 VRPAIR(VLEV_130, 600000000),
2003};
2004
2005static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
2006 .tuple_tab = cclk_vlev_datasheet,
2007 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
2008 .vr_settling_time = 25 /* us */,
2009};
2010
2011static struct platform_device bfin_dpmc = {
2012 .name = "bfin dpmc",
2013 .dev = {
2014 .platform_data = &bfin_dmpc_vreg_data,
2015 },
2016};
2017
336746ed
BS		 2018#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
2019static struct platform_device bfin_i2s = {
2020 .name = "bfin-i2s",
2021 .id = CONFIG_SND_BF5XX_SPORT_NUM,
2022 /* TODO: add platform data here */
2023};
2024#endif
2025
8312440e
BS		 2026#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
2027static struct platform_device bfin_tdm = {
2028 .name = "bfin-tdm",
336746ed
BS		 2029 .id = CONFIG_SND_BF5XX_SPORT_NUM,
2030 /* TODO: add platform data here */
2031};
2032#endif
2033
2034#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
2035static struct platform_device bfin_ac97 = {
2036 .name = "bfin-ac97",
2037 .id = CONFIG_SND_BF5XX_SPORT_NUM,
8312440e
BS		 2038 /* TODO: add platform data here */
2039};
2040#endif
2041
f8e6dbff
SZ		 2042#if defined(CONFIG_REGULATOR_ADP_SWITCH) || defined(CONFIG_REGULATOR_ADP_SWITCH_MODULE)
2043#define REGULATOR_ADP122 "adp122"
2044#define REGULATOR_ADP150 "adp150"
2045
2046static struct regulator_consumer_supply adp122_consumers = {
2047 .supply = REGULATOR_ADP122,
2048};
2049
2050static struct regulator_consumer_supply adp150_consumers = {
2051 .supply = REGULATOR_ADP150,
2052};
2053
2054static struct regulator_init_data adp_switch_regulator_data[] = {
2055 {
2056 .constraints = {
2057 .name = REGULATOR_ADP122,
2058 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
2059 },
2060 .num_consumer_supplies = 1, /* only 1 */
2061 .consumer_supplies = &adp122_consumers,
2062 .driver_data = (void *)GPIO_PF2, /* gpio port only */
2063 },
2064 {
2065 .constraints = {
2066 .name = REGULATOR_ADP150,
2067 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
2068 },
2069 .num_consumer_supplies = 1, /* only 1 */
2070 .consumer_supplies = &adp150_consumers,
2071 .driver_data = (void *)GPIO_PF3, /* gpio port only */
2072 },
2073};
2074
2075static struct adp_switch_platform_data adp_switch_pdata = {
2076 .regulator_num = ARRAY_SIZE(adp_switch_regulator_data),
2077 .regulator_data = adp_switch_regulator_data,
2078};
2079
2080static struct platform_device adp_switch_device = {
2081 .name = "adp_switch",
2082 .id = 0,
2083 .dev = {
2084 .platform_data = &adp_switch_pdata,
2085 },
2086};
2087
2088#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2089 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2090static struct regulator_bulk_data adp122_bulk_data = {
2091 .supply = REGULATOR_ADP122,
2092};
2093
2094static struct regulator_userspace_consumer_data adp122_userspace_comsumer_data = {
2095 .name = REGULATOR_ADP122,
2096 .num_supplies = 1,
2097 .supplies = &adp122_bulk_data,
2098};
2099
2100static struct platform_device adp122_userspace_consumer_device = {
2101 .name = "reg-userspace-consumer",
2102 .id = 0,
2103 .dev = {
2104 .platform_data = &adp122_userspace_comsumer_data,
2105 },
2106};
2107
2108static struct regulator_bulk_data adp150_bulk_data = {
2109 .supply = REGULATOR_ADP150,
2110};
2111
2112static struct regulator_userspace_consumer_data adp150_userspace_comsumer_data = {
2113 .name = REGULATOR_ADP150,
2114 .num_supplies = 1,
2115 .supplies = &adp150_bulk_data,
2116};
2117
2118static struct platform_device adp150_userspace_consumer_device = {
2119 .name = "reg-userspace-consumer",
2120 .id = 1,
2121 .dev = {
2122 .platform_data = &adp150_userspace_comsumer_data,
2123 },
2124};
2125#endif
2126#endif
2127
2128
1394f032 2129static struct platform_device *stamp_devices[] __initdata = {
14b03204
MH		 2130
2131 &bfin_dpmc,
2132
1394f032
BW		 2133#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
2134 &bfin_pcmcia_cf_device,
2135#endif
2136
2137#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
2138 &rtc_device,
2139#endif
2140
2141#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
2142 &sl811_hcd_device,
2143#endif
2144
2145#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
2146 &isp1362_hcd_device,
2147#endif
2148
3f375690
MH		 2149#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
2150 &bfin_isp1760_device,
2151#endif
2152
1394f032
BW		 2153#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
2154 &smc91x_device,
2155#endif
2156
f40d24d9
AL		 2157#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
2158 &dm9000_device,
2159#endif
2160
706a01b1
BS		 2161#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
2162 &bfin_can_device,
2163#endif
2164
1394f032 2165#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
65319628 2166 &bfin_mii_bus,
1394f032
BW		 2167 &bfin_mac_device,
2168#endif
2169
2170#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
2171 &net2272_bfin_device,
2172#endif
2173
2174#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
c6c4d7bb 2175 &bfin_spi0_device,
1394f032
BW		 2176#endif
2177
1e9aa955
CC		 2178#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
2179 &bfin_sport_spi0_device,
2180 &bfin_sport_spi1_device,
2181#endif
2182
1394f032
BW		 2183#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
2184 &bfin_fb_device,
2185#endif
2186
2043f3f7
MH		 2187#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
2188 &bfin_lq035q1_device,
2189#endif
2190
1394f032 2191#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
6bd1fbea
SZ		 2192#ifdef CONFIG_SERIAL_BFIN_UART0
2193 &bfin_uart0_device,
2194#endif
2195#ifdef CONFIG_SERIAL_BFIN_UART1
2196 &bfin_uart1_device,
2197#endif
1394f032
BW		 2198#endif
2199
5be36d22 2200#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb
GY		 2201#ifdef CONFIG_BFIN_SIR0
2202 &bfin_sir0_device,
2203#endif
2204#ifdef CONFIG_BFIN_SIR1
2205 &bfin_sir1_device,
2206#endif
5be36d22
GY		 2207#endif
2208
1394f032
BW		 2209#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
2210 &i2c_bfin_twi_device,
2211#endif
2212
2213#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
df5de261 2214#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1394f032 2215 &bfin_sport0_uart_device,
df5de261
SZ		 2216#endif
2217#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1394f032
BW		 2218 &bfin_sport1_uart_device,
2219#endif
df5de261 2220#endif
c6c4d7bb
BW		 2221
2222#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
2223 &bfin_pata_device,
2224#endif
2463ef22
MH		 2225
2226#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
2227 &bfin_device_gpiokeys,
2228#endif
cad2ab65 2229
fc68911e
MF		 2230#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
2231 &bfin_async_nand_device,
2232#endif
2233
793dc27b 2234#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
de8c43f2 2235 &stamp_flash_device,
793dc27b 2236#endif
8312440e 2237
336746ed
BS		 2238#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
2239 &bfin_i2s,
2240#endif
2241
8312440e
BS		 2242#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
2243 &bfin_tdm,
2244#endif
336746ed
BS		 2245
2246#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
2247 &bfin_ac97,
2248#endif
f32792d0
SZ		 2249#if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
2250#if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
2251 defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
2252 &ad5398_virt_consumer_device,
2253#endif
2254#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2255 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2256 &ad5398_userspace_consumer_device,
2257#endif
2258#endif
f8e6dbff
SZ		 2259
2260#if defined(CONFIG_REGULATOR_ADP_SWITCH) || defined(CONFIG_REGULATOR_ADP_SWITCH_MODULE)
2261 &adp_switch_device,
2262#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2263 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2264 &adp122_userspace_consumer_device,
2265 &adp150_userspace_consumer_device,
2266#endif
2267#endif
1394f032
BW		 2268};
2269
2270static int __init stamp_init(void)
2271{
b85d858b 2272 printk(KERN_INFO "%s(): registering device resources\n", __func__);
fc68911e 2273 bfin_plat_nand_init();
0531c467 2274 adf702x_mac_init();
1394f032 2275 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
df5de261
SZ		 2276 i2c_register_board_info(0, bfin_i2c_board_info,
2277 ARRAY_SIZE(bfin_i2c_board_info));
5bda2723 2278 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
c6c4d7bb 2279
1394f032
BW		 2280 return 0;
2281}
2282
2283arch_initcall(stamp_init);
c6c4d7bb 2284
c13ce9fd
SZ		 2285
2286static struct platform_device *stamp_early_devices[] __initdata = {
2287#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
2288#ifdef CONFIG_SERIAL_BFIN_UART0
2289 &bfin_uart0_device,
2290#endif
2291#ifdef CONFIG_SERIAL_BFIN_UART1
2292 &bfin_uart1_device,
2293#endif
2294#endif
2295
2296#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
2297#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
2298 &bfin_sport0_uart_device,
2299#endif
2300#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
2301 &bfin_sport1_uart_device,
2302#endif
2303#endif
2304};
2305
2306void __init native_machine_early_platform_add_devices(void)
2307{
2308 printk(KERN_INFO "register early platform devices\n");
2309 early_platform_add_devices(stamp_early_devices,
2310 ARRAY_SIZE(stamp_early_devices));
2311}
2312
c6c4d7bb
BW		 2313void native_machine_restart(char *cmd)
2314{
2315 /* workaround reboot hang when booting from SPI */
2316 if ((bfin_read_SYSCR() & 0x7) == 0x3)
b52dae31 2317 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
c6c4d7bb 2318}
137b1529
MF		 2319
2320/*
2321 * Currently the MAC address is saved in Flash by U-Boot
2322 */
2323#define FLASH_MAC 0x203f0000
9862cc52 2324void bfin_get_ether_addr(char *addr)
137b1529
MF		 2325{
2326 *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
2327 *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
2328}
9862cc52 2329EXPORT_SYMBOL(bfin_get_ether_addr);
Clone of davem's net-next-2.6 tree