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Blackfin: bf537-stamp: add CAN resources
[net-next-2.6.git] / arch / blackfin / mach-bf537 / boards / stamp.c
CommitLineData
1394f032 1/*
96f1050d
RG		 2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
1394f032 5 *
96f1050d 6 * Licensed under the GPL-2 or later.
1394f032
BW		 7 */
8
9#include <linux/device.h>
fc68911e 10#include <linux/kernel.h>
1394f032 11#include <linux/platform_device.h>
6e364755 12#include <linux/io.h>
1394f032 13#include <linux/mtd/mtd.h>
fc68911e 14#include <linux/mtd/nand.h>
1394f032 15#include <linux/mtd/partitions.h>
fc68911e 16#include <linux/mtd/plat-ram.h>
de8c43f2 17#include <linux/mtd/physmap.h>
1394f032
BW		 18#include <linux/spi/spi.h>
19#include <linux/spi/flash.h>
20#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
f02bcec5 21#include <linux/usb/isp1362.h>
1394f032 22#endif
0a87e3e9 23#include <linux/ata_platform.h>
1394f032
BW		 24#include <linux/irq.h>
25#include <linux/interrupt.h>
81d9c7f2 26#include <linux/i2c.h>
27f5d75a 27#include <linux/usb/sl811.h>
f79ea4cb 28#include <linux/spi/mmc_spi.h>
78756c62
MH		 29#include <linux/leds.h>
30#include <linux/input.h>
c6c4d7bb 31#include <asm/dma.h>
1f83b8f1 32#include <asm/bfin5xx_spi.h>
c6c4d7bb 33#include <asm/reboot.h>
5d448dd5 34#include <asm/portmux.h>
14b03204 35#include <asm/dpmc.h>
1394f032
BW		 36
37/*
38 * Name the Board for the /proc/cpuinfo
39 */
fe85cad2 40const char bfin_board_name[] = "ADI BF537-STAMP";
1394f032
BW		 41
42/*
43 * Driver needs to know address, irq and flag pin.
44 */
45
1394f032 46#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
3f375690
MH		 47#include <linux/usb/isp1760.h>
48static struct resource bfin_isp1760_resources[] = {
1394f032 49 [0] = {
3f375690
MH		 50 .start = 0x203C0000,
51 .end = 0x203C0000 + 0x000fffff,
1394f032
BW		 52 .flags = IORESOURCE_MEM,
53 },
54 [1] = {
3f375690
MH		 55 .start = IRQ_PF7,
56 .end = IRQ_PF7,
6a6be3d1 57 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
1394f032
BW		 58 },
59};
60
3f375690
MH		 61static struct isp1760_platform_data isp1760_priv = {
62 .is_isp1761 = 0,
3f375690
MH		 63 .bus_width_16 = 1,
64 .port1_otg = 0,
65 .analog_oc = 0,
66 .dack_polarity_high = 0,
67 .dreq_polarity_high = 0,
1394f032
BW		 68};
69
3f375690 70static struct platform_device bfin_isp1760_device = {
c6feb768 71 .name = "isp1760",
3f375690
MH		 72 .id = 0,
73 .dev = {
74 .platform_data = &isp1760_priv,
75 },
76 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
77 .resource = bfin_isp1760_resources,
1394f032 78};
1394f032
BW		 79#endif
80
2463ef22 81#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
2463ef22
MH		 82#include <linux/gpio_keys.h>
83
84static struct gpio_keys_button bfin_gpio_keys_table[] = {
85 {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"},
86 {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"},
87 {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"},
88 {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"},
89};
90
91static struct gpio_keys_platform_data bfin_gpio_keys_data = {
92 .buttons = bfin_gpio_keys_table,
93 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
94};
95
96static struct platform_device bfin_device_gpiokeys = {
97 .name = "gpio-keys",
98 .dev = {
99 .platform_data = &bfin_gpio_keys_data,
100 },
101};
102#endif
103
1394f032
BW		 104#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
105static struct resource bfin_pcmcia_cf_resources[] = {
106 {
107 .start = 0x20310000, /* IO PORT */
108 .end = 0x20312000,
109 .flags = IORESOURCE_MEM,
1f83b8f1 110 }, {
d2d50aa9 111 .start = 0x20311000, /* Attribute Memory */
1394f032
BW		 112 .end = 0x20311FFF,
113 .flags = IORESOURCE_MEM,
1f83b8f1 114 }, {
1394f032
BW		 115 .start = IRQ_PF4,
116 .end = IRQ_PF4,
117 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
1f83b8f1 118 }, {
1394f032
BW		 119 .start = 6, /* Card Detect PF6 */
120 .end = 6,
121 .flags = IORESOURCE_IRQ,
122 },
123};
124
125static struct platform_device bfin_pcmcia_cf_device = {
126 .name = "bfin_cf_pcmcia",
127 .id = -1,
128 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
129 .resource = bfin_pcmcia_cf_resources,
130};
131#endif
132
133#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
134static struct platform_device rtc_device = {
135 .name = "rtc-bfin",
136 .id = -1,
137};
138#endif
139
140#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
61f09b5a
MH		 141#include <linux/smc91x.h>
142
143static struct smc91x_platdata smc91x_info = {
144 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
145 .leda = RPC_LED_100_10,
146 .ledb = RPC_LED_TX_RX,
147};
148
1394f032
BW		 149static struct resource smc91x_resources[] = {
150 {
151 .name = "smc91x-regs",
152 .start = 0x20300300,
153 .end = 0x20300300 + 16,
154 .flags = IORESOURCE_MEM,
1f83b8f1 155 }, {
1394f032
BW		 156
157 .start = IRQ_PF7,
158 .end = IRQ_PF7,
159 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
160 },
161};
162static struct platform_device smc91x_device = {
163 .name = "smc91x",
164 .id = 0,
165 .num_resources = ARRAY_SIZE(smc91x_resources),
166 .resource = smc91x_resources,
61f09b5a
MH		 167 .dev = {
168 .platform_data = &smc91x_info,
169 },
1394f032
BW		 170};
171#endif
172
f40d24d9
AL		 173#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
174static struct resource dm9000_resources[] = {
175 [0] = {
176 .start = 0x203FB800,
b3dec4a4 177 .end = 0x203FB800 + 1,
f40d24d9
AL		 178 .flags = IORESOURCE_MEM,
179 },
180 [1] = {
b3dec4a4
BS		 181 .start = 0x203FB804,
182 .end = 0x203FB804 + 1,
183 .flags = IORESOURCE_MEM,
184 },
185 [2] = {
f40d24d9
AL		 186 .start = IRQ_PF9,
187 .end = IRQ_PF9,
188 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
189 },
190};
191
192static struct platform_device dm9000_device = {
193 .name = "dm9000",
194 .id = -1,
195 .num_resources = ARRAY_SIZE(dm9000_resources),
196 .resource = dm9000_resources,
197};
198#endif
199
561cc18b
MH		 200#if defined(CONFIG_AX88180) || defined(CONFIG_AX88180_MODULE)
201static struct resource ax88180_resources[] = {
202 [0] = {
203 .start = 0x20300000,
204 .end = 0x20300000 + 0x8000,
205 .flags = IORESOURCE_MEM,
206 },
207 [1] = {
208 .start = IRQ_PF7,
209 .end = IRQ_PF7,
210 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL),
211 },
212};
213
214static struct platform_device ax88180_device = {
215 .name = "ax88180",
216 .id = -1,
217 .num_resources = ARRAY_SIZE(ax88180_resources),
218 .resource = ax88180_resources,
219};
220#endif
221
1394f032
BW		 222#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
223static struct resource sl811_hcd_resources[] = {
224 {
225 .start = 0x20340000,
226 .end = 0x20340000,
227 .flags = IORESOURCE_MEM,
1f83b8f1 228 }, {
1394f032
BW		 229 .start = 0x20340004,
230 .end = 0x20340004,
231 .flags = IORESOURCE_MEM,
1f83b8f1 232 }, {
1394f032
BW		 233 .start = CONFIG_USB_SL811_BFIN_IRQ,
234 .end = CONFIG_USB_SL811_BFIN_IRQ,
235 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
236 },
237};
238
239#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
240void sl811_port_power(struct device *dev, int is_on)
241{
c6c4d7bb 242 gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
acbcd263 243 gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
1394f032
BW		 244}
245#endif
246
247static struct sl811_platform_data sl811_priv = {
248 .potpg = 10,
249 .power = 250, /* == 500mA */
250#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
251 .port_power = &sl811_port_power,
252#endif
253};
254
255static struct platform_device sl811_hcd_device = {
256 .name = "sl811-hcd",
257 .id = 0,
258 .dev = {
259 .platform_data = &sl811_priv,
260 },
261 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
262 .resource = sl811_hcd_resources,
263};
264#endif
265
266#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
267static struct resource isp1362_hcd_resources[] = {
268 {
269 .start = 0x20360000,
270 .end = 0x20360000,
271 .flags = IORESOURCE_MEM,
1f83b8f1 272 }, {
1394f032
BW		 273 .start = 0x20360004,
274 .end = 0x20360004,
275 .flags = IORESOURCE_MEM,
1f83b8f1 276 }, {
21b03cfe
MF		 277 .start = IRQ_PF3,
278 .end = IRQ_PF3,
1394f032
BW		 279 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
280 },
281};
282
283static struct isp1362_platform_data isp1362_priv = {
284 .sel15Kres = 1,
285 .clknotstop = 0,
286 .oc_enable = 0,
287 .int_act_high = 0,
288 .int_edge_triggered = 0,
289 .remote_wakeup_connected = 0,
290 .no_power_switching = 1,
291 .power_switching_mode = 0,
292};
293
294static struct platform_device isp1362_hcd_device = {
295 .name = "isp1362-hcd",
296 .id = 0,
297 .dev = {
298 .platform_data = &isp1362_priv,
299 },
300 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
301 .resource = isp1362_hcd_resources,
302};
303#endif
304
706a01b1
BS		 305#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
306unsigned short bfin_can_peripherals[] = {
307 P_CAN0_RX, P_CAN0_TX, 0
308};
309
310static struct resource bfin_can_resources[] = {
311 {
312 .start = 0xFFC02A00,
313 .end = 0xFFC02FFF,
314 .flags = IORESOURCE_MEM,
315 },
316 {
317 .start = IRQ_CAN_RX,
318 .end = IRQ_CAN_RX,
319 .flags = IORESOURCE_IRQ,
320 },
321 {
322 .start = IRQ_CAN_TX,
323 .end = IRQ_CAN_TX,
324 .flags = IORESOURCE_IRQ,
325 },
326 {
327 .start = IRQ_CAN_ERROR,
328 .end = IRQ_CAN_ERROR,
329 .flags = IORESOURCE_IRQ,
330 },
331};
332
333static struct platform_device bfin_can_device = {
334 .name = "bfin_can",
335 .num_resources = ARRAY_SIZE(bfin_can_resources),
336 .resource = bfin_can_resources,
337 .dev = {
338 .platform_data = &bfin_can_peripherals, /* Passed to driver */
339 },
340};
341#endif
342
1394f032 343#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
65319628
GY		 344static struct platform_device bfin_mii_bus = {
345 .name = "bfin_mii_bus",
346};
347
1394f032
BW		 348static struct platform_device bfin_mac_device = {
349 .name = "bfin_mac",
65319628 350 .dev.platform_data = &bfin_mii_bus,
1394f032
BW		 351};
352#endif
353
354#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
355static struct resource net2272_bfin_resources[] = {
356 {
357 .start = 0x20300000,
358 .end = 0x20300000 + 0x100,
359 .flags = IORESOURCE_MEM,
1f83b8f1 360 }, {
1394f032
BW		 361 .start = IRQ_PF7,
362 .end = IRQ_PF7,
363 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
364 },
365};
366
367static struct platform_device net2272_bfin_device = {
368 .name = "net2272",
369 .id = -1,
370 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
371 .resource = net2272_bfin_resources,
372};
373#endif
374
fc68911e
MF		 375#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
376#ifdef CONFIG_MTD_PARTITIONS
377const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
378
379static struct mtd_partition bfin_plat_nand_partitions[] = {
380 {
aa582977 381 .name = "linux kernel(nand)",
fc68911e
MF		 382 .size = 0x400000,
383 .offset = 0,
384 }, {
aa582977 385 .name = "file system(nand)",
fc68911e
MF		 386 .size = MTDPART_SIZ_FULL,
387 .offset = MTDPART_OFS_APPEND,
388 },
389};
390#endif
391
392#define BFIN_NAND_PLAT_CLE 2
393#define BFIN_NAND_PLAT_ALE 1
394static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
395{
396 struct nand_chip *this = mtd->priv;
397
398 if (cmd == NAND_CMD_NONE)
399 return;
400
401 if (ctrl & NAND_CLE)
402 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE));
403 else
404 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE));
405}
406
407#define BFIN_NAND_PLAT_READY GPIO_PF3
408static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)
409{
410 return gpio_get_value(BFIN_NAND_PLAT_READY);
411}
412
413static struct platform_nand_data bfin_plat_nand_data = {
414 .chip = {
415 .chip_delay = 30,
416#ifdef CONFIG_MTD_PARTITIONS
417 .part_probe_types = part_probes,
418 .partitions = bfin_plat_nand_partitions,
419 .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),
420#endif
421 },
422 .ctrl = {
423 .cmd_ctrl = bfin_plat_nand_cmd_ctrl,
424 .dev_ready = bfin_plat_nand_dev_ready,
425 },
426};
427
428#define MAX(x, y) (x > y ? x : y)
429static struct resource bfin_plat_nand_resources = {
430 .start = 0x20212000,
431 .end = 0x20212000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),
432 .flags = IORESOURCE_IO,
433};
434
435static struct platform_device bfin_async_nand_device = {
436 .name = "gen_nand",
437 .id = -1,
438 .num_resources = 1,
439 .resource = &bfin_plat_nand_resources,
440 .dev = {
441 .platform_data = &bfin_plat_nand_data,
442 },
443};
444
445static void bfin_plat_nand_init(void)
446{
447 gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat");
448}
449#else
450static void bfin_plat_nand_init(void) {}
451#endif
452
793dc27b 453#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
de8c43f2
MF		 454static struct mtd_partition stamp_partitions[] = {
455 {
aa582977 456 .name = "bootloader(nor)",
edf05641 457 .size = 0x40000,
de8c43f2
MF		 458 .offset = 0,
459 }, {
aa582977 460 .name = "linux kernel(nor)",
6ecb5b6d 461 .size = 0x180000,
de8c43f2
MF		 462 .offset = MTDPART_OFS_APPEND,
463 }, {
aa582977 464 .name = "file system(nor)",
6ecb5b6d 465 .size = 0x400000 - 0x40000 - 0x180000 - 0x10000,
de8c43f2
MF		 466 .offset = MTDPART_OFS_APPEND,
467 }, {
aa582977 468 .name = "MAC Address(nor)",
de8c43f2
MF		 469 .size = MTDPART_SIZ_FULL,
470 .offset = 0x3F0000,
471 .mask_flags = MTD_WRITEABLE,
472 }
473};
474
475static struct physmap_flash_data stamp_flash_data = {
476 .width = 2,
477 .parts = stamp_partitions,
478 .nr_parts = ARRAY_SIZE(stamp_partitions),
479};
480
481static struct resource stamp_flash_resource = {
482 .start = 0x20000000,
483 .end = 0x203fffff,
484 .flags = IORESOURCE_MEM,
485};
486
487static struct platform_device stamp_flash_device = {
488 .name = "physmap-flash",
489 .id = 0,
490 .dev = {
491 .platform_data = &stamp_flash_data,
492 },
493 .num_resources = 1,
494 .resource = &stamp_flash_resource,
495};
793dc27b 496#endif
de8c43f2 497
1394f032
BW		 498#if defined(CONFIG_MTD_M25P80) \
499 || defined(CONFIG_MTD_M25P80_MODULE)
500static struct mtd_partition bfin_spi_flash_partitions[] = {
501 {
aa582977 502 .name = "bootloader(spi)",
edf05641 503 .size = 0x00040000,
1394f032
BW		 504 .offset = 0,
505 .mask_flags = MTD_CAP_ROM
1f83b8f1 506 }, {
aa582977 507 .name = "linux kernel(spi)",
6ecb5b6d 508 .size = 0x180000,
edf05641 509 .offset = MTDPART_OFS_APPEND,
1f83b8f1 510 }, {
aa582977 511 .name = "file system(spi)",
edf05641
MF		 512 .size = MTDPART_SIZ_FULL,
513 .offset = MTDPART_OFS_APPEND,
1394f032
BW		 514 }
515};
516
517static struct flash_platform_data bfin_spi_flash_data = {
518 .name = "m25p80",
519 .parts = bfin_spi_flash_partitions,
520 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
88a8078b 521 /* .type = "m25p64", */
1394f032
BW		 522};
523
524/* SPI flash chip (m25p64) */
525static struct bfin5xx_spi_chip spi_flash_chip_info = {
526 .enable_dma = 0, /* use dma transfer with this chip*/
527 .bits_per_word = 8,
528};
529#endif
530
a261eec0
MF		 531#if defined(CONFIG_BFIN_SPI_ADC) \
532 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
1394f032
BW		 533/* SPI ADC chip */
534static struct bfin5xx_spi_chip spi_adc_chip_info = {
535 .enable_dma = 1, /* use dma transfer with this chip*/
536 .bits_per_word = 16,
537};
538#endif
539
8312440e
BS		 540#if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
541 || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
1394f032
BW		 542static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
543 .enable_dma = 0,
544 .bits_per_word = 16,
545};
546#endif
547
d4b834c1
BS		 548#if defined(CONFIG_SND_BF5XX_SOC_AD1938) \
549 || defined(CONFIG_SND_BF5XX_SOC_AD1938_MODULE)
550static struct bfin5xx_spi_chip ad1938_spi_chip_info = {
551 .enable_dma = 0,
552 .bits_per_word = 8,
553 .cs_gpio = GPIO_PF5,
554};
555#endif
556
5b7c5775 557#if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
427f277e
BS		 558#include <linux/input/ad714x.h>
559static struct bfin5xx_spi_chip ad7147_spi_chip_info = {
560 .enable_dma = 0,
561 .bits_per_word = 16,
562};
563
5b7c5775 564static struct ad714x_slider_plat ad7147_spi_slider_plat[] = {
427f277e
BS		 565 {
566 .start_stage = 0,
567 .end_stage = 7,
568 .max_coord = 128,
569 },
570};
571
5b7c5775 572static struct ad714x_button_plat ad7147_spi_button_plat[] = {
427f277e
BS		 573 {
574 .keycode = BTN_FORWARD,
575 .l_mask = 0,
576 .h_mask = 0x600,
577 },
578 {
579 .keycode = BTN_LEFT,
580 .l_mask = 0,
581 .h_mask = 0x500,
582 },
583 {
584 .keycode = BTN_MIDDLE,
585 .l_mask = 0,
586 .h_mask = 0x800,
587 },
588 {
589 .keycode = BTN_RIGHT,
590 .l_mask = 0x100,
591 .h_mask = 0x400,
592 },
593 {
594 .keycode = BTN_BACK,
595 .l_mask = 0x200,
596 .h_mask = 0x400,
597 },
598};
5b7c5775 599static struct ad714x_platform_data ad7147_spi_platform_data = {
427f277e
BS		 600 .slider_num = 1,
601 .button_num = 5,
5b7c5775
MF		 602 .slider = ad7147_spi_slider_plat,
603 .button = ad7147_spi_button_plat,
427f277e
BS		 604 .stage_cfg_reg = {
605 {0xFBFF, 0x1FFF, 0, 0x2626, 1600, 1600, 1600, 1600},
606 {0xEFFF, 0x1FFF, 0, 0x2626, 1650, 1650, 1650, 1650},
607 {0xFFFF, 0x1FFE, 0, 0x2626, 1650, 1650, 1650, 1650},
608 {0xFFFF, 0x1FFB, 0, 0x2626, 1650, 1650, 1650, 1650},
609 {0xFFFF, 0x1FEF, 0, 0x2626, 1650, 1650, 1650, 1650},
610 {0xFFFF, 0x1FBF, 0, 0x2626, 1650, 1650, 1650, 1650},
611 {0xFFFF, 0x1EFF, 0, 0x2626, 1650, 1650, 1650, 1650},
612 {0xFFFF, 0x1BFF, 0, 0x2626, 1600, 1600, 1600, 1600},
613 {0xFF7B, 0x3FFF, 0x506, 0x2626, 1100, 1100, 1150, 1150},
614 {0xFDFE, 0x3FFF, 0x606, 0x2626, 1100, 1100, 1150, 1150},
615 {0xFEBA, 0x1FFF, 0x1400, 0x2626, 1200, 1200, 1300, 1300},
616 {0xFFEF, 0x1FFF, 0x0, 0x2626, 1100, 1100, 1150, 1150},
617 },
618 .sys_cfg_reg = {0x2B2, 0x0, 0x3233, 0x819, 0x832, 0xCFF, 0xCFF, 0x0},
619};
620#endif
621
5b7c5775 622#if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
427f277e 623#include <linux/input/ad714x.h>
5b7c5775 624static struct ad714x_button_plat ad7142_i2c_button_plat[] = {
427f277e
BS		 625 {
626 .keycode = BTN_1,
627 .l_mask = 0,
628 .h_mask = 0x1,
629 },
630 {
631 .keycode = BTN_2,
632 .l_mask = 0,
633 .h_mask = 0x2,
634 },
635 {
636 .keycode = BTN_3,
637 .l_mask = 0,
638 .h_mask = 0x4,
639 },
640 {
641 .keycode = BTN_4,
642 .l_mask = 0x0,
643 .h_mask = 0x8,
644 },
645};
5b7c5775 646static struct ad714x_platform_data ad7142_i2c_platform_data = {
427f277e 647 .button_num = 4,
5b7c5775 648 .button = ad7142_i2c_button_plat,
427f277e
BS		 649 .stage_cfg_reg = {
650 /* fixme: figure out right setting for all comoponent according
651 * to hardware feature of EVAL-AD7142EB board */
652 {0xE7FF, 0x3FFF, 0x0005, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
653 {0xFDBF, 0x3FFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
654 {0xFFFF, 0x2DFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
655 {0xFFFF, 0x37BF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
656 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
657 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
658 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
659 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
660 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
661 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
662 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
663 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
664 },
665 .sys_cfg_reg = {0x0B2, 0x0, 0x690, 0x664, 0x290F, 0xF, 0xF, 0x0},
666};
667#endif
668
f79ea4cb
YL		 669#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
670#define MMC_SPI_CARD_DETECT_INT IRQ_PF5
671
672static int bfin_mmc_spi_init(struct device *dev,
673 irqreturn_t (*detect_int)(int, void *), void *data)
674{
675 return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
676 IRQF_TRIGGER_FALLING, "mmc-spi-detect", data);
677}
678
679static void bfin_mmc_spi_exit(struct device *dev, void *data)
680{
681 free_irq(MMC_SPI_CARD_DETECT_INT, data);
682}
683
684static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
685 .init = bfin_mmc_spi_init,
686 .exit = bfin_mmc_spi_exit,
687 .detect_delay = 100, /* msecs */
688};
689
690static struct bfin5xx_spi_chip mmc_spi_chip_info = {
691 .enable_dma = 0,
692 .bits_per_word = 8,
e68d1ebc 693 .pio_interrupt = 0,
f79ea4cb
YL		 694};
695#endif
696
1394f032 697#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
46aa04f9 698#include <linux/spi/ad7877.h>
1394f032 699static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
1394f032
BW		 700 .enable_dma = 0,
701 .bits_per_word = 16,
702};
703
704static const struct ad7877_platform_data bfin_ad7877_ts_info = {
705 .model = 7877,
706 .vref_delay_usecs = 50, /* internal, no capacitor */
707 .x_plate_ohms = 419,
708 .y_plate_ohms = 486,
709 .pressure_max = 1000,
710 .pressure_min = 0,
711 .stopacq_polarity = 1,
712 .first_conversion_delay = 3,
713 .acquisition_time = 1,
714 .averaging = 1,
715 .pen_down_acc_interval = 1,
716};
717#endif
718
46aa04f9
MH		 719#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
720#include <linux/spi/ad7879.h>
46aa04f9
MH		 721static const struct ad7879_platform_data bfin_ad7879_ts_info = {
722 .model = 7879, /* Model = AD7879 */
723 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
724 .pressure_max = 10000,
725 .pressure_min = 0,
726 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
727 .acquisition_time = 1, /* 4us acquisition time per sample */
728 .median = 2, /* do 8 measurements */
729 .averaging = 1, /* take the average of 4 middle samples */
730 .pen_down_acc_interval = 255, /* 9.4 ms */
731 .gpio_output = 1, /* configure AUX/VBAT/GPIO as GPIO output */
732 .gpio_default = 1, /* During initialization set GPIO = HIGH */
733};
734#endif
735
ffc4d8bc 736#if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
57af8edf 737#include <linux/input/adxl34x.h>
ffc4d8bc
MH		 738static const struct adxl34x_platform_data adxl34x_info = {
739 .x_axis_offset = 0,
740 .y_axis_offset = 0,
741 .z_axis_offset = 0,
742 .tap_threshold = 0x31,
743 .tap_duration = 0x10,
744 .tap_latency = 0x60,
745 .tap_window = 0xF0,
746 .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
747 .act_axis_control = 0xFF,
748 .activity_threshold = 5,
749 .inactivity_threshold = 3,
750 .inactivity_time = 4,
751 .free_fall_threshold = 0x7,
752 .free_fall_time = 0x20,
753 .data_rate = 0x8,
754 .data_range = ADXL_FULL_RES,
755
756 .ev_type = EV_ABS,
757 .ev_code_x = ABS_X, /* EV_REL */
758 .ev_code_y = ABS_Y, /* EV_REL */
759 .ev_code_z = ABS_Z, /* EV_REL */
760
57af8edf 761 .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
ffc4d8bc
MH		 762
763/* .ev_code_ff = KEY_F,*/ /* EV_KEY */
764/* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
765 .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
766 .fifo_mode = ADXL_FIFO_STREAM,
767};
768#endif
769
f5150155
MH		 770#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
771static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
772 .enable_dma = 0,
773 .bits_per_word = 16,
774};
775#endif
776
6e668936
MH		 777#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
778static struct bfin5xx_spi_chip spidev_chip_info = {
779 .enable_dma = 0,
780 .bits_per_word = 8,
781};
782#endif
783
2043f3f7
MH		 784#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
785static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
786 .enable_dma = 0,
787 .bits_per_word = 8,
788};
789#endif
790
85a192e9
MH		 791#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
792static struct bfin5xx_spi_chip enc28j60_spi_chip_info = {
793 .enable_dma = 1,
794 .bits_per_word = 8,
795 .cs_gpio = GPIO_PF10,
796};
797#endif
798
8e9d5c7d
MH		 799#if defined(CONFIG_MTD_DATAFLASH) \
800 || defined(CONFIG_MTD_DATAFLASH_MODULE)
ceac2651
MH		 801
802static struct mtd_partition bfin_spi_dataflash_partitions[] = {
803 {
804 .name = "bootloader(spi)",
805 .size = 0x00040000,
806 .offset = 0,
807 .mask_flags = MTD_CAP_ROM
808 }, {
809 .name = "linux kernel(spi)",
6ecb5b6d 810 .size = 0x180000,
ceac2651
MH		 811 .offset = MTDPART_OFS_APPEND,
812 }, {
813 .name = "file system(spi)",
814 .size = MTDPART_SIZ_FULL,
815 .offset = MTDPART_OFS_APPEND,
816 }
817};
818
819static struct flash_platform_data bfin_spi_dataflash_data = {
820 .name = "SPI Dataflash",
821 .parts = bfin_spi_dataflash_partitions,
822 .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),
823};
824
8e9d5c7d
MH		 825/* DataFlash chip */
826static struct bfin5xx_spi_chip data_flash_chip_info = {
827 .enable_dma = 0, /* use dma transfer with this chip*/
828 .bits_per_word = 8,
829};
830#endif
831
57af8edf
MH		 832#if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
833static struct bfin5xx_spi_chip spi_adxl34x_chip_info = {
834 .enable_dma = 0, /* use dma transfer with this chip*/
835 .bits_per_word = 8,
836};
837#endif
838
1394f032
BW		 839static struct spi_board_info bfin_spi_board_info[] __initdata = {
840#if defined(CONFIG_MTD_M25P80) \
841 || defined(CONFIG_MTD_M25P80_MODULE)
842 {
843 /* the modalias must be the same as spi device driver name */
844 .modalias = "m25p80", /* Name of spi_driver for this device */
845 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 846 .bus_num = 0, /* Framework bus number */
1394f032
BW		 847 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
848 .platform_data = &bfin_spi_flash_data,
849 .controller_data = &spi_flash_chip_info,
850 .mode = SPI_MODE_3,
851 },
852#endif
8e9d5c7d
MH		 853#if defined(CONFIG_MTD_DATAFLASH) \
854 || defined(CONFIG_MTD_DATAFLASH_MODULE)
855 { /* DataFlash chip */
856 .modalias = "mtd_dataflash",
ceac2651 857 .max_speed_hz = 33250000, /* max spi clock (SCK) speed in HZ */
8e9d5c7d
MH		 858 .bus_num = 0, /* Framework bus number */
859 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
ceac2651 860 .platform_data = &bfin_spi_dataflash_data,
8e9d5c7d
MH		 861 .controller_data = &data_flash_chip_info,
862 .mode = SPI_MODE_3,
863 },
864#endif
a261eec0
MF		 865#if defined(CONFIG_BFIN_SPI_ADC) \
866 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
1394f032
BW		 867 {
868 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
869 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 870 .bus_num = 0, /* Framework bus number */
1394f032
BW		 871 .chip_select = 1, /* Framework chip select. */
872 .platform_data = NULL, /* No spi_driver specific config */
873 .controller_data = &spi_adc_chip_info,
874 },
875#endif
876
8312440e
BS		 877#if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
878 || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
1394f032 879 {
dac98174 880 .modalias = "ad1836",
1394f032 881 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 882 .bus_num = 0,
8312440e 883 .chip_select = 4,/* CONFIG_SND_BLACKFIN_SPI_PFBIT */
1394f032 884 .controller_data = &ad1836_spi_chip_info,
8312440e 885 .mode = SPI_MODE_3,
1394f032
BW		 886 },
887#endif
d4b834c1
BS		 888
889#if defined(CONFIG_SND_BF5XX_SOC_AD1938) || defined(CONFIG_SND_BF5XX_SOC_AD1938_MODULE)
890 {
dac98174 891 .modalias = "ad1938",
d4b834c1
BS		 892 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
893 .bus_num = 0,
894 .chip_select = 0,/* CONFIG_SND_BLACKFIN_SPI_PFBIT */
895 .controller_data = &ad1938_spi_chip_info,
896 .mode = SPI_MODE_3,
897 },
898#endif
899
5b7c5775 900#if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
427f277e
BS		 901 {
902 .modalias = "ad714x_captouch",
903 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
904 .irq = IRQ_PF4,
905 .bus_num = 0,
906 .chip_select = 5,
907 .mode = SPI_MODE_3,
5b7c5775 908 .platform_data = &ad7147_spi_platform_data,
427f277e
BS		 909 .controller_data = &ad7147_spi_chip_info,
910 },
911#endif
912
f79ea4cb
YL		 913#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
914 {
915 .modalias = "mmc_spi",
916 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
917 .bus_num = 0,
918 .chip_select = 4,
919 .platform_data = &bfin_mmc_spi_pdata,
920 .controller_data = &mmc_spi_chip_info,
921 .mode = SPI_MODE_3,
922 },
923#endif
1394f032
BW		 924#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
925 {
926 .modalias = "ad7877",
927 .platform_data = &bfin_ad7877_ts_info,
928 .irq = IRQ_PF6,
929 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
c7d48966 930 .bus_num = 0,
1394f032
BW		 931 .chip_select = 1,
932 .controller_data = &spi_ad7877_chip_info,
933 },
934#endif
f5150155 935#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
46aa04f9
MH		 936 {
937 .modalias = "ad7879",
938 .platform_data = &bfin_ad7879_ts_info,
939 .irq = IRQ_PF7,
940 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
941 .bus_num = 0,
942 .chip_select = 1,
943 .controller_data = &spi_ad7879_chip_info,
944 .mode = SPI_CPHA | SPI_CPOL,
945 },
946#endif
6e668936
MH		 947#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
948 {
949 .modalias = "spidev",
950 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
951 .bus_num = 0,
952 .chip_select = 1,
953 .controller_data = &spidev_chip_info,
954 },
955#endif
2043f3f7
MH		 956#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
957 {
958 .modalias = "bfin-lq035q1-spi",
959 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
960 .bus_num = 0,
46aa04f9 961 .chip_select = 2,
2043f3f7
MH		 962 .controller_data = &lq035q1_spi_chip_info,
963 .mode = SPI_CPHA | SPI_CPOL,
964 },
965#endif
85a192e9
MH		 966#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
967 {
968 .modalias = "enc28j60",
969 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
970 .irq = IRQ_PF6,
971 .bus_num = 0,
972 .chip_select = 0, /* GPIO controlled SSEL */
973 .controller_data = &enc28j60_spi_chip_info,
974 .mode = SPI_MODE_0,
975 },
976#endif
57af8edf
MH		 977#if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
978 {
979 .modalias = "adxl34x",
980 .platform_data = &adxl34x_info,
981 .irq = IRQ_PF6,
982 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
983 .bus_num = 0,
984 .chip_select = 2,
985 .controller_data = &spi_adxl34x_chip_info,
986 .mode = SPI_MODE_3,
987 },
988#endif
1394f032
BW		 989};
990
5bda2723 991#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
1394f032 992/* SPI controller data */
c6c4d7bb 993static struct bfin5xx_spi_master bfin_spi0_info = {
1394f032
BW		 994 .num_chipselect = 8,
995 .enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5 996 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1394f032
BW		 997};
998
c6c4d7bb
BW		 999/* SPI (0) */
1000static struct resource bfin_spi0_resource[] = {
1001 [0] = {
1002 .start = SPI0_REGBASE,
1003 .end = SPI0_REGBASE + 0xFF,
1004 .flags = IORESOURCE_MEM,
1005 },
1006 [1] = {
1007 .start = CH_SPI,
1008 .end = CH_SPI,
e68d1ebc
YL		 1009 .flags = IORESOURCE_DMA,
1010 },
1011 [2] = {
1012 .start = IRQ_SPI,
1013 .end = IRQ_SPI,
c6c4d7bb
BW		 1014 .flags = IORESOURCE_IRQ,
1015 },
1016};
1017
1018static struct platform_device bfin_spi0_device = {
1019 .name = "bfin-spi",
1020 .id = 0, /* Bus number */
1021 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
1022 .resource = bfin_spi0_resource,
1394f032 1023 .dev = {
c6c4d7bb 1024 .platform_data = &bfin_spi0_info, /* Passed to driver */
1394f032
BW		 1025 },
1026};
1027#endif /* spi master and devices */
1028
1e9aa955
CC		 1029#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
1030
1031/* SPORT SPI controller data */
1032static struct bfin5xx_spi_master bfin_sport_spi0_info = {
1033 .num_chipselect = 1, /* master only supports one device */
1034 .enable_dma = 0, /* master don't support DMA */
1035 .pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,
1036 P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0},
1037};
1038
1039static struct resource bfin_sport_spi0_resource[] = {
1040 [0] = {
1041 .start = SPORT0_TCR1,
1042 .end = SPORT0_TCR1 + 0xFF,
1043 .flags = IORESOURCE_MEM,
1044 },
1045 [1] = {
1046 .start = IRQ_SPORT0_ERROR,
1047 .end = IRQ_SPORT0_ERROR,
1048 .flags = IORESOURCE_IRQ,
1049 },
1050};
1051
1052static struct platform_device bfin_sport_spi0_device = {
1053 .name = "bfin-sport-spi",
1054 .id = 1, /* Bus number */
1055 .num_resources = ARRAY_SIZE(bfin_sport_spi0_resource),
1056 .resource = bfin_sport_spi0_resource,
1057 .dev = {
1058 .platform_data = &bfin_sport_spi0_info, /* Passed to driver */
1059 },
1060};
1061
1062static struct bfin5xx_spi_master bfin_sport_spi1_info = {
1063 .num_chipselect = 1, /* master only supports one device */
1064 .enable_dma = 0, /* master don't support DMA */
1065 .pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI,
1066 P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0},
1067};
1068
1069static struct resource bfin_sport_spi1_resource[] = {
1070 [0] = {
1071 .start = SPORT1_TCR1,
1072 .end = SPORT1_TCR1 + 0xFF,
1073 .flags = IORESOURCE_MEM,
1074 },
1075 [1] = {
1076 .start = IRQ_SPORT1_ERROR,
1077 .end = IRQ_SPORT1_ERROR,
1078 .flags = IORESOURCE_IRQ,
1079 },
1080};
1081
1082static struct platform_device bfin_sport_spi1_device = {
1083 .name = "bfin-sport-spi",
1084 .id = 2, /* Bus number */
1085 .num_resources = ARRAY_SIZE(bfin_sport_spi1_resource),
1086 .resource = bfin_sport_spi1_resource,
1087 .dev = {
1088 .platform_data = &bfin_sport_spi1_info, /* Passed to driver */
1089 },
1090};
1091
1092#endif /* sport spi master and devices */
1093
1394f032
BW		 1094#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
1095static struct platform_device bfin_fb_device = {
c6c4d7bb
BW		 1096 .name = "bf537-lq035",
1097};
1098#endif
1099
2043f3f7
MH		 1100#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1101#include <asm/bfin-lq035q1.h>
1102
1103static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
1104 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
46aa04f9 1105 .use_bl = 0, /* let something else control the LCD Blacklight */
2043f3f7
MH		 1106 .gpio_bl = GPIO_PF7,
1107};
1108
1109static struct resource bfin_lq035q1_resources[] = {
1110 {
1111 .start = IRQ_PPI_ERROR,
1112 .end = IRQ_PPI_ERROR,
1113 .flags = IORESOURCE_IRQ,
1114 },
1115};
1116
1117static struct platform_device bfin_lq035q1_device = {
1118 .name = "bfin-lq035q1",
1119 .id = -1,
1120 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
1121 .resource = bfin_lq035q1_resources,
1122 .dev = {
1123 .platform_data = &bfin_lq035q1_data,
1124 },
1125};
1126#endif
1127
1394f032
BW		 1128#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
1129static struct resource bfin_uart_resources[] = {
233b28a9 1130#ifdef CONFIG_SERIAL_BFIN_UART0
1394f032
BW		 1131 {
1132 .start = 0xFFC00400,
1133 .end = 0xFFC004FF,
1134 .flags = IORESOURCE_MEM,
233b28a9
SZ		 1135 },
1136#endif
1137#ifdef CONFIG_SERIAL_BFIN_UART1
1138 {
1394f032
BW		 1139 .start = 0xFFC02000,
1140 .end = 0xFFC020FF,
1141 .flags = IORESOURCE_MEM,
1142 },
233b28a9 1143#endif
1394f032
BW		 1144};
1145
1146static struct platform_device bfin_uart_device = {
1147 .name = "bfin-uart",
1148 .id = 1,
1149 .num_resources = ARRAY_SIZE(bfin_uart_resources),
1150 .resource = bfin_uart_resources,
1151};
1152#endif
1153
5be36d22 1154#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
5be36d22 1155#ifdef CONFIG_BFIN_SIR0
42bd8bcb 1156static struct resource bfin_sir0_resources[] = {
5be36d22
GY		 1157 {
1158 .start = 0xFFC00400,
1159 .end = 0xFFC004FF,
1160 .flags = IORESOURCE_MEM,
1161 },
42bd8bcb
GY		 1162 {
1163 .start = IRQ_UART0_RX,
1164 .end = IRQ_UART0_RX+1,
1165 .flags = IORESOURCE_IRQ,
1166 },
1167 {
1168 .start = CH_UART0_RX,
1169 .end = CH_UART0_RX+1,
1170 .flags = IORESOURCE_DMA,
1171 },
1172};
1173
1174static struct platform_device bfin_sir0_device = {
1175 .name = "bfin_sir",
1176 .id = 0,
1177 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
1178 .resource = bfin_sir0_resources,
1179};
5be36d22
GY		 1180#endif
1181#ifdef CONFIG_BFIN_SIR1
42bd8bcb 1182static struct resource bfin_sir1_resources[] = {
5be36d22
GY		 1183 {
1184 .start = 0xFFC02000,
1185 .end = 0xFFC020FF,
1186 .flags = IORESOURCE_MEM,
1187 },
42bd8bcb
GY		 1188 {
1189 .start = IRQ_UART1_RX,
1190 .end = IRQ_UART1_RX+1,
1191 .flags = IORESOURCE_IRQ,
1192 },
1193 {
1194 .start = CH_UART1_RX,
1195 .end = CH_UART1_RX+1,
1196 .flags = IORESOURCE_DMA,
1197 },
5be36d22
GY		 1198};
1199
42bd8bcb 1200static struct platform_device bfin_sir1_device = {
5be36d22 1201 .name = "bfin_sir",
42bd8bcb
GY		 1202 .id = 1,
1203 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
1204 .resource = bfin_sir1_resources,
5be36d22
GY		 1205};
1206#endif
42bd8bcb 1207#endif
5be36d22 1208
1394f032 1209#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
c6c4d7bb
BW		 1210static struct resource bfin_twi0_resource[] = {
1211 [0] = {
1212 .start = TWI0_REGBASE,
1213 .end = TWI0_REGBASE,
1214 .flags = IORESOURCE_MEM,
1215 },
1216 [1] = {
1217 .start = IRQ_TWI,
1218 .end = IRQ_TWI,
1219 .flags = IORESOURCE_IRQ,
1220 },
1221};
1222
1394f032
BW		 1223static struct platform_device i2c_bfin_twi_device = {
1224 .name = "i2c-bfin-twi",
1225 .id = 0,
c6c4d7bb
BW		 1226 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
1227 .resource = bfin_twi0_resource,
1394f032
BW		 1228};
1229#endif
1230
51ed9ad7 1231#if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
f39d56ec 1232#include <linux/i2c/adp5588.h>
51ed9ad7
MH		 1233static const unsigned short adp5588_keymap[ADP5588_KEYMAPSIZE] = {
1234 [0] = KEY_GRAVE,
1235 [1] = KEY_1,
1236 [2] = KEY_2,
1237 [3] = KEY_3,
1238 [4] = KEY_4,
1239 [5] = KEY_5,
1240 [6] = KEY_6,
1241 [7] = KEY_7,
1242 [8] = KEY_8,
1243 [9] = KEY_9,
1244 [10] = KEY_0,
1245 [11] = KEY_MINUS,
1246 [12] = KEY_EQUAL,
1247 [13] = KEY_BACKSLASH,
1248 [15] = KEY_KP0,
1249 [16] = KEY_Q,
1250 [17] = KEY_W,
1251 [18] = KEY_E,
1252 [19] = KEY_R,
1253 [20] = KEY_T,
1254 [21] = KEY_Y,
1255 [22] = KEY_U,
1256 [23] = KEY_I,
1257 [24] = KEY_O,
1258 [25] = KEY_P,
1259 [26] = KEY_LEFTBRACE,
1260 [27] = KEY_RIGHTBRACE,
1261 [29] = KEY_KP1,
1262 [30] = KEY_KP2,
1263 [31] = KEY_KP3,
1264 [32] = KEY_A,
1265 [33] = KEY_S,
1266 [34] = KEY_D,
1267 [35] = KEY_F,
1268 [36] = KEY_G,
1269 [37] = KEY_H,
1270 [38] = KEY_J,
1271 [39] = KEY_K,
1272 [40] = KEY_L,
1273 [41] = KEY_SEMICOLON,
1274 [42] = KEY_APOSTROPHE,
1275 [43] = KEY_BACKSLASH,
1276 [45] = KEY_KP4,
1277 [46] = KEY_KP5,
1278 [47] = KEY_KP6,
1279 [48] = KEY_102ND,
1280 [49] = KEY_Z,
1281 [50] = KEY_X,
1282 [51] = KEY_C,
1283 [52] = KEY_V,
1284 [53] = KEY_B,
1285 [54] = KEY_N,
1286 [55] = KEY_M,
1287 [56] = KEY_COMMA,
1288 [57] = KEY_DOT,
1289 [58] = KEY_SLASH,
1290 [60] = KEY_KPDOT,
1291 [61] = KEY_KP7,
1292 [62] = KEY_KP8,
1293 [63] = KEY_KP9,
1294 [64] = KEY_SPACE,
1295 [65] = KEY_BACKSPACE,
1296 [66] = KEY_TAB,
1297 [67] = KEY_KPENTER,
1298 [68] = KEY_ENTER,
1299 [69] = KEY_ESC,
1300 [70] = KEY_DELETE,
1301 [74] = KEY_KPMINUS,
1302 [76] = KEY_UP,
1303 [77] = KEY_DOWN,
1304 [78] = KEY_RIGHT,
1305 [79] = KEY_LEFT,
1306};
1307
1308static struct adp5588_kpad_platform_data adp5588_kpad_data = {
1309 .rows = 8,
1310 .cols = 10,
1311 .keymap = adp5588_keymap,
1312 .keymapsize = ARRAY_SIZE(adp5588_keymap),
1313 .repeat = 0,
1314};
1315#endif
1316
3ea57218
MH		 1317#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
1318#include <linux/mfd/adp5520.h>
1319
1320 /*
1321 * ADP5520/5501 Backlight Data
1322 */
1323
1d23dc89
MH		 1324static struct adp5520_backlight_platform_data adp5520_backlight_data = {
1325 .fade_in = ADP5520_FADE_T_1200ms,
1326 .fade_out = ADP5520_FADE_T_1200ms,
1327 .fade_led_law = ADP5520_BL_LAW_LINEAR,
1328 .en_ambl_sens = 1,
1329 .abml_filt = ADP5520_BL_AMBL_FILT_640ms,
1330 .l1_daylight_max = ADP5520_BL_CUR_mA(15),
1331 .l1_daylight_dim = ADP5520_BL_CUR_mA(0),
1332 .l2_office_max = ADP5520_BL_CUR_mA(7),
1333 .l2_office_dim = ADP5520_BL_CUR_mA(0),
1334 .l3_dark_max = ADP5520_BL_CUR_mA(3),
1335 .l3_dark_dim = ADP5520_BL_CUR_mA(0),
1336 .l2_trip = ADP5520_L2_COMP_CURR_uA(700),
1337 .l2_hyst = ADP5520_L2_COMP_CURR_uA(50),
1338 .l3_trip = ADP5520_L3_COMP_CURR_uA(80),
1339 .l3_hyst = ADP5520_L3_COMP_CURR_uA(20),
3ea57218
MH		 1340};
1341
1342 /*
1343 * ADP5520/5501 LEDs Data
1344 */
1345
3ea57218
MH		 1346static struct led_info adp5520_leds[] = {
1347 {
1348 .name = "adp5520-led1",
1349 .default_trigger = "none",
1d23dc89 1350 .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
3ea57218
MH		 1351 },
1352#ifdef ADP5520_EN_ALL_LEDS
1353 {
1354 .name = "adp5520-led2",
1355 .default_trigger = "none",
1356 .flags = FLAG_ID_ADP5520_LED2_ADP5501_LED1,
1357 },
1358 {
1359 .name = "adp5520-led3",
1360 .default_trigger = "none",
1361 .flags = FLAG_ID_ADP5520_LED3_ADP5501_LED2,
1362 },
1363#endif
1364};
1365
1d23dc89 1366static struct adp5520_leds_platform_data adp5520_leds_data = {
3ea57218
MH		 1367 .num_leds = ARRAY_SIZE(adp5520_leds),
1368 .leds = adp5520_leds,
1d23dc89
MH		 1369 .fade_in = ADP5520_FADE_T_600ms,
1370 .fade_out = ADP5520_FADE_T_600ms,
1371 .led_on_time = ADP5520_LED_ONT_600ms,
3ea57218
MH		 1372};
1373
1374 /*
1375 * ADP5520 GPIO Data
1376 */
1377
1d23dc89 1378static struct adp5520_gpio_platform_data adp5520_gpio_data = {
3ea57218 1379 .gpio_start = 50,
1d23dc89
MH		 1380 .gpio_en_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
1381 .gpio_pullup_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
3ea57218
MH		 1382};
1383
1384 /*
1385 * ADP5520 Keypad Data
1386 */
1387
3ea57218 1388static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
1d23dc89
MH		 1389 [ADP5520_KEY(0, 0)] = KEY_GRAVE,
1390 [ADP5520_KEY(0, 1)] = KEY_1,
1391 [ADP5520_KEY(0, 2)] = KEY_2,
1392 [ADP5520_KEY(0, 3)] = KEY_3,
1393 [ADP5520_KEY(1, 0)] = KEY_4,
1394 [ADP5520_KEY(1, 1)] = KEY_5,
1395 [ADP5520_KEY(1, 2)] = KEY_6,
1396 [ADP5520_KEY(1, 3)] = KEY_7,
1397 [ADP5520_KEY(2, 0)] = KEY_8,
1398 [ADP5520_KEY(2, 1)] = KEY_9,
1399 [ADP5520_KEY(2, 2)] = KEY_0,
1400 [ADP5520_KEY(2, 3)] = KEY_MINUS,
1401 [ADP5520_KEY(3, 0)] = KEY_EQUAL,
1402 [ADP5520_KEY(3, 1)] = KEY_BACKSLASH,
1403 [ADP5520_KEY(3, 2)] = KEY_BACKSPACE,
1404 [ADP5520_KEY(3, 3)] = KEY_ENTER,
1405};
1406
1407static struct adp5520_keys_platform_data adp5520_keys_data = {
1408 .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
1409 .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
3ea57218
MH		 1410 .keymap = adp5520_keymap,
1411 .keymapsize = ARRAY_SIZE(adp5520_keymap),
1412 .repeat = 0,
1413};
1414
1415 /*
1416 * ADP5520/5501 Multifuction Device Init Data
1417 */
1418
3ea57218 1419static struct adp5520_platform_data adp5520_pdev_data = {
1d23dc89
MH		 1420 .backlight = &adp5520_backlight_data,
1421 .leds = &adp5520_leds_data,
1422 .gpio = &adp5520_gpio_data,
1423 .keys = &adp5520_keys_data,
3ea57218
MH		 1424};
1425
1426#endif
1427
ba877d44
MH		 1428#if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
1429#include <linux/i2c/adp5588.h>
1d23dc89 1430static struct adp5588_gpio_platform_data adp5588_gpio_data = {
ba877d44
MH		 1431 .gpio_start = 50,
1432 .pullup_dis_mask = 0,
1433};
1434#endif
1435
78756c62
MH		 1436#if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
1437#include <linux/i2c/adp8870.h>
1438static struct led_info adp8870_leds[] = {
1439 {
1440 .name = "adp8870-led7",
1441 .default_trigger = "none",
1442 .flags = ADP8870_LED_D7 | ADP8870_LED_OFFT_600ms,
1443 },
1444};
1445
1446
1447static struct adp8870_backlight_platform_data adp8870_pdata = {
1448 .bl_led_assign = ADP8870_BL_D1 | ADP8870_BL_D2 | ADP8870_BL_D3 |
1449 ADP8870_BL_D4 | ADP8870_BL_D5 | ADP8870_BL_D6, /* 1 = Backlight 0 = Individual LED */
1450 .pwm_assign = 0, /* 1 = Enables PWM mode */
1451
1452 .bl_fade_in = ADP8870_FADE_T_1200ms, /* Backlight Fade-In Timer */
1453 .bl_fade_out = ADP8870_FADE_T_1200ms, /* Backlight Fade-Out Timer */
1454 .bl_fade_law = ADP8870_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
1455
1456 .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
1457 .abml_filt = ADP8870_BL_AMBL_FILT_320ms, /* Light sensor filter time */
1458
1459 .l1_daylight_max = ADP8870_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1460 .l1_daylight_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1461 .l2_bright_max = ADP8870_BL_CUR_mA(14), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1462 .l2_bright_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1463 .l3_office_max = ADP8870_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1464 .l3_office_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1465 .l4_indoor_max = ADP8870_BL_CUR_mA(3), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1466 .l4_indor_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1467 .l5_dark_max = ADP8870_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1468 .l5_dark_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1469
1470 .l2_trip = ADP8870_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
1471 .l2_hyst = ADP8870_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
1472 .l3_trip = ADP8870_L3_COMP_CURR_uA(389), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
1473 .l3_hyst = ADP8870_L3_COMP_CURR_uA(54), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
1474 .l4_trip = ADP8870_L4_COMP_CURR_uA(167), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
1475 .l4_hyst = ADP8870_L4_COMP_CURR_uA(16), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
1476 .l5_trip = ADP8870_L5_COMP_CURR_uA(43), /* use L5_COMP_CURR_uA(I) 0 <= I <= 138 uA */
1477 .l5_hyst = ADP8870_L5_COMP_CURR_uA(11), /* use L6_COMP_CURR_uA(I) 0 <= I <= 138 uA */
1478
1479 .leds = adp8870_leds,
1480 .num_leds = ARRAY_SIZE(adp8870_leds),
1481 .led_fade_law = ADP8870_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
1482 .led_fade_in = ADP8870_FADE_T_600ms,
1483 .led_fade_out = ADP8870_FADE_T_600ms,
1484 .led_on_time = ADP8870_LED_ONT_200ms,
1485};
1486#endif
1487
81d9c7f2 1488static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
5b7c5775 1489#if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
81d9c7f2 1490 {
427f277e 1491 I2C_BOARD_INFO("ad7142_captouch", 0x2C),
4c94c3e0 1492 .irq = IRQ_PG5,
5b7c5775 1493 .platform_data = (void *)&ad7142_i2c_platform_data,
81d9c7f2
BW		 1494 },
1495#endif
ebd58333 1496#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
81d9c7f2
BW		 1497 {
1498 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
81d9c7f2
BW		 1499 },
1500#endif
204844eb 1501#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
81d9c7f2
BW		 1502 {
1503 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
f5150155
MH		 1504 .irq = IRQ_PG6,
1505 },
1506#endif
1507#if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
1508 {
1509 I2C_BOARD_INFO("ad7879", 0x2F),
1510 .irq = IRQ_PG5,
1511 .platform_data = (void *)&bfin_ad7879_ts_info,
81d9c7f2
BW		 1512 },
1513#endif
51ed9ad7
MH		 1514#if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
1515 {
1516 I2C_BOARD_INFO("adp5588-keys", 0x34),
1517 .irq = IRQ_PG0,
1518 .platform_data = (void *)&adp5588_kpad_data,
1519 },
1520#endif
3ea57218
MH		 1521#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
1522 {
1523 I2C_BOARD_INFO("pmic-adp5520", 0x32),
4f84b6e0 1524 .irq = IRQ_PG0,
3ea57218
MH		 1525 .platform_data = (void *)&adp5520_pdev_data,
1526 },
1527#endif
ffc4d8bc
MH		 1528#if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
1529 {
1530 I2C_BOARD_INFO("adxl34x", 0x53),
1531 .irq = IRQ_PG3,
1532 .platform_data = (void *)&adxl34x_info,
1533 },
1534#endif
ba877d44
MH		 1535#if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
1536 {
1537 I2C_BOARD_INFO("adp5588-gpio", 0x34),
1538 .platform_data = (void *)&adp5588_gpio_data,
1539 },
1540#endif
50c4c086
MH		 1541#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
1542 {
1543 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
1544 },
1545#endif
ddcd7cb8
MH		 1546#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
1547 {
1548 I2C_BOARD_INFO("bf537-lq035-ad5280", 0x2C),
1549 },
1550#endif
78756c62
MH		 1551#if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
1552 {
1553 I2C_BOARD_INFO("adp8870", 0x2B),
1554 .platform_data = (void *)&adp8870_pdata,
1555 },
1556#endif
d53127ff
CC		 1557#if defined(CONFIG_SND_SOC_ADAU1371) || defined(CONFIG_SND_SOC_ADAU1371_MODULE)
1558 {
1559 I2C_BOARD_INFO("adau1371", 0x1A),
1560 },
1561#endif
04267638
CC		 1562#if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
1563 {
1564 I2C_BOARD_INFO("adau1761", 0x38),
1565 },
1566#endif
1f13f2fd
MH		 1567#if defined(CONFIG_AD525X_DPOT) || defined(CONFIG_AD525X_DPOT_MODULE)
1568 {
1569 I2C_BOARD_INFO("ad5258", 0x18),
1570 },
1571#endif
81d9c7f2 1572};
81d9c7f2 1573
1394f032
BW		 1574#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
1575static struct platform_device bfin_sport0_uart_device = {
1576 .name = "bfin-sport-uart",
1577 .id = 0,
1578};
1579
1580static struct platform_device bfin_sport1_uart_device = {
1581 .name = "bfin-sport-uart",
1582 .id = 1,
1583};
1584#endif
1585
c6c4d7bb 1586#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
2c8beb2c
MH		 1587#define CF_IDE_NAND_CARD_USE_HDD_INTERFACE
1588/* #define CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE */
c6c4d7bb 1589
2c8beb2c
MH		 1590#ifdef CF_IDE_NAND_CARD_USE_HDD_INTERFACE
1591#define PATA_INT IRQ_PF5
c6c4d7bb
BW		 1592static struct pata_platform_info bfin_pata_platform_data = {
1593 .ioport_shift = 1,
64e5c512 1594 .irq_flags = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
c6c4d7bb
BW		 1595};
1596
1597static struct resource bfin_pata_resources[] = {
1598 {
1599 .start = 0x20314020,
1600 .end = 0x2031403F,
1601 .flags = IORESOURCE_MEM,
1602 },
1603 {
1604 .start = 0x2031401C,
1605 .end = 0x2031401F,
1606 .flags = IORESOURCE_MEM,
1607 },
1608 {
1609 .start = PATA_INT,
1610 .end = PATA_INT,
1611 .flags = IORESOURCE_IRQ,
1612 },
1613};
2c8beb2c
MH		 1614#elif defined(CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE)
1615static struct pata_platform_info bfin_pata_platform_data = {
1616 .ioport_shift = 0,
1617};
648882d9
MH		 1618/* CompactFlash Storage Card Memory Mapped Adressing
1619 * /REG = A11 = 1
1620 */
2c8beb2c
MH		 1621static struct resource bfin_pata_resources[] = {
1622 {
648882d9
MH		 1623 .start = 0x20211800,
1624 .end = 0x20211807,
2c8beb2c
MH		 1625 .flags = IORESOURCE_MEM,
1626 },
1627 {
648882d9
MH		 1628 .start = 0x2021180E, /* Device Ctl */
1629 .end = 0x2021180E,
2c8beb2c
MH		 1630 .flags = IORESOURCE_MEM,
1631 },
1632};
1633#endif
c6c4d7bb
BW		 1634
1635static struct platform_device bfin_pata_device = {
1636 .name = "pata_platform",
1637 .id = -1,
1638 .num_resources = ARRAY_SIZE(bfin_pata_resources),
1639 .resource = bfin_pata_resources,
1640 .dev = {
1641 .platform_data = &bfin_pata_platform_data,
1642 }
1643};
1644#endif
1645
14b03204
MH		 1646static const unsigned int cclk_vlev_datasheet[] =
1647{
1648 VRPAIR(VLEV_085, 250000000),
1649 VRPAIR(VLEV_090, 376000000),
1650 VRPAIR(VLEV_095, 426000000),
1651 VRPAIR(VLEV_100, 426000000),
1652 VRPAIR(VLEV_105, 476000000),
1653 VRPAIR(VLEV_110, 476000000),
1654 VRPAIR(VLEV_115, 476000000),
1655 VRPAIR(VLEV_120, 500000000),
1656 VRPAIR(VLEV_125, 533000000),
1657 VRPAIR(VLEV_130, 600000000),
1658};
1659
1660static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
1661 .tuple_tab = cclk_vlev_datasheet,
1662 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
1663 .vr_settling_time = 25 /* us */,
1664};
1665
1666static struct platform_device bfin_dpmc = {
1667 .name = "bfin dpmc",
1668 .dev = {
1669 .platform_data = &bfin_dmpc_vreg_data,
1670 },
1671};
1672
8312440e
BS		 1673#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
1674static struct platform_device bfin_tdm = {
1675 .name = "bfin-tdm",
1676 /* TODO: add platform data here */
1677};
1678#endif
1679
1394f032 1680static struct platform_device *stamp_devices[] __initdata = {
14b03204
MH		 1681
1682 &bfin_dpmc,
1683
1394f032
BW		 1684#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
1685 &bfin_pcmcia_cf_device,
1686#endif
1687
1688#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
1689 &rtc_device,
1690#endif
1691
1692#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
1693 &sl811_hcd_device,
1694#endif
1695
1696#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
1697 &isp1362_hcd_device,
1698#endif
1699
3f375690
MH		 1700#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
1701 &bfin_isp1760_device,
1702#endif
1703
1394f032
BW		 1704#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
1705 &smc91x_device,
1706#endif
1707
f40d24d9
AL		 1708#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
1709 &dm9000_device,
1710#endif
1711
561cc18b
MH		 1712#if defined(CONFIG_AX88180) || defined(CONFIG_AX88180_MODULE)
1713 &ax88180_device,
1714#endif
1715
706a01b1
BS		 1716#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
1717 &bfin_can_device,
1718#endif
1719
1394f032 1720#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
65319628 1721 &bfin_mii_bus,
1394f032
BW		 1722 &bfin_mac_device,
1723#endif
1724
1725#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
1726 &net2272_bfin_device,
1727#endif
1728
1729#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
c6c4d7bb 1730 &bfin_spi0_device,
1394f032
BW		 1731#endif
1732
1e9aa955
CC		 1733#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
1734 &bfin_sport_spi0_device,
1735 &bfin_sport_spi1_device,
1736#endif
1737
1394f032
BW		 1738#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
1739 &bfin_fb_device,
1740#endif
1741
2043f3f7
MH		 1742#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1743 &bfin_lq035q1_device,
1744#endif
1745
1394f032
BW		 1746#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
1747 &bfin_uart_device,
1748#endif
1749
5be36d22 1750#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb
GY		 1751#ifdef CONFIG_BFIN_SIR0
1752 &bfin_sir0_device,
1753#endif
1754#ifdef CONFIG_BFIN_SIR1
1755 &bfin_sir1_device,
1756#endif
5be36d22
GY		 1757#endif
1758
1394f032
BW		 1759#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1760 &i2c_bfin_twi_device,
1761#endif
1762
1763#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
1764 &bfin_sport0_uart_device,
1765 &bfin_sport1_uart_device,
1766#endif
c6c4d7bb
BW		 1767
1768#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
1769 &bfin_pata_device,
1770#endif
2463ef22
MH		 1771
1772#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1773 &bfin_device_gpiokeys,
1774#endif
cad2ab65 1775
fc68911e
MF		 1776#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
1777 &bfin_async_nand_device,
1778#endif
1779
793dc27b 1780#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
de8c43f2 1781 &stamp_flash_device,
793dc27b 1782#endif
8312440e
BS		 1783
1784#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
1785 &bfin_tdm,
1786#endif
1394f032
BW		 1787};
1788
1789static int __init stamp_init(void)
1790{
b85d858b 1791 printk(KERN_INFO "%s(): registering device resources\n", __func__);
81d9c7f2
BW		 1792 i2c_register_board_info(0, bfin_i2c_board_info,
1793 ARRAY_SIZE(bfin_i2c_board_info));
fc68911e 1794 bfin_plat_nand_init();
1394f032 1795 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
5bda2723 1796 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
c6c4d7bb 1797
1394f032
BW		 1798 return 0;
1799}
1800
1801arch_initcall(stamp_init);
c6c4d7bb
BW		 1802
1803void native_machine_restart(char *cmd)
1804{
1805 /* workaround reboot hang when booting from SPI */
1806 if ((bfin_read_SYSCR() & 0x7) == 0x3)
b52dae31 1807 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
c6c4d7bb 1808}
137b1529
MF		 1809
1810/*
1811 * Currently the MAC address is saved in Flash by U-Boot
1812 */
1813#define FLASH_MAC 0x203f0000
9862cc52 1814void bfin_get_ether_addr(char *addr)
137b1529
MF		 1815{
1816 *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
1817 *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
1818}
9862cc52 1819EXPORT_SYMBOL(bfin_get_ether_addr);
Clone of davem's net-next-2.6 tree