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1394f032 BW |
1 | /* |
2 | * File: arch/blackfin/mach-bf537/boards/stamp.c | |
3 | * Based on: arch/blackfin/mach-bf533/boards/ezkit.c | |
4 | * Author: Aidan Williams <aidan@nicta.com.au> | |
5 | * | |
6 | * Created: | |
7 | * Description: | |
8 | * | |
9 | * Modified: | |
10 | * Copyright 2005 National ICT Australia (NICTA) | |
a628a8bc | 11 | * Copyright 2004-2008 Analog Devices Inc. |
1394f032 BW |
12 | * |
13 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or modify | |
16 | * it under the terms of the GNU General Public License as published by | |
17 | * the Free Software Foundation; either version 2 of the License, or | |
18 | * (at your option) any later version. | |
19 | * | |
20 | * This program is distributed in the hope that it will be useful, | |
21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
23 | * GNU General Public License for more details. | |
24 | * | |
25 | * You should have received a copy of the GNU General Public License | |
26 | * along with this program; if not, see the file COPYING, or write | |
27 | * to the Free Software Foundation, Inc., | |
28 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
29 | */ | |
30 | ||
31 | #include <linux/device.h> | |
43f73fef | 32 | #include <linux/etherdevice.h> |
1394f032 BW |
33 | #include <linux/platform_device.h> |
34 | #include <linux/mtd/mtd.h> | |
35 | #include <linux/mtd/partitions.h> | |
36 | #include <linux/spi/spi.h> | |
37 | #include <linux/spi/flash.h> | |
38 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
f02bcec5 | 39 | #include <linux/usb/isp1362.h> |
1394f032 | 40 | #endif |
1f83b8f1 | 41 | #include <linux/irq.h> |
c6c4d7bb | 42 | #include <asm/dma.h> |
1394f032 | 43 | #include <asm/bfin5xx_spi.h> |
5d448dd5 | 44 | #include <asm/portmux.h> |
27f5d75a | 45 | #include <linux/usb/sl811.h> |
1394f032 BW |
46 | |
47 | #include <linux/spi/ad7877.h> | |
48 | ||
49 | /* | |
50 | * Name the Board for the /proc/cpuinfo | |
51 | */ | |
fe85cad2 | 52 | const char bfin_board_name[] = "ADI PNAV-1.0"; |
1394f032 BW |
53 | |
54 | /* | |
55 | * Driver needs to know address, irq and flag pin. | |
56 | */ | |
57 | ||
58 | #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) | |
59 | static struct resource bfin_pcmcia_cf_resources[] = { | |
60 | { | |
61 | .start = 0x20310000, /* IO PORT */ | |
62 | .end = 0x20312000, | |
63 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 64 | }, { |
d2d50aa9 | 65 | .start = 0x20311000, /* Attribute Memory */ |
1394f032 BW |
66 | .end = 0x20311FFF, |
67 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 68 | }, { |
1394f032 BW |
69 | .start = IRQ_PF4, |
70 | .end = IRQ_PF4, | |
71 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, | |
1f83b8f1 | 72 | }, { |
1394f032 BW |
73 | .start = 6, /* Card Detect PF6 */ |
74 | .end = 6, | |
75 | .flags = IORESOURCE_IRQ, | |
76 | }, | |
77 | }; | |
78 | ||
79 | static struct platform_device bfin_pcmcia_cf_device = { | |
80 | .name = "bfin_cf_pcmcia", | |
81 | .id = -1, | |
82 | .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources), | |
83 | .resource = bfin_pcmcia_cf_resources, | |
84 | }; | |
85 | #endif | |
86 | ||
87 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | |
88 | static struct platform_device rtc_device = { | |
89 | .name = "rtc-bfin", | |
90 | .id = -1, | |
91 | }; | |
92 | #endif | |
93 | ||
94 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
61f09b5a MH |
95 | #include <linux/smc91x.h> |
96 | ||
97 | static struct smc91x_platdata smc91x_info = { | |
98 | .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, | |
99 | .leda = RPC_LED_100_10, | |
100 | .ledb = RPC_LED_TX_RX, | |
101 | }; | |
102 | ||
1394f032 BW |
103 | static struct resource smc91x_resources[] = { |
104 | { | |
105 | .name = "smc91x-regs", | |
106 | .start = 0x20300300, | |
107 | .end = 0x20300300 + 16, | |
108 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 109 | }, { |
1394f032 BW |
110 | |
111 | .start = IRQ_PF7, | |
112 | .end = IRQ_PF7, | |
113 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
114 | }, | |
115 | }; | |
116 | static struct platform_device smc91x_device = { | |
117 | .name = "smc91x", | |
118 | .id = 0, | |
119 | .num_resources = ARRAY_SIZE(smc91x_resources), | |
120 | .resource = smc91x_resources, | |
61f09b5a MH |
121 | .dev = { |
122 | .platform_data = &smc91x_info, | |
123 | }, | |
1394f032 BW |
124 | }; |
125 | #endif | |
126 | ||
127 | #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE) | |
128 | static struct resource sl811_hcd_resources[] = { | |
129 | { | |
130 | .start = 0x20340000, | |
131 | .end = 0x20340000, | |
132 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 133 | }, { |
1394f032 BW |
134 | .start = 0x20340004, |
135 | .end = 0x20340004, | |
136 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 137 | }, { |
1394f032 BW |
138 | .start = CONFIG_USB_SL811_BFIN_IRQ, |
139 | .end = CONFIG_USB_SL811_BFIN_IRQ, | |
140 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
141 | }, | |
142 | }; | |
143 | ||
144 | #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS) | |
145 | void sl811_port_power(struct device *dev, int is_on) | |
146 | { | |
c6c4d7bb | 147 | gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS"); |
acbcd263 | 148 | gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on); |
1394f032 | 149 | |
1394f032 BW |
150 | } |
151 | #endif | |
152 | ||
153 | static struct sl811_platform_data sl811_priv = { | |
154 | .potpg = 10, | |
155 | .power = 250, /* == 500mA */ | |
156 | #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS) | |
157 | .port_power = &sl811_port_power, | |
158 | #endif | |
159 | }; | |
160 | ||
161 | static struct platform_device sl811_hcd_device = { | |
162 | .name = "sl811-hcd", | |
163 | .id = 0, | |
164 | .dev = { | |
165 | .platform_data = &sl811_priv, | |
166 | }, | |
167 | .num_resources = ARRAY_SIZE(sl811_hcd_resources), | |
168 | .resource = sl811_hcd_resources, | |
169 | }; | |
170 | #endif | |
171 | ||
172 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
173 | static struct resource isp1362_hcd_resources[] = { | |
174 | { | |
175 | .start = 0x20360000, | |
176 | .end = 0x20360000, | |
177 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 178 | }, { |
1394f032 BW |
179 | .start = 0x20360004, |
180 | .end = 0x20360004, | |
181 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 182 | }, { |
1394f032 BW |
183 | .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ, |
184 | .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ, | |
185 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
186 | }, | |
187 | }; | |
188 | ||
189 | static struct isp1362_platform_data isp1362_priv = { | |
190 | .sel15Kres = 1, | |
191 | .clknotstop = 0, | |
192 | .oc_enable = 0, | |
193 | .int_act_high = 0, | |
194 | .int_edge_triggered = 0, | |
195 | .remote_wakeup_connected = 0, | |
196 | .no_power_switching = 1, | |
197 | .power_switching_mode = 0, | |
198 | }; | |
199 | ||
200 | static struct platform_device isp1362_hcd_device = { | |
201 | .name = "isp1362-hcd", | |
202 | .id = 0, | |
203 | .dev = { | |
204 | .platform_data = &isp1362_priv, | |
205 | }, | |
206 | .num_resources = ARRAY_SIZE(isp1362_hcd_resources), | |
207 | .resource = isp1362_hcd_resources, | |
208 | }; | |
209 | #endif | |
210 | ||
211 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | |
65319628 GY |
212 | static struct platform_device bfin_mii_bus = { |
213 | .name = "bfin_mii_bus", | |
214 | }; | |
215 | ||
1394f032 BW |
216 | static struct platform_device bfin_mac_device = { |
217 | .name = "bfin_mac", | |
65319628 | 218 | .dev.platform_data = &bfin_mii_bus, |
1394f032 BW |
219 | }; |
220 | #endif | |
221 | ||
222 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) | |
223 | static struct resource net2272_bfin_resources[] = { | |
224 | { | |
225 | .start = 0x20300000, | |
226 | .end = 0x20300000 + 0x100, | |
227 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 228 | }, { |
1394f032 BW |
229 | .start = IRQ_PF7, |
230 | .end = IRQ_PF7, | |
231 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
232 | }, | |
233 | }; | |
234 | ||
235 | static struct platform_device net2272_bfin_device = { | |
236 | .name = "net2272", | |
237 | .id = -1, | |
238 | .num_resources = ARRAY_SIZE(net2272_bfin_resources), | |
239 | .resource = net2272_bfin_resources, | |
240 | }; | |
241 | #endif | |
242 | ||
243 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
244 | /* all SPI peripherals info goes here */ | |
245 | ||
246 | #if defined(CONFIG_MTD_M25P80) \ | |
247 | || defined(CONFIG_MTD_M25P80_MODULE) | |
248 | static struct mtd_partition bfin_spi_flash_partitions[] = { | |
249 | { | |
aa582977 | 250 | .name = "bootloader(spi)", |
1394f032 BW |
251 | .size = 0x00020000, |
252 | .offset = 0, | |
253 | .mask_flags = MTD_CAP_ROM | |
1f83b8f1 | 254 | }, { |
aa582977 | 255 | .name = "linux kernel(spi)", |
1394f032 BW |
256 | .size = 0xe0000, |
257 | .offset = 0x20000 | |
1f83b8f1 | 258 | }, { |
aa582977 | 259 | .name = "file system(spi)", |
1394f032 BW |
260 | .size = 0x700000, |
261 | .offset = 0x00100000, | |
262 | } | |
263 | }; | |
264 | ||
265 | static struct flash_platform_data bfin_spi_flash_data = { | |
266 | .name = "m25p80", | |
267 | .parts = bfin_spi_flash_partitions, | |
268 | .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), | |
269 | .type = "m25p64", | |
270 | }; | |
271 | ||
272 | /* SPI flash chip (m25p64) */ | |
273 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | |
274 | .enable_dma = 0, /* use dma transfer with this chip*/ | |
275 | .bits_per_word = 8, | |
276 | }; | |
277 | #endif | |
278 | ||
a261eec0 MF |
279 | #if defined(CONFIG_BFIN_SPI_ADC) \ |
280 | || defined(CONFIG_BFIN_SPI_ADC_MODULE) | |
1394f032 BW |
281 | /* SPI ADC chip */ |
282 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | |
283 | .enable_dma = 1, /* use dma transfer with this chip*/ | |
284 | .bits_per_word = 16, | |
285 | }; | |
286 | #endif | |
287 | ||
288 | #if defined(CONFIG_SND_BLACKFIN_AD1836) \ | |
289 | || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
290 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | |
291 | .enable_dma = 0, | |
292 | .bits_per_word = 16, | |
293 | }; | |
294 | #endif | |
295 | ||
f3f704d3 MH |
296 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
297 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { | |
298 | .enable_dma = 0, | |
1394f032 BW |
299 | .bits_per_word = 8, |
300 | }; | |
301 | #endif | |
302 | ||
1394f032 BW |
303 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) |
304 | static struct bfin5xx_spi_chip spi_ad7877_chip_info = { | |
c7d48966 | 305 | .cs_change_per_word = 0, |
1394f032 BW |
306 | .enable_dma = 0, |
307 | .bits_per_word = 16, | |
308 | }; | |
309 | ||
310 | static const struct ad7877_platform_data bfin_ad7877_ts_info = { | |
311 | .model = 7877, | |
312 | .vref_delay_usecs = 50, /* internal, no capacitor */ | |
313 | .x_plate_ohms = 419, | |
314 | .y_plate_ohms = 486, | |
315 | .pressure_max = 1000, | |
316 | .pressure_min = 0, | |
317 | .stopacq_polarity = 1, | |
318 | .first_conversion_delay = 3, | |
319 | .acquisition_time = 1, | |
320 | .averaging = 1, | |
321 | .pen_down_acc_interval = 1, | |
322 | }; | |
323 | #endif | |
324 | ||
325 | static struct spi_board_info bfin_spi_board_info[] __initdata = { | |
326 | #if defined(CONFIG_MTD_M25P80) \ | |
327 | || defined(CONFIG_MTD_M25P80_MODULE) | |
328 | { | |
329 | /* the modalias must be the same as spi device driver name */ | |
330 | .modalias = "m25p80", /* Name of spi_driver for this device */ | |
331 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 332 | .bus_num = 0, /* Framework bus number */ |
1394f032 BW |
333 | .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/ |
334 | .platform_data = &bfin_spi_flash_data, | |
335 | .controller_data = &spi_flash_chip_info, | |
336 | .mode = SPI_MODE_3, | |
337 | }, | |
338 | #endif | |
339 | ||
a261eec0 MF |
340 | #if defined(CONFIG_BFIN_SPI_ADC) \ |
341 | || defined(CONFIG_BFIN_SPI_ADC_MODULE) | |
1394f032 BW |
342 | { |
343 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | |
344 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 345 | .bus_num = 0, /* Framework bus number */ |
1394f032 BW |
346 | .chip_select = 1, /* Framework chip select. */ |
347 | .platform_data = NULL, /* No spi_driver specific config */ | |
348 | .controller_data = &spi_adc_chip_info, | |
349 | }, | |
350 | #endif | |
351 | ||
352 | #if defined(CONFIG_SND_BLACKFIN_AD1836) \ | |
353 | || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
354 | { | |
dac98174 | 355 | .modalias = "ad1836", |
1394f032 | 356 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
c6c4d7bb | 357 | .bus_num = 0, |
1394f032 BW |
358 | .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, |
359 | .controller_data = &ad1836_spi_chip_info, | |
360 | }, | |
361 | #endif | |
f3f704d3 | 362 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
1394f032 | 363 | { |
f3f704d3 | 364 | .modalias = "mmc_spi", |
1394f032 | 365 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ |
c6c4d7bb | 366 | .bus_num = 0, |
f3f704d3 MH |
367 | .chip_select = 5, |
368 | .controller_data = &mmc_spi_chip_info, | |
1394f032 BW |
369 | .mode = SPI_MODE_3, |
370 | }, | |
371 | #endif | |
1394f032 BW |
372 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) |
373 | { | |
374 | .modalias = "ad7877", | |
375 | .platform_data = &bfin_ad7877_ts_info, | |
376 | .irq = IRQ_PF2, | |
377 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
c7d48966 | 378 | .bus_num = 0, |
1394f032 BW |
379 | .chip_select = 5, |
380 | .controller_data = &spi_ad7877_chip_info, | |
381 | }, | |
382 | #endif | |
383 | ||
384 | }; | |
385 | ||
c6c4d7bb BW |
386 | /* SPI (0) */ |
387 | static struct resource bfin_spi0_resource[] = { | |
388 | [0] = { | |
389 | .start = SPI0_REGBASE, | |
390 | .end = SPI0_REGBASE + 0xFF, | |
391 | .flags = IORESOURCE_MEM, | |
392 | }, | |
393 | [1] = { | |
394 | .start = CH_SPI, | |
395 | .end = CH_SPI, | |
53122693 YL |
396 | .flags = IORESOURCE_DMA, |
397 | }, | |
398 | [2] = { | |
399 | .start = IRQ_SPI, | |
400 | .end = IRQ_SPI, | |
c6c4d7bb | 401 | .flags = IORESOURCE_IRQ, |
53122693 | 402 | }, |
c6c4d7bb BW |
403 | }; |
404 | ||
1394f032 | 405 | /* SPI controller data */ |
c6c4d7bb | 406 | static struct bfin5xx_spi_master bfin_spi0_info = { |
1394f032 BW |
407 | .num_chipselect = 8, |
408 | .enable_dma = 1, /* master has the ability to do dma transfer */ | |
5d448dd5 | 409 | .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, |
1394f032 BW |
410 | }; |
411 | ||
c6c4d7bb BW |
412 | static struct platform_device bfin_spi0_device = { |
413 | .name = "bfin-spi", | |
414 | .id = 0, /* Bus number */ | |
415 | .num_resources = ARRAY_SIZE(bfin_spi0_resource), | |
416 | .resource = bfin_spi0_resource, | |
1394f032 | 417 | .dev = { |
c6c4d7bb | 418 | .platform_data = &bfin_spi0_info, /* Passed to driver */ |
1394f032 BW |
419 | }, |
420 | }; | |
421 | #endif /* spi master and devices */ | |
422 | ||
423 | #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) | |
424 | static struct platform_device bfin_fb_device = { | |
c6c4d7bb | 425 | .name = "bf537-lq035", |
1394f032 BW |
426 | }; |
427 | #endif | |
428 | ||
429 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | |
430 | static struct resource bfin_uart_resources[] = { | |
431 | { | |
432 | .start = 0xFFC00400, | |
433 | .end = 0xFFC004FF, | |
434 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 435 | }, { |
1394f032 BW |
436 | .start = 0xFFC02000, |
437 | .end = 0xFFC020FF, | |
438 | .flags = IORESOURCE_MEM, | |
439 | }, | |
440 | }; | |
441 | ||
442 | static struct platform_device bfin_uart_device = { | |
443 | .name = "bfin-uart", | |
444 | .id = 1, | |
445 | .num_resources = ARRAY_SIZE(bfin_uart_resources), | |
446 | .resource = bfin_uart_resources, | |
447 | }; | |
448 | #endif | |
449 | ||
5be36d22 | 450 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) |
5be36d22 | 451 | #ifdef CONFIG_BFIN_SIR0 |
42bd8bcb | 452 | static struct resource bfin_sir0_resources[] = { |
5be36d22 GY |
453 | { |
454 | .start = 0xFFC00400, | |
455 | .end = 0xFFC004FF, | |
456 | .flags = IORESOURCE_MEM, | |
457 | }, | |
42bd8bcb GY |
458 | { |
459 | .start = IRQ_UART0_RX, | |
460 | .end = IRQ_UART0_RX+1, | |
461 | .flags = IORESOURCE_IRQ, | |
462 | }, | |
463 | { | |
464 | .start = CH_UART0_RX, | |
465 | .end = CH_UART0_RX+1, | |
466 | .flags = IORESOURCE_DMA, | |
467 | }, | |
468 | }; | |
469 | ||
470 | static struct platform_device bfin_sir0_device = { | |
471 | .name = "bfin_sir", | |
472 | .id = 0, | |
473 | .num_resources = ARRAY_SIZE(bfin_sir0_resources), | |
474 | .resource = bfin_sir0_resources, | |
475 | }; | |
5be36d22 GY |
476 | #endif |
477 | #ifdef CONFIG_BFIN_SIR1 | |
42bd8bcb | 478 | static struct resource bfin_sir1_resources[] = { |
5be36d22 GY |
479 | { |
480 | .start = 0xFFC02000, | |
481 | .end = 0xFFC020FF, | |
482 | .flags = IORESOURCE_MEM, | |
483 | }, | |
42bd8bcb GY |
484 | { |
485 | .start = IRQ_UART1_RX, | |
486 | .end = IRQ_UART1_RX+1, | |
487 | .flags = IORESOURCE_IRQ, | |
488 | }, | |
489 | { | |
490 | .start = CH_UART1_RX, | |
491 | .end = CH_UART1_RX+1, | |
492 | .flags = IORESOURCE_DMA, | |
493 | }, | |
5be36d22 GY |
494 | }; |
495 | ||
42bd8bcb | 496 | static struct platform_device bfin_sir1_device = { |
5be36d22 | 497 | .name = "bfin_sir", |
42bd8bcb GY |
498 | .id = 1, |
499 | .num_resources = ARRAY_SIZE(bfin_sir1_resources), | |
500 | .resource = bfin_sir1_resources, | |
5be36d22 GY |
501 | }; |
502 | #endif | |
42bd8bcb | 503 | #endif |
1394f032 BW |
504 | |
505 | static struct platform_device *stamp_devices[] __initdata = { | |
506 | #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) | |
507 | &bfin_pcmcia_cf_device, | |
508 | #endif | |
509 | ||
510 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | |
511 | &rtc_device, | |
512 | #endif | |
513 | ||
514 | #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE) | |
515 | &sl811_hcd_device, | |
516 | #endif | |
517 | ||
518 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
519 | &isp1362_hcd_device, | |
520 | #endif | |
521 | ||
522 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
523 | &smc91x_device, | |
524 | #endif | |
525 | ||
526 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | |
65319628 | 527 | &bfin_mii_bus, |
1394f032 BW |
528 | &bfin_mac_device, |
529 | #endif | |
530 | ||
531 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) | |
532 | &net2272_bfin_device, | |
533 | #endif | |
534 | ||
535 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
c6c4d7bb | 536 | &bfin_spi0_device, |
1394f032 BW |
537 | #endif |
538 | ||
539 | #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) | |
540 | &bfin_fb_device, | |
541 | #endif | |
542 | ||
543 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | |
544 | &bfin_uart_device, | |
545 | #endif | |
5be36d22 GY |
546 | |
547 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) | |
42bd8bcb GY |
548 | #ifdef CONFIG_BFIN_SIR0 |
549 | &bfin_sir0_device, | |
550 | #endif | |
551 | #ifdef CONFIG_BFIN_SIR1 | |
552 | &bfin_sir1_device, | |
553 | #endif | |
5be36d22 | 554 | #endif |
1394f032 BW |
555 | }; |
556 | ||
7f6678c5 | 557 | static int __init pnav_init(void) |
1394f032 | 558 | { |
b85d858b | 559 | printk(KERN_INFO "%s(): registering device resources\n", __func__); |
1394f032 BW |
560 | platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); |
561 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
562 | spi_register_board_info(bfin_spi_board_info, | |
563 | ARRAY_SIZE(bfin_spi_board_info)); | |
564 | #endif | |
565 | return 0; | |
566 | } | |
567 | ||
7f6678c5 | 568 | arch_initcall(pnav_init); |
137b1529 | 569 | |
9862cc52 | 570 | void bfin_get_ether_addr(char *addr) |
137b1529 MF |
571 | { |
572 | random_ether_addr(addr); | |
573 | printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__); | |
574 | } | |
9862cc52 | 575 | EXPORT_SYMBOL(bfin_get_ether_addr); |