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Blackfin: rename AD1836 to AD183X in board files
[net-next-2.6.git] / arch / blackfin / mach-bf533 / boards / stamp.c
CommitLineData
1394f032 1/*
96f1050d
RG		 2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
1394f032 5 *
96f1050d 6 * Licensed under the GPL-2 or later.
1394f032
BW		 7 */
8
9#include <linux/device.h>
10#include <linux/platform_device.h>
11#include <linux/mtd/mtd.h>
12#include <linux/mtd/partitions.h>
de8c43f2 13#include <linux/mtd/physmap.h>
1394f032
BW		 14#include <linux/spi/spi.h>
15#include <linux/spi/flash.h>
2120b68f 16#include <linux/spi/mmc_spi.h>
1394f032 17#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
f02bcec5 18#include <linux/usb/isp1362.h>
1394f032 19#endif
1f83b8f1 20#include <linux/irq.h>
81d9c7f2 21#include <linux/i2c.h>
c6c4d7bb 22#include <asm/dma.h>
1394f032 23#include <asm/bfin5xx_spi.h>
c6c4d7bb 24#include <asm/reboot.h>
5d448dd5 25#include <asm/portmux.h>
14b03204 26#include <asm/dpmc.h>
1394f032
BW		 27
28/*
29 * Name the Board for the /proc/cpuinfo
30 */
fe85cad2 31const char bfin_board_name[] = "ADI BF533-STAMP";
1394f032
BW		 32
33#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
34static struct platform_device rtc_device = {
35 .name = "rtc-bfin",
36 .id = -1,
37};
38#endif
39
40/*
41 * Driver needs to know address, irq and flag pin.
42 */
43#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
61f09b5a
MH		 44#include <linux/smc91x.h>
45
46static struct smc91x_platdata smc91x_info = {
47 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
48 .leda = RPC_LED_100_10,
49 .ledb = RPC_LED_TX_RX,
50};
51
1394f032
BW		 52static struct resource smc91x_resources[] = {
53 {
54 .name = "smc91x-regs",
55 .start = 0x20300300,
56 .end = 0x20300300 + 16,
57 .flags = IORESOURCE_MEM,
1f83b8f1 58 }, {
1394f032
BW		 59 .start = IRQ_PF7,
60 .end = IRQ_PF7,
61 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
62 },
63};
64
65static struct platform_device smc91x_device = {
66 .name = "smc91x",
67 .id = 0,
68 .num_resources = ARRAY_SIZE(smc91x_resources),
69 .resource = smc91x_resources,
61f09b5a
MH		 70 .dev = {
71 .platform_data = &smc91x_info,
72 },
1394f032
BW		 73};
74#endif
75
76#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
77static struct resource net2272_bfin_resources[] = {
78 {
79 .start = 0x20300000,
80 .end = 0x20300000 + 0x100,
81 .flags = IORESOURCE_MEM,
1f83b8f1 82 }, {
1394f032
BW		 83 .start = IRQ_PF10,
84 .end = IRQ_PF10,
85 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
86 },
87};
88
89static struct platform_device net2272_bfin_device = {
90 .name = "net2272",
91 .id = -1,
92 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
93 .resource = net2272_bfin_resources,
94};
95#endif
96
9cd9c616 97#if defined(CONFIG_MTD_BFIN_ASYNC) || defined(CONFIG_MTD_BFIN_ASYNC_MODULE)
de8c43f2
MF		 98static struct mtd_partition stamp_partitions[] = {
99 {
aa582977 100 .name = "bootloader(nor)",
edf05641 101 .size = 0x40000,
de8c43f2
MF		 102 .offset = 0,
103 }, {
aa582977 104 .name = "linux kernel(nor)",
6ecb5b6d 105 .size = 0x180000,
de8c43f2
MF		 106 .offset = MTDPART_OFS_APPEND,
107 }, {
aa582977 108 .name = "file system(nor)",
de8c43f2
MF		 109 .size = MTDPART_SIZ_FULL,
110 .offset = MTDPART_OFS_APPEND,
111 }
112};
113
114static struct physmap_flash_data stamp_flash_data = {
115 .width = 2,
116 .parts = stamp_partitions,
117 .nr_parts = ARRAY_SIZE(stamp_partitions),
118};
119
120static struct resource stamp_flash_resource[] = {
121 {
122 .name = "cfi_probe",
123 .start = 0x20000000,
124 .end = 0x203fffff,
125 .flags = IORESOURCE_MEM,
126 }, {
9cd9c616
MF		 127 .start = 0x7BB07BB0, /* AMBCTL0 setting when accessing flash */
128 .end = 0x7BB07BB0, /* AMBCTL1 setting when accessing flash */
129 .flags = IORESOURCE_MEM,
130 }, {
131 .start = GPIO_PF0,
de8c43f2
MF		 132 .flags = IORESOURCE_IRQ,
133 }
134};
135
136static struct platform_device stamp_flash_device = {
9cd9c616 137 .name = "bfin-async-flash",
de8c43f2
MF		 138 .id = 0,
139 .dev = {
140 .platform_data = &stamp_flash_data,
141 },
142 .num_resources = ARRAY_SIZE(stamp_flash_resource),
143 .resource = stamp_flash_resource,
144};
793dc27b 145#endif
de8c43f2 146
1394f032
BW		 147#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
148static struct mtd_partition bfin_spi_flash_partitions[] = {
149 {
aa582977 150 .name = "bootloader(spi)",
edf05641 151 .size = 0x00040000,
1394f032
BW		 152 .offset = 0,
153 .mask_flags = MTD_CAP_ROM
1f83b8f1 154 }, {
aa582977 155 .name = "linux kernel(spi)",
6ecb5b6d 156 .size = 0x180000,
edf05641 157 .offset = MTDPART_OFS_APPEND,
1f83b8f1 158 }, {
aa582977 159 .name = "file system(spi)",
edf05641
MF		 160 .size = MTDPART_SIZ_FULL,
161 .offset = MTDPART_OFS_APPEND,
1394f032
BW		 162 }
163};
164
165static struct flash_platform_data bfin_spi_flash_data = {
166 .name = "m25p80",
167 .parts = bfin_spi_flash_partitions,
168 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
169 .type = "m25p64",
170};
171
172/* SPI flash chip (m25p64) */
173static struct bfin5xx_spi_chip spi_flash_chip_info = {
174 .enable_dma = 0, /* use dma transfer with this chip*/
175 .bits_per_word = 8,
176};
177#endif
178
a261eec0 179#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
1394f032
BW		 180/* SPI ADC chip */
181static struct bfin5xx_spi_chip spi_adc_chip_info = {
182 .enable_dma = 1, /* use dma transfer with this chip*/
183 .bits_per_word = 16,
184};
185#endif
186
d40bd71f 187#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
1394f032
BW		 188static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
189 .enable_dma = 0,
190 .bits_per_word = 16,
191};
192#endif
193
6e668936
MH		 194#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
195static struct bfin5xx_spi_chip spidev_chip_info = {
196 .enable_dma = 0,
197 .bits_per_word = 8,
198};
199#endif
200
2120b68f
YL		 201#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
202#define MMC_SPI_CARD_DETECT_INT IRQ_PF5
203static int bfin_mmc_spi_init(struct device *dev,
204 irqreturn_t (*detect_int)(int, void *), void *data)
205{
206 return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
207 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
208 "mmc-spi-detect", data);
209}
210
211static void bfin_mmc_spi_exit(struct device *dev, void *data)
212{
213 free_irq(MMC_SPI_CARD_DETECT_INT, data);
214}
215
216static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
217 .init = bfin_mmc_spi_init,
218 .exit = bfin_mmc_spi_exit,
219 .detect_delay = 100, /* msecs */
220};
221
222static struct bfin5xx_spi_chip mmc_spi_chip_info = {
223 .enable_dma = 0,
224 .bits_per_word = 8,
225 .pio_interrupt = 0,
226};
227#endif
228
1394f032
BW		 229static struct spi_board_info bfin_spi_board_info[] __initdata = {
230#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
231 {
232 /* the modalias must be the same as spi device driver name */
233 .modalias = "m25p80", /* Name of spi_driver for this device */
234 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 235 .bus_num = 0, /* Framework bus number */
1394f032
BW		 236 .chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
237 .platform_data = &bfin_spi_flash_data,
238 .controller_data = &spi_flash_chip_info,
239 .mode = SPI_MODE_3,
240 },
241#endif
242
a261eec0 243#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
1394f032
BW		 244 {
245 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
246 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 247 .bus_num = 0, /* Framework bus number */
1394f032
BW		 248 .chip_select = 1, /* Framework chip select. */
249 .platform_data = NULL, /* No spi_driver specific config */
250 .controller_data = &spi_adc_chip_info,
251 },
252#endif
253
d40bd71f 254#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
1394f032 255 {
dac98174 256 .modalias = "ad1836",
858c5e9a 257 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 258 .bus_num = 0,
1394f032
BW		 259 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
260 .controller_data = &ad1836_spi_chip_info,
261 },
262#endif
263
6e668936
MH		 264#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
265 {
266 .modalias = "spidev",
267 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
268 .bus_num = 0,
269 .chip_select = 1,
270 .controller_data = &spidev_chip_info,
271 },
272#endif
2120b68f
YL		 273#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
274 {
275 .modalias = "mmc_spi",
276 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
277 .bus_num = 0,
278 .chip_select = 4,
279 .platform_data = &bfin_mmc_spi_pdata,
280 .controller_data = &mmc_spi_chip_info,
281 .mode = SPI_MODE_3,
282 },
283#endif
1394f032
BW		 284};
285
5bda2723 286#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
c6c4d7bb
BW		 287/* SPI (0) */
288static struct resource bfin_spi0_resource[] = {
289 [0] = {
290 .start = SPI0_REGBASE,
291 .end = SPI0_REGBASE + 0xFF,
292 .flags = IORESOURCE_MEM,
293 },
294 [1] = {
295 .start = CH_SPI,
296 .end = CH_SPI,
53122693
YL		 297 .flags = IORESOURCE_DMA,
298 },
299 [2] = {
300 .start = IRQ_SPI,
301 .end = IRQ_SPI,
c6c4d7bb
BW		 302 .flags = IORESOURCE_IRQ,
303 }
304};
305
1394f032 306/* SPI controller data */
c6c4d7bb 307static struct bfin5xx_spi_master bfin_spi0_info = {
1394f032
BW		 308 .num_chipselect = 8,
309 .enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5 310 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1394f032
BW		 311};
312
c6c4d7bb
BW		 313static struct platform_device bfin_spi0_device = {
314 .name = "bfin-spi",
315 .id = 0, /* Bus number */
316 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
317 .resource = bfin_spi0_resource,
1394f032 318 .dev = {
c6c4d7bb 319 .platform_data = &bfin_spi0_info, /* Passed to driver */
1394f032
BW		 320 },
321};
322#endif /* spi master and devices */
323
1394f032 324#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
6bd1fbea
SZ		 325#ifdef CONFIG_SERIAL_BFIN_UART0
326static struct resource bfin_uart0_resources[] = {
1394f032 327 {
6bd1fbea
SZ		 328 .start = BFIN_UART_THR,
329 .end = BFIN_UART_GCTL+2,
1394f032
BW		 330 .flags = IORESOURCE_MEM,
331 },
6bd1fbea
SZ		 332 {
333 .start = IRQ_UART0_RX,
334 .end = IRQ_UART0_RX + 1,
335 .flags = IORESOURCE_IRQ,
336 },
337 {
338 .start = IRQ_UART0_ERROR,
339 .end = IRQ_UART0_ERROR,
340 .flags = IORESOURCE_IRQ,
341 },
342 {
343 .start = CH_UART0_TX,
344 .end = CH_UART0_TX,
345 .flags = IORESOURCE_DMA,
346 },
347 {
348 .start = CH_UART0_RX,
349 .end = CH_UART0_RX,
350 .flags = IORESOURCE_DMA,
351 },
352};
353
354unsigned short bfin_uart0_peripherals[] = {
355 P_UART0_TX, P_UART0_RX, 0
1394f032
BW		 356};
357
6bd1fbea 358static struct platform_device bfin_uart0_device = {
1394f032 359 .name = "bfin-uart",
6bd1fbea
SZ		 360 .id = 0,
361 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
362 .resource = bfin_uart0_resources,
363 .dev = {
364 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
365 },
1394f032
BW		 366};
367#endif
6bd1fbea 368#endif
1394f032 369
5be36d22 370#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
5be36d22 371#ifdef CONFIG_BFIN_SIR0
42bd8bcb 372static struct resource bfin_sir0_resources[] = {
5be36d22
GY		 373 {
374 .start = 0xFFC00400,
375 .end = 0xFFC004FF,
376 .flags = IORESOURCE_MEM,
377 },
42bd8bcb
GY		 378 {
379 .start = IRQ_UART0_RX,
380 .end = IRQ_UART0_RX+1,
381 .flags = IORESOURCE_IRQ,
382 },
383 {
384 .start = CH_UART0_RX,
385 .end = CH_UART0_RX+1,
386 .flags = IORESOURCE_DMA,
387 },
5be36d22
GY		 388};
389
42bd8bcb 390static struct platform_device bfin_sir0_device = {
5be36d22
GY		 391 .name = "bfin_sir",
392 .id = 0,
42bd8bcb
GY		 393 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
394 .resource = bfin_sir0_resources,
5be36d22
GY		 395};
396#endif
42bd8bcb 397#endif
5be36d22 398
1394f032 399#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
df5de261
SZ		 400#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
401static struct resource bfin_sport0_uart_resources[] = {
402 {
403 .start = SPORT0_TCR1,
404 .end = SPORT0_MRCS3+4,
405 .flags = IORESOURCE_MEM,
406 },
407 {
408 .start = IRQ_SPORT0_RX,
409 .end = IRQ_SPORT0_RX+1,
410 .flags = IORESOURCE_IRQ,
411 },
412 {
413 .start = IRQ_SPORT0_ERROR,
414 .end = IRQ_SPORT0_ERROR,
415 .flags = IORESOURCE_IRQ,
416 },
417};
418
419unsigned short bfin_sport0_peripherals[] = {
420 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
421 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
422};
423
1394f032
BW		 424static struct platform_device bfin_sport0_uart_device = {
425 .name = "bfin-sport-uart",
426 .id = 0,
df5de261
SZ		 427 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
428 .resource = bfin_sport0_uart_resources,
429 .dev = {
430 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
431 },
432};
433#endif
434#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
435static struct resource bfin_sport1_uart_resources[] = {
436 {
437 .start = SPORT1_TCR1,
438 .end = SPORT1_MRCS3+4,
439 .flags = IORESOURCE_MEM,
440 },
441 {
442 .start = IRQ_SPORT1_RX,
443 .end = IRQ_SPORT1_RX+1,
444 .flags = IORESOURCE_IRQ,
445 },
446 {
447 .start = IRQ_SPORT1_ERROR,
448 .end = IRQ_SPORT1_ERROR,
449 .flags = IORESOURCE_IRQ,
450 },
451};
452
453unsigned short bfin_sport1_peripherals[] = {
454 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
455 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
1394f032
BW		 456};
457
458static struct platform_device bfin_sport1_uart_device = {
459 .name = "bfin-sport-uart",
460 .id = 1,
df5de261
SZ		 461 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
462 .resource = bfin_sport1_uart_resources,
463 .dev = {
464 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
465 },
1394f032
BW		 466};
467#endif
df5de261 468#endif
1394f032 469
2463ef22
MH		 470#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
471#include <linux/input.h>
472#include <linux/gpio_keys.h>
473
474static struct gpio_keys_button bfin_gpio_keys_table[] = {
f1bceb47
MH		 475 {BTN_0, GPIO_PF5, 0, "gpio-keys: BTN0"},
476 {BTN_1, GPIO_PF6, 0, "gpio-keys: BTN1"},
477 {BTN_2, GPIO_PF8, 0, "gpio-keys: BTN2"},
2463ef22
MH		 478};
479
480static struct gpio_keys_platform_data bfin_gpio_keys_data = {
481 .buttons = bfin_gpio_keys_table,
482 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
483};
484
485static struct platform_device bfin_device_gpiokeys = {
486 .name = "gpio-keys",
487 .dev = {
488 .platform_data = &bfin_gpio_keys_data,
489 },
490};
491#endif
492
e3163954
BW		 493#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
494#include <linux/i2c-gpio.h>
495
496static struct i2c_gpio_platform_data i2c_gpio_data = {
497 .sda_pin = 2,
498 .scl_pin = 3,
499 .sda_is_open_drain = 0,
500 .scl_is_open_drain = 0,
501 .udelay = 40,
502};
503
504static struct platform_device i2c_gpio_device = {
505 .name = "i2c-gpio",
506 .id = 0,
507 .dev = {
508 .platform_data = &i2c_gpio_data,
509 },
510};
511#endif
512
81d9c7f2
BW		 513static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
514#if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE)
515 {
516 I2C_BOARD_INFO("ad7142_joystick", 0x2C),
81d9c7f2
BW		 517 .irq = 39,
518 },
519#endif
ebd58333 520#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
81d9c7f2
BW		 521 {
522 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
81d9c7f2
BW		 523 },
524#endif
204844eb 525#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
81d9c7f2
BW		 526 {
527 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
81d9c7f2
BW		 528 .irq = 39,
529 },
530#endif
50c4c086
MH		 531#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
532 {
533 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
534 },
535#endif
81d9c7f2 536};
81d9c7f2 537
14b03204
MH		 538static const unsigned int cclk_vlev_datasheet[] =
539{
540 VRPAIR(VLEV_085, 250000000),
541 VRPAIR(VLEV_090, 376000000),
542 VRPAIR(VLEV_095, 426000000),
543 VRPAIR(VLEV_100, 426000000),
544 VRPAIR(VLEV_105, 476000000),
545 VRPAIR(VLEV_110, 476000000),
546 VRPAIR(VLEV_115, 476000000),
547 VRPAIR(VLEV_120, 600000000),
548 VRPAIR(VLEV_125, 600000000),
549 VRPAIR(VLEV_130, 600000000),
550};
551
552static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
553 .tuple_tab = cclk_vlev_datasheet,
554 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
555 .vr_settling_time = 25 /* us */,
556};
557
558static struct platform_device bfin_dpmc = {
559 .name = "bfin dpmc",
560 .dev = {
561 .platform_data = &bfin_dmpc_vreg_data,
562 },
563};
564
7e1082b7
BS		 565#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
566static struct platform_device bfin_i2s = {
567 .name = "bfin-i2s",
568 .id = CONFIG_SND_BF5XX_SPORT_NUM,
569 /* TODO: add platform data here */
570};
571#endif
572
573#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
574static struct platform_device bfin_tdm = {
575 .name = "bfin-tdm",
576 .id = CONFIG_SND_BF5XX_SPORT_NUM,
577 /* TODO: add platform data here */
578};
579#endif
580
581#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
582static struct platform_device bfin_ac97 = {
583 .name = "bfin-ac97",
584 .id = CONFIG_SND_BF5XX_SPORT_NUM,
585 /* TODO: add platform data here */
586};
587#endif
588
1394f032 589static struct platform_device *stamp_devices[] __initdata = {
14b03204
MH		 590
591 &bfin_dpmc,
592
1394f032
BW		 593#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
594 &rtc_device,
595#endif
596
597#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
598 &smc91x_device,
599#endif
600
601#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
602 &net2272_bfin_device,
603#endif
604
605#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
c6c4d7bb 606 &bfin_spi0_device,
1394f032
BW		 607#endif
608
609#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
6bd1fbea
SZ		 610#ifdef CONFIG_SERIAL_BFIN_UART0
611 &bfin_uart0_device,
612#endif
1394f032
BW		 613#endif
614
5be36d22 615#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb
GY		 616#ifdef CONFIG_BFIN_SIR0
617 &bfin_sir0_device,
618#endif
5be36d22
GY		 619#endif
620
1394f032 621#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
df5de261 622#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1394f032 623 &bfin_sport0_uart_device,
df5de261
SZ		 624#endif
625#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1394f032
BW		 626 &bfin_sport1_uart_device,
627#endif
df5de261 628#endif
c6c4d7bb 629
2463ef22
MH		 630#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
631 &bfin_device_gpiokeys,
632#endif
e3163954
BW		 633
634#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
635 &i2c_gpio_device,
636#endif
cad2ab65 637
9cd9c616 638#if defined(CONFIG_MTD_BFIN_ASYNC) || defined(CONFIG_MTD_BFIN_ASYNC_MODULE)
de8c43f2 639 &stamp_flash_device,
793dc27b 640#endif
7e1082b7
BS		 641
642#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
643 &bfin_i2s,
644#endif
645
646#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
647 &bfin_tdm,
648#endif
649
650#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
651 &bfin_ac97,
652#endif
1394f032
BW		 653};
654
655static int __init stamp_init(void)
656{
c0fc525d
MF		 657 int ret;
658
b85d858b 659 printk(KERN_INFO "%s(): registering device resources\n", __func__);
81d9c7f2 660
81d9c7f2
BW		 661 i2c_register_board_info(0, bfin_i2c_board_info,
662 ARRAY_SIZE(bfin_i2c_board_info));
81d9c7f2 663
c0fc525d
MF		 664 ret = platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
665 if (ret < 0)
666 return ret;
667
668#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
c0fc525d 669 /* setup BF533_STAMP CPLD to route AMS3 to Ethernet MAC */
9cd9c616
MF		 670 bfin_write_FIO_DIR(bfin_read_FIO_DIR() | PF0);
671 bfin_write_FIO_FLAG_S(PF0);
c0fc525d 672 SSYNC();
c0fc525d
MF		 673#endif
674
5bda2723 675 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
c6c4d7bb 676 return 0;
1394f032
BW		 677}
678
679arch_initcall(stamp_init);
c6c4d7bb 680
c13ce9fd
SZ		 681static struct platform_device *stamp_early_devices[] __initdata = {
682#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
683#ifdef CONFIG_SERIAL_BFIN_UART0
684 &bfin_uart0_device,
685#endif
686#endif
687
688#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
689#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
690 &bfin_sport0_uart_device,
691#endif
692#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
693 &bfin_sport1_uart_device,
694#endif
695#endif
696};
697
698void __init native_machine_early_platform_add_devices(void)
699{
700 printk(KERN_INFO "register early platform devices\n");
701 early_platform_add_devices(stamp_early_devices,
702 ARRAY_SIZE(stamp_early_devices));
703}
704
c6c4d7bb
BW		 705void native_machine_restart(char *cmd)
706{
9cd9c616
MF		 707 /* workaround pull up on cpld / flash pin not being strong enough */
708 bfin_write_FIO_INEN(~PF0);
709 bfin_write_FIO_DIR(PF0);
710 bfin_write_FIO_FLAG_C(PF0);
c6c4d7bb 711}
Clone of davem's net-next-2.6 tree