]> bbs.cooldavid.org Git - net-next-2.6.git/blame - arch/blackfin/mach-bf527/boards/ezkit.c
git://bbs.cooldavid.org / net-next-2.6.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Blackfin: rename AD1836 to AD183X in board files
[net-next-2.6.git] / arch / blackfin / mach-bf527 / boards / ezkit.c
CommitLineData
59003145 1/*
96f1050d
RG		 2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
59003145 5 *
96f1050d 6 * Licensed under the GPL-2 or later.
59003145
MH		 7 */
8
9#include <linux/device.h>
10#include <linux/platform_device.h>
11#include <linux/mtd/mtd.h>
12#include <linux/mtd/partitions.h>
d7e5dd41 13#include <linux/mtd/physmap.h>
59003145
MH		 14#include <linux/spi/spi.h>
15#include <linux/spi/flash.h>
72268689 16#include <linux/i2c.h>
59003145
MH		 17#include <linux/irq.h>
18#include <linux/interrupt.h>
1089e228 19#include <linux/usb/musb.h>
6924dfb0
MH		 20#include <linux/leds.h>
21#include <linux/input.h>
59003145
MH		 22#include <asm/dma.h>
23#include <asm/bfin5xx_spi.h>
24#include <asm/reboot.h>
64307f7d 25#include <asm/nand.h>
5d448dd5 26#include <asm/portmux.h>
14b03204 27#include <asm/dpmc.h>
59003145
MH		 28#include <linux/spi/ad7877.h>
29
30/*
31 * Name the Board for the /proc/cpuinfo
32 */
6924dfb0
MH		 33#ifdef CONFIG_BFIN527_EZKIT_V2
34const char bfin_board_name[] = "ADI BF527-EZKIT V2";
35#else
fe85cad2 36const char bfin_board_name[] = "ADI BF527-EZKIT";
6924dfb0 37#endif
59003145
MH		 38
39/*
40 * Driver needs to know address, irq and flag pin.
41 */
42
59003145 43#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
3f375690
MH		 44#include <linux/usb/isp1760.h>
45static struct resource bfin_isp1760_resources[] = {
59003145 46 [0] = {
3f375690
MH		 47 .start = 0x203C0000,
48 .end = 0x203C0000 + 0x000fffff,
59003145
MH		 49 .flags = IORESOURCE_MEM,
50 },
51 [1] = {
3f375690
MH		 52 .start = IRQ_PF7,
53 .end = IRQ_PF7,
59003145
MH		 54 .flags = IORESOURCE_IRQ,
55 },
56};
57
3f375690
MH		 58static struct isp1760_platform_data isp1760_priv = {
59 .is_isp1761 = 0,
3f375690
MH		 60 .bus_width_16 = 1,
61 .port1_otg = 0,
62 .analog_oc = 0,
63 .dack_polarity_high = 0,
64 .dreq_polarity_high = 0,
59003145
MH		 65};
66
3f375690 67static struct platform_device bfin_isp1760_device = {
c6feb768 68 .name = "isp1760",
3f375690
MH		 69 .id = 0,
70 .dev = {
71 .platform_data = &isp1760_priv,
72 },
73 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
74 .resource = bfin_isp1760_resources,
59003145 75};
59003145
MH		 76#endif
77
1089e228
MH		 78#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
79static struct resource musb_resources[] = {
80 [0] = {
81 .start = 0xffc03800,
82 .end = 0xffc03cff,
83 .flags = IORESOURCE_MEM,
84 },
85 [1] = { /* general IRQ */
86 .start = IRQ_USB_INT0,
87 .end = IRQ_USB_INT0,
88 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
89 },
90 [2] = { /* DMA IRQ */
91 .start = IRQ_USB_DMA,
92 .end = IRQ_USB_DMA,
93 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
94 },
95};
96
50041acb
BW		 97static struct musb_hdrc_config musb_config = {
98 .multipoint = 0,
99 .dyn_fifo = 0,
100 .soft_con = 1,
101 .dma = 1,
fea05dac
BW		 102 .num_eps = 8,
103 .dma_channels = 8,
50041acb
BW		 104 .gpio_vrsel = GPIO_PG13,
105};
106
1089e228
MH		 107static struct musb_hdrc_platform_data musb_plat = {
108#if defined(CONFIG_USB_MUSB_OTG)
109 .mode = MUSB_OTG,
110#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
111 .mode = MUSB_HOST,
112#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
113 .mode = MUSB_PERIPHERAL,
114#endif
50041acb 115 .config = &musb_config,
1089e228
MH		 116};
117
118static u64 musb_dmamask = ~(u32)0;
119
120static struct platform_device musb_device = {
121 .name = "musb_hdrc",
122 .id = 0,
123 .dev = {
124 .dma_mask = &musb_dmamask,
125 .coherent_dma_mask = 0xffffffff,
126 .platform_data = &musb_plat,
127 },
128 .num_resources = ARRAY_SIZE(musb_resources),
129 .resource = musb_resources,
130};
131#endif
132
133#if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
134
135static struct resource bf52x_t350mcqb_resources[] = {
136 {
137 .start = IRQ_PPI_ERROR,
138 .end = IRQ_PPI_ERROR,
139 .flags = IORESOURCE_IRQ,
140 },
141};
142
143static struct platform_device bf52x_t350mcqb_device = {
144 .name = "bfin-t350mcqb",
145 .id = -1,
146 .num_resources = ARRAY_SIZE(bf52x_t350mcqb_resources),
147 .resource = bf52x_t350mcqb_resources,
148};
149#endif
150
6924dfb0
MH		 151#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
152#include <asm/bfin-lq035q1.h>
153
154static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
155 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
d94a1aa4 156 .ppi_mode = USE_RGB565_8_BIT_PPI,
6924dfb0
MH		 157};
158
159static struct resource bfin_lq035q1_resources[] = {
160 {
161 .start = IRQ_PPI_ERROR,
162 .end = IRQ_PPI_ERROR,
163 .flags = IORESOURCE_IRQ,
164 },
165};
166
167static struct platform_device bfin_lq035q1_device = {
168 .name = "bfin-lq035q1",
169 .id = -1,
170 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
171 .resource = bfin_lq035q1_resources,
172 .dev = {
173 .platform_data = &bfin_lq035q1_data,
174 },
175};
176#endif
177
d7e5dd41
MH		 178#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
179static struct mtd_partition ezkit_partitions[] = {
180 {
aa582977 181 .name = "bootloader(nor)",
d7e5dd41
MH		 182 .size = 0x40000,
183 .offset = 0,
184 }, {
aa582977 185 .name = "linux kernel(nor)",
d7e5dd41
MH		 186 .size = 0x1C0000,
187 .offset = MTDPART_OFS_APPEND,
188 }, {
aa582977 189 .name = "file system(nor)",
d7e5dd41
MH		 190 .size = MTDPART_SIZ_FULL,
191 .offset = MTDPART_OFS_APPEND,
192 }
193};
194
195static struct physmap_flash_data ezkit_flash_data = {
196 .width = 2,
197 .parts = ezkit_partitions,
198 .nr_parts = ARRAY_SIZE(ezkit_partitions),
199};
200
201static struct resource ezkit_flash_resource = {
202 .start = 0x20000000,
203 .end = 0x203fffff,
204 .flags = IORESOURCE_MEM,
205};
206
207static struct platform_device ezkit_flash_device = {
208 .name = "physmap-flash",
209 .id = 0,
210 .dev = {
211 .platform_data = &ezkit_flash_data,
212 },
213 .num_resources = 1,
214 .resource = &ezkit_flash_resource,
215};
216#endif
217
64307f7d
MH		 218#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
219static struct mtd_partition partition_info[] = {
220 {
aa582977 221 .name = "linux kernel(nand)",
64307f7d 222 .offset = 0,
f4585a08 223 .size = 4 * 1024 * 1024,
64307f7d
MH		 224 },
225 {
aa582977 226 .name = "file system(nand)",
edf05641
MF		 227 .offset = MTDPART_OFS_APPEND,
228 .size = MTDPART_SIZ_FULL,
64307f7d
MH		 229 },
230};
231
232static struct bf5xx_nand_platform bf5xx_nand_platform = {
233 .page_size = NFC_PG_SIZE_256,
234 .data_width = NFC_NWIDTH_8,
235 .partitions = partition_info,
236 .nr_partitions = ARRAY_SIZE(partition_info),
237 .rd_dly = 3,
238 .wr_dly = 3,
239};
240
241static struct resource bf5xx_nand_resources[] = {
242 {
243 .start = NFC_CTL,
244 .end = NFC_DATA_RD + 2,
245 .flags = IORESOURCE_MEM,
246 },
247 {
248 .start = CH_NFC,
249 .end = CH_NFC,
250 .flags = IORESOURCE_IRQ,
251 },
252};
253
254static struct platform_device bf5xx_nand_device = {
255 .name = "bf5xx-nand",
256 .id = 0,
257 .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
258 .resource = bf5xx_nand_resources,
259 .dev = {
260 .platform_data = &bf5xx_nand_platform,
261 },
262};
263#endif
264
59003145
MH		 265#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
266static struct resource bfin_pcmcia_cf_resources[] = {
267 {
268 .start = 0x20310000, /* IO PORT */
269 .end = 0x20312000,
270 .flags = IORESOURCE_MEM,
271 }, {
272 .start = 0x20311000, /* Attribute Memory */
273 .end = 0x20311FFF,
274 .flags = IORESOURCE_MEM,
275 }, {
276 .start = IRQ_PF4,
277 .end = IRQ_PF4,
278 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
279 }, {
280 .start = 6, /* Card Detect PF6 */
281 .end = 6,
282 .flags = IORESOURCE_IRQ,
283 },
284};
285
286static struct platform_device bfin_pcmcia_cf_device = {
287 .name = "bfin_cf_pcmcia",
288 .id = -1,
289 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
290 .resource = bfin_pcmcia_cf_resources,
291};
292#endif
293
294#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
295static struct platform_device rtc_device = {
296 .name = "rtc-bfin",
297 .id = -1,
298};
299#endif
300
301#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
61f09b5a
MH		 302#include <linux/smc91x.h>
303
304static struct smc91x_platdata smc91x_info = {
305 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
306 .leda = RPC_LED_100_10,
307 .ledb = RPC_LED_TX_RX,
308};
309
59003145
MH		 310static struct resource smc91x_resources[] = {
311 {
312 .name = "smc91x-regs",
313 .start = 0x20300300,
314 .end = 0x20300300 + 16,
315 .flags = IORESOURCE_MEM,
316 }, {
317
318 .start = IRQ_PF7,
319 .end = IRQ_PF7,
320 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
321 },
322};
323static struct platform_device smc91x_device = {
324 .name = "smc91x",
325 .id = 0,
326 .num_resources = ARRAY_SIZE(smc91x_resources),
327 .resource = smc91x_resources,
61f09b5a
MH		 328 .dev = {
329 .platform_data = &smc91x_info,
330 },
59003145
MH		 331};
332#endif
333
334#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
335static struct resource dm9000_resources[] = {
336 [0] = {
337 .start = 0x203FB800,
da3854fc 338 .end = 0x203FB800 + 1,
59003145
MH		 339 .flags = IORESOURCE_MEM,
340 },
341 [1] = {
da3854fc
LP		 342 .start = 0x203FB800 + 4,
343 .end = 0x203FB800 + 5,
344 .flags = IORESOURCE_MEM,
345 },
346 [2] = {
59003145
MH		 347 .start = IRQ_PF9,
348 .end = IRQ_PF9,
349 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
350 },
351};
352
353static struct platform_device dm9000_device = {
354 .name = "dm9000",
355 .id = -1,
356 .num_resources = ARRAY_SIZE(dm9000_resources),
357 .resource = dm9000_resources,
358};
359#endif
360
59003145 361#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
65319628
GY		 362static struct platform_device bfin_mii_bus = {
363 .name = "bfin_mii_bus",
364};
365
59003145
MH		 366static struct platform_device bfin_mac_device = {
367 .name = "bfin_mac",
65319628 368 .dev.platform_data = &bfin_mii_bus,
59003145
MH		 369};
370#endif
371
372#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
373static struct resource net2272_bfin_resources[] = {
374 {
375 .start = 0x20300000,
376 .end = 0x20300000 + 0x100,
377 .flags = IORESOURCE_MEM,
378 }, {
379 .start = IRQ_PF7,
380 .end = IRQ_PF7,
381 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
382 },
383};
384
385static struct platform_device net2272_bfin_device = {
386 .name = "net2272",
387 .id = -1,
388 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
389 .resource = net2272_bfin_resources,
390};
391#endif
392
59003145
MH		 393#if defined(CONFIG_MTD_M25P80) \
394 || defined(CONFIG_MTD_M25P80_MODULE)
395static struct mtd_partition bfin_spi_flash_partitions[] = {
396 {
aa582977 397 .name = "bootloader(spi)",
ac76d889 398 .size = 0x00040000,
59003145
MH		 399 .offset = 0,
400 .mask_flags = MTD_CAP_ROM
401 }, {
aa582977 402 .name = "linux kernel(spi)",
edf05641
MF		 403 .size = MTDPART_SIZ_FULL,
404 .offset = MTDPART_OFS_APPEND,
59003145
MH		 405 }
406};
407
408static struct flash_platform_data bfin_spi_flash_data = {
409 .name = "m25p80",
410 .parts = bfin_spi_flash_partitions,
411 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
b9c9e788 412 .type = "m25p16",
59003145
MH		 413};
414
415/* SPI flash chip (m25p64) */
416static struct bfin5xx_spi_chip spi_flash_chip_info = {
417 .enable_dma = 0, /* use dma transfer with this chip*/
418 .bits_per_word = 8,
419};
420#endif
421
a261eec0
MF		 422#if defined(CONFIG_BFIN_SPI_ADC) \
423 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
59003145
MH		 424/* SPI ADC chip */
425static struct bfin5xx_spi_chip spi_adc_chip_info = {
426 .enable_dma = 1, /* use dma transfer with this chip*/
427 .bits_per_word = 16,
428};
429#endif
430
d40bd71f
BS		 431#if defined(CONFIG_SND_BLACKFIN_AD183X) \
432 || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
59003145
MH		 433static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
434 .enable_dma = 0,
435 .bits_per_word = 16,
436};
437#endif
438
ffdf3ec8
YL		 439#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
440static struct bfin5xx_spi_chip mmc_spi_chip_info = {
441 .enable_dma = 0,
442 .bits_per_word = 8,
443};
444#endif
445
59003145
MH		 446#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
447static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
448 .enable_dma = 0,
449 .bits_per_word = 16,
450};
451
452static const struct ad7877_platform_data bfin_ad7877_ts_info = {
453 .model = 7877,
454 .vref_delay_usecs = 50, /* internal, no capacitor */
455 .x_plate_ohms = 419,
456 .y_plate_ohms = 486,
457 .pressure_max = 1000,
458 .pressure_min = 0,
459 .stopacq_polarity = 1,
460 .first_conversion_delay = 3,
461 .acquisition_time = 1,
462 .averaging = 1,
463 .pen_down_acc_interval = 1,
464};
465#endif
466
5105432a
MH		 467#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
468#include <linux/spi/ad7879.h>
469static const struct ad7879_platform_data bfin_ad7879_ts_info = {
470 .model = 7879, /* Model = AD7879 */
471 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
472 .pressure_max = 10000,
473 .pressure_min = 0,
474 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
475 .acquisition_time = 1, /* 4us acquisition time per sample */
476 .median = 2, /* do 8 measurements */
477 .averaging = 1, /* take the average of 4 middle samples */
478 .pen_down_acc_interval = 255, /* 9.4 ms */
244d3423 479 .gpio_export = 0, /* Export GPIO to gpiolib */
5105432a
MH		 480};
481#endif
482
483#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
484static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
485 .enable_dma = 0,
486 .bits_per_word = 16,
487};
488#endif
489
6e668936
MH		 490#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
491static struct bfin5xx_spi_chip spidev_chip_info = {
492 .enable_dma = 0,
493 .bits_per_word = 8,
494};
495#endif
496
336746ed
BS		 497#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
498static struct platform_device bfin_i2s = {
499 .name = "bfin-i2s",
500 .id = CONFIG_SND_BF5XX_SPORT_NUM,
501 /* TODO: add platform data here */
502};
503#endif
504
505#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
506static struct platform_device bfin_tdm = {
507 .name = "bfin-tdm",
508 .id = CONFIG_SND_BF5XX_SPORT_NUM,
509 /* TODO: add platform data here */
510};
511#endif
512
6924dfb0
MH		 513#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
514static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
515 .enable_dma = 0,
516 .bits_per_word = 8,
517};
518#endif
519
59003145
MH		 520static struct spi_board_info bfin_spi_board_info[] __initdata = {
521#if defined(CONFIG_MTD_M25P80) \
522 || defined(CONFIG_MTD_M25P80_MODULE)
523 {
524 /* the modalias must be the same as spi device driver name */
525 .modalias = "m25p80", /* Name of spi_driver for this device */
526 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
527 .bus_num = 0, /* Framework bus number */
528 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
529 .platform_data = &bfin_spi_flash_data,
530 .controller_data = &spi_flash_chip_info,
531 .mode = SPI_MODE_3,
532 },
533#endif
534
a261eec0
MF		 535#if defined(CONFIG_BFIN_SPI_ADC) \
536 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
59003145
MH		 537 {
538 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
539 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
540 .bus_num = 0, /* Framework bus number */
541 .chip_select = 1, /* Framework chip select. */
542 .platform_data = NULL, /* No spi_driver specific config */
543 .controller_data = &spi_adc_chip_info,
544 },
545#endif
546
d40bd71f
BS		 547#if defined(CONFIG_SND_BLACKFIN_AD183X) \
548 || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
59003145 549 {
dac98174 550 .modalias = "ad1836",
59003145
MH		 551 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
552 .bus_num = 0,
553 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
554 .controller_data = &ad1836_spi_chip_info,
555 },
556#endif
ffdf3ec8
YL		 557#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
558 {
559 .modalias = "mmc_spi",
560 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
561 .bus_num = 0,
562 .chip_select = 3,
563 .controller_data = &mmc_spi_chip_info,
564 .mode = SPI_MODE_0,
565 },
566#endif
567
59003145
MH		 568#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
569 {
570 .modalias = "ad7877",
571 .platform_data = &bfin_ad7877_ts_info,
2eb74ae2 572 .irq = IRQ_PF8,
59003145 573 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
0954f70a 574 .bus_num = 0,
2eb74ae2 575 .chip_select = 2,
59003145
MH		 576 .controller_data = &spi_ad7877_chip_info,
577 },
578#endif
5105432a
MH		 579#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
580 {
581 .modalias = "ad7879",
582 .platform_data = &bfin_ad7879_ts_info,
583 .irq = IRQ_PF8,
584 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
585 .bus_num = 0,
586 .chip_select = 3,
587 .controller_data = &spi_ad7879_chip_info,
588 .mode = SPI_CPHA | SPI_CPOL,
589 },
590#endif
6e668936
MH		 591#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
592 {
593 .modalias = "spidev",
594 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
595 .bus_num = 0,
596 .chip_select = 1,
597 .controller_data = &spidev_chip_info,
598 },
599#endif
6924dfb0
MH		 600#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
601 {
602 .modalias = "bfin-lq035q1-spi",
603 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
604 .bus_num = 0,
605 .chip_select = 7,
606 .controller_data = &lq035q1_spi_chip_info,
607 .mode = SPI_CPHA | SPI_CPOL,
608 },
609#endif
59003145
MH		 610};
611
5bda2723 612#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
59003145
MH		 613/* SPI controller data */
614static struct bfin5xx_spi_master bfin_spi0_info = {
615 .num_chipselect = 8,
616 .enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5 617 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
59003145
MH		 618};
619
620/* SPI (0) */
621static struct resource bfin_spi0_resource[] = {
622 [0] = {
623 .start = SPI0_REGBASE,
624 .end = SPI0_REGBASE + 0xFF,
625 .flags = IORESOURCE_MEM,
626 },
627 [1] = {
628 .start = CH_SPI,
629 .end = CH_SPI,
53122693
YL		 630 .flags = IORESOURCE_DMA,
631 },
632 [2] = {
633 .start = IRQ_SPI,
634 .end = IRQ_SPI,
59003145
MH		 635 .flags = IORESOURCE_IRQ,
636 },
637};
638
639static struct platform_device bfin_spi0_device = {
640 .name = "bfin-spi",
641 .id = 0, /* Bus number */
642 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
643 .resource = bfin_spi0_resource,
644 .dev = {
645 .platform_data = &bfin_spi0_info, /* Passed to driver */
646 },
647};
648#endif /* spi master and devices */
649
59003145 650#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
59003145 651#ifdef CONFIG_SERIAL_BFIN_UART0
6bd1fbea 652static struct resource bfin_uart0_resources[] = {
59003145 653 {
6bd1fbea
SZ		 654 .start = UART0_THR,
655 .end = UART0_GCTL+2,
59003145
MH		 656 .flags = IORESOURCE_MEM,
657 },
6bd1fbea
SZ		 658 {
659 .start = IRQ_UART0_RX,
660 .end = IRQ_UART0_RX+1,
661 .flags = IORESOURCE_IRQ,
662 },
663 {
664 .start = IRQ_UART0_ERROR,
665 .end = IRQ_UART0_ERROR,
666 .flags = IORESOURCE_IRQ,
667 },
668 {
669 .start = CH_UART0_TX,
670 .end = CH_UART0_TX,
671 .flags = IORESOURCE_DMA,
672 },
673 {
674 .start = CH_UART0_RX,
675 .end = CH_UART0_RX,
676 .flags = IORESOURCE_DMA,
677 },
678};
679
680unsigned short bfin_uart0_peripherals[] = {
681 P_UART0_TX, P_UART0_RX, 0
682};
683
684static struct platform_device bfin_uart0_device = {
685 .name = "bfin-uart",
686 .id = 0,
687 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
688 .resource = bfin_uart0_resources,
689 .dev = {
690 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
691 },
692};
59003145
MH		 693#endif
694#ifdef CONFIG_SERIAL_BFIN_UART1
6bd1fbea 695static struct resource bfin_uart1_resources[] = {
59003145 696 {
6bd1fbea
SZ		 697 .start = UART1_THR,
698 .end = UART1_GCTL+2,
59003145
MH		 699 .flags = IORESOURCE_MEM,
700 },
6bd1fbea
SZ		 701 {
702 .start = IRQ_UART1_RX,
703 .end = IRQ_UART1_RX+1,
704 .flags = IORESOURCE_IRQ,
705 },
706 {
707 .start = IRQ_UART1_ERROR,
708 .end = IRQ_UART1_ERROR,
709 .flags = IORESOURCE_IRQ,
710 },
711 {
712 .start = CH_UART1_TX,
713 .end = CH_UART1_TX,
714 .flags = IORESOURCE_DMA,
715 },
716 {
717 .start = CH_UART1_RX,
718 .end = CH_UART1_RX,
719 .flags = IORESOURCE_DMA,
720 },
721#ifdef CONFIG_BFIN_UART1_CTSRTS
722 { /* CTS pin */
723 .start = GPIO_PF9,
724 .end = GPIO_PF9,
725 .flags = IORESOURCE_IO,
726 },
727 { /* RTS pin */
728 .start = GPIO_PF10,
729 .end = GPIO_PF10,
730 .flags = IORESOURCE_IO,
731 },
59003145
MH		 732#endif
733};
734
6bd1fbea
SZ		 735unsigned short bfin_uart1_peripherals[] = {
736 P_UART1_TX, P_UART1_RX, 0
737};
738
739static struct platform_device bfin_uart1_device = {
59003145
MH		 740 .name = "bfin-uart",
741 .id = 1,
6bd1fbea
SZ		 742 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
743 .resource = bfin_uart1_resources,
744 .dev = {
745 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
746 },
59003145
MH		 747};
748#endif
6bd1fbea 749#endif
59003145 750
5be36d22 751#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
5be36d22 752#ifdef CONFIG_BFIN_SIR0
42bd8bcb 753static struct resource bfin_sir0_resources[] = {
5be36d22
GY		 754 {
755 .start = 0xFFC00400,
756 .end = 0xFFC004FF,
757 .flags = IORESOURCE_MEM,
758 },
42bd8bcb
GY		 759 {
760 .start = IRQ_UART0_RX,
761 .end = IRQ_UART0_RX+1,
762 .flags = IORESOURCE_IRQ,
763 },
764 {
765 .start = CH_UART0_RX,
766 .end = CH_UART0_RX+1,
767 .flags = IORESOURCE_DMA,
768 },
769};
770
771static struct platform_device bfin_sir0_device = {
772 .name = "bfin_sir",
773 .id = 0,
774 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
775 .resource = bfin_sir0_resources,
776};
5be36d22
GY		 777#endif
778#ifdef CONFIG_BFIN_SIR1
42bd8bcb 779static struct resource bfin_sir1_resources[] = {
5be36d22
GY		 780 {
781 .start = 0xFFC02000,
782 .end = 0xFFC020FF,
783 .flags = IORESOURCE_MEM,
784 },
42bd8bcb
GY		 785 {
786 .start = IRQ_UART1_RX,
787 .end = IRQ_UART1_RX+1,
788 .flags = IORESOURCE_IRQ,
789 },
790 {
791 .start = CH_UART1_RX,
792 .end = CH_UART1_RX+1,
793 .flags = IORESOURCE_DMA,
794 },
5be36d22
GY		 795};
796
42bd8bcb 797static struct platform_device bfin_sir1_device = {
5be36d22 798 .name = "bfin_sir",
42bd8bcb
GY		 799 .id = 1,
800 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
801 .resource = bfin_sir1_resources,
5be36d22
GY		 802};
803#endif
42bd8bcb 804#endif
5be36d22 805
59003145
MH		 806#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
807static struct resource bfin_twi0_resource[] = {
808 [0] = {
809 .start = TWI0_REGBASE,
810 .end = TWI0_REGBASE,
811 .flags = IORESOURCE_MEM,
812 },
813 [1] = {
814 .start = IRQ_TWI,
815 .end = IRQ_TWI,
816 .flags = IORESOURCE_IRQ,
817 },
818};
819
820static struct platform_device i2c_bfin_twi_device = {
821 .name = "i2c-bfin-twi",
822 .id = 0,
823 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
824 .resource = bfin_twi0_resource,
825};
826#endif
827
6924dfb0
MH		 828#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
829#include <linux/mfd/adp5520.h>
830
831 /*
832 * ADP5520/5501 LEDs Data
833 */
834
835static struct led_info adp5520_leds[] = {
836 {
837 .name = "adp5520-led1",
838 .default_trigger = "none",
839 .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
840 },
841};
842
843static struct adp5520_leds_platform_data adp5520_leds_data = {
844 .num_leds = ARRAY_SIZE(adp5520_leds),
845 .leds = adp5520_leds,
846 .fade_in = ADP5520_FADE_T_600ms,
847 .fade_out = ADP5520_FADE_T_600ms,
848 .led_on_time = ADP5520_LED_ONT_600ms,
849};
850
851 /*
852 * ADP5520 Keypad Data
853 */
854
855static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
856 [ADP5520_KEY(3, 3)] = KEY_1,
857 [ADP5520_KEY(2, 3)] = KEY_2,
858 [ADP5520_KEY(1, 3)] = KEY_3,
859 [ADP5520_KEY(0, 3)] = KEY_UP,
860 [ADP5520_KEY(3, 2)] = KEY_4,
861 [ADP5520_KEY(2, 2)] = KEY_5,
862 [ADP5520_KEY(1, 2)] = KEY_6,
863 [ADP5520_KEY(0, 2)] = KEY_DOWN,
864 [ADP5520_KEY(3, 1)] = KEY_7,
865 [ADP5520_KEY(2, 1)] = KEY_8,
866 [ADP5520_KEY(1, 1)] = KEY_9,
867 [ADP5520_KEY(0, 1)] = KEY_DOT,
868 [ADP5520_KEY(3, 0)] = KEY_BACKSPACE,
869 [ADP5520_KEY(2, 0)] = KEY_0,
870 [ADP5520_KEY(1, 0)] = KEY_HELP,
871 [ADP5520_KEY(0, 0)] = KEY_ENTER,
872};
873
874static struct adp5520_keys_platform_data adp5520_keys_data = {
875 .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
876 .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
877 .keymap = adp5520_keymap,
878 .keymapsize = ARRAY_SIZE(adp5520_keymap),
879 .repeat = 0,
880};
881
882 /*
883 * ADP5520/5501 Multifuction Device Init Data
884 */
885
886static struct adp5520_platform_data adp5520_pdev_data = {
887 .leds = &adp5520_leds_data,
888 .keys = &adp5520_keys_data,
889};
890
891#endif
892
72268689 893static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
ebd58333 894#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
72268689
BW		 895 {
896 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
72268689
BW		 897 },
898#endif
204844eb 899#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
72268689
BW		 900 {
901 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
72268689
BW		 902 .irq = IRQ_PF8,
903 },
904#endif
50c4c086
MH		 905#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
906 {
907 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
908 },
909#endif
6924dfb0
MH		 910#if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
911 {
912 I2C_BOARD_INFO("ad7879", 0x2C),
913 .irq = IRQ_PF8,
914 .platform_data = (void *)&bfin_ad7879_ts_info,
915 },
916#endif
917#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
918 {
919 I2C_BOARD_INFO("pmic-adp5520", 0x32),
920 .irq = IRQ_PF9,
921 .platform_data = (void *)&adp5520_pdev_data,
922 },
923#endif
29bb3bc0
CC		 924#if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
925 {
926 I2C_BOARD_INFO("ssm2602", 0x1b),
927 },
928#endif
72268689 929};
72268689 930
59003145 931#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
df5de261
SZ		 932#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
933static struct resource bfin_sport0_uart_resources[] = {
934 {
935 .start = SPORT0_TCR1,
936 .end = SPORT0_MRCS3+4,
937 .flags = IORESOURCE_MEM,
938 },
939 {
940 .start = IRQ_SPORT0_RX,
941 .end = IRQ_SPORT0_RX+1,
942 .flags = IORESOURCE_IRQ,
943 },
944 {
945 .start = IRQ_SPORT0_ERROR,
946 .end = IRQ_SPORT0_ERROR,
947 .flags = IORESOURCE_IRQ,
948 },
949};
950
951unsigned short bfin_sport0_peripherals[] = {
952 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
953 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
954};
955
59003145
MH		 956static struct platform_device bfin_sport0_uart_device = {
957 .name = "bfin-sport-uart",
958 .id = 0,
df5de261
SZ		 959 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
960 .resource = bfin_sport0_uart_resources,
961 .dev = {
962 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
963 },
964};
965#endif
966#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
967static struct resource bfin_sport1_uart_resources[] = {
968 {
969 .start = SPORT1_TCR1,
970 .end = SPORT1_MRCS3+4,
971 .flags = IORESOURCE_MEM,
972 },
973 {
974 .start = IRQ_SPORT1_RX,
975 .end = IRQ_SPORT1_RX+1,
976 .flags = IORESOURCE_IRQ,
977 },
978 {
979 .start = IRQ_SPORT1_ERROR,
980 .end = IRQ_SPORT1_ERROR,
981 .flags = IORESOURCE_IRQ,
982 },
983};
984
985unsigned short bfin_sport1_peripherals[] = {
986 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
987 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
59003145
MH		 988};
989
990static struct platform_device bfin_sport1_uart_device = {
991 .name = "bfin-sport-uart",
992 .id = 1,
df5de261
SZ		 993 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
994 .resource = bfin_sport1_uart_resources,
995 .dev = {
996 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
997 },
59003145
MH		 998};
999#endif
df5de261 1000#endif
59003145 1001
1089e228 1002#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1089e228
MH		 1003#include <linux/gpio_keys.h>
1004
1005static struct gpio_keys_button bfin_gpio_keys_table[] = {
1006 {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
1007 {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
1008};
1009
1010static struct gpio_keys_platform_data bfin_gpio_keys_data = {
1011 .buttons = bfin_gpio_keys_table,
1012 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
1013};
1014
1015static struct platform_device bfin_device_gpiokeys = {
1016 .name = "gpio-keys",
1017 .dev = {
1018 .platform_data = &bfin_gpio_keys_data,
1019 },
1020};
1021#endif
1022
adfc0467 1023#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
aca5e4aa
MH		 1024#include <asm/bfin_rotary.h>
1025
1026static struct bfin_rotary_platform_data bfin_rotary_data = {
1027 /*.rotary_up_key = KEY_UP,*/
1028 /*.rotary_down_key = KEY_DOWN,*/
1029 .rotary_rel_code = REL_WHEEL,
1030 .rotary_button_key = KEY_ENTER,
1031 .debounce = 10, /* 0..17 */
1032 .mode = ROT_QUAD_ENC | ROT_DEBE,
1033};
1034
1035static struct resource bfin_rotary_resources[] = {
1036 {
1037 .start = IRQ_CNT,
1038 .end = IRQ_CNT,
1039 .flags = IORESOURCE_IRQ,
1040 },
1041};
1042
1043static struct platform_device bfin_rotary_device = {
1044 .name = "bfin-rotary",
1045 .id = -1,
1046 .num_resources = ARRAY_SIZE(bfin_rotary_resources),
1047 .resource = bfin_rotary_resources,
1048 .dev = {
1049 .platform_data = &bfin_rotary_data,
1050 },
1051};
1052#endif
1053
14b03204
MH		 1054static const unsigned int cclk_vlev_datasheet[] =
1055{
1056 VRPAIR(VLEV_100, 400000000),
1057 VRPAIR(VLEV_105, 426000000),
1058 VRPAIR(VLEV_110, 500000000),
1059 VRPAIR(VLEV_115, 533000000),
1060 VRPAIR(VLEV_120, 600000000),
1061};
1062
1063static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
1064 .tuple_tab = cclk_vlev_datasheet,
1065 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
1066 .vr_settling_time = 25 /* us */,
1067};
1068
1069static struct platform_device bfin_dpmc = {
1070 .name = "bfin dpmc",
1071 .dev = {
1072 .platform_data = &bfin_dmpc_vreg_data,
1073 },
1074};
1075
59003145 1076static struct platform_device *stamp_devices[] __initdata = {
14b03204
MH		 1077
1078 &bfin_dpmc,
1079
64307f7d
MH		 1080#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
1081 &bf5xx_nand_device,
1082#endif
1083
59003145
MH		 1084#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
1085 &bfin_pcmcia_cf_device,
1086#endif
1087
1088#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
1089 &rtc_device,
1090#endif
1091
3f375690
MH		 1092#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
1093 &bfin_isp1760_device,
1094#endif
1095
1089e228
MH		 1096#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
1097 &musb_device,
1098#endif
1099
59003145
MH		 1100#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
1101 &smc91x_device,
1102#endif
1103
1104#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
1105 &dm9000_device,
1106#endif
1107
1108#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
65319628 1109 &bfin_mii_bus,
59003145
MH		 1110 &bfin_mac_device,
1111#endif
1112
1113#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
1114 &net2272_bfin_device,
1115#endif
1116
1117#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
1118 &bfin_spi0_device,
1119#endif
1120
1089e228
MH		 1121#if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
1122 &bf52x_t350mcqb_device,
1123#endif
1124
6924dfb0
MH		 1125#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1126 &bfin_lq035q1_device,
1127#endif
1128
59003145 1129#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
6bd1fbea
SZ		 1130#ifdef CONFIG_SERIAL_BFIN_UART0
1131 &bfin_uart0_device,
1132#endif
1133#ifdef CONFIG_SERIAL_BFIN_UART1
1134 &bfin_uart1_device,
1135#endif
59003145
MH		 1136#endif
1137
5be36d22 1138#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb
GY		 1139#ifdef CONFIG_BFIN_SIR0
1140 &bfin_sir0_device,
1141#endif
1142#ifdef CONFIG_BFIN_SIR1
1143 &bfin_sir1_device,
1144#endif
5be36d22
GY		 1145#endif
1146
59003145
MH		 1147#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1148 &i2c_bfin_twi_device,
1149#endif
1150
1151#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
df5de261 1152#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
59003145 1153 &bfin_sport0_uart_device,
df5de261
SZ		 1154#endif
1155#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
59003145
MH		 1156 &bfin_sport1_uart_device,
1157#endif
df5de261 1158#endif
59003145 1159
1089e228
MH		 1160#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1161 &bfin_device_gpiokeys,
1162#endif
cad2ab65 1163
adfc0467 1164#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
aca5e4aa
MH		 1165 &bfin_rotary_device,
1166#endif
1167
d7e5dd41
MH		 1168#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
1169 &ezkit_flash_device,
1170#endif
336746ed
BS		 1171
1172#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
1173 &bfin_i2s,
1174#endif
1175
1176#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
1177 &bfin_tdm,
1178#endif
59003145
MH		 1179};
1180
7f6678c5 1181static int __init ezkit_init(void)
59003145 1182{
b85d858b 1183 printk(KERN_INFO "%s(): registering device resources\n", __func__);
72268689
BW		 1184 i2c_register_board_info(0, bfin_i2c_board_info,
1185 ARRAY_SIZE(bfin_i2c_board_info));
59003145 1186 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
5bda2723 1187 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
59003145
MH		 1188 return 0;
1189}
1190
7f6678c5 1191arch_initcall(ezkit_init);
59003145 1192
c13ce9fd
SZ		 1193static struct platform_device *ezkit_early_devices[] __initdata = {
1194#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1195#ifdef CONFIG_SERIAL_BFIN_UART0
1196 &bfin_uart0_device,
1197#endif
1198#ifdef CONFIG_SERIAL_BFIN_UART1
1199 &bfin_uart1_device,
1200#endif
1201#endif
1202
1203#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
1204#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1205 &bfin_sport0_uart_device,
1206#endif
1207#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1208 &bfin_sport1_uart_device,
1209#endif
1210#endif
1211};
1212
1213void __init native_machine_early_platform_add_devices(void)
1214{
1215 printk(KERN_INFO "register early platform devices\n");
1216 early_platform_add_devices(ezkit_early_devices,
1217 ARRAY_SIZE(ezkit_early_devices));
1218}
1219
59003145
MH		 1220void native_machine_restart(char *cmd)
1221{
1222 /* workaround reboot hang when booting from SPI */
1223 if ((bfin_read_SYSCR() & 0x7) == 0x3)
b52dae31 1224 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
59003145 1225}
137b1529 1226
9862cc52 1227void bfin_get_ether_addr(char *addr)
137b1529 1228{
181afa94
MF		 1229 /* the MAC is stored in OTP memory page 0xDF */
1230 u32 ret;
1231 u64 otp_mac;
1232 u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
1233
1234 ret = otp_read(0xDF, 0x00, &otp_mac);
1235 if (!(ret & 0x1)) {
1236 char *otp_mac_p = (char *)&otp_mac;
1237 for (ret = 0; ret < 6; ++ret)
1238 addr[ret] = otp_mac_p[5 - ret];
1239 }
137b1529 1240}
9862cc52 1241EXPORT_SYMBOL(bfin_get_ether_addr);
Clone of davem's net-next-2.6 tree