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Blackfin: make sure MPU CPLB for first 1k is marked as valid
[net-next-2.6.git] / arch / blackfin / mach-bf527 / boards / cm_bf527.c
CommitLineData
9db144fe
MH		 1/*
2 * File: arch/blackfin/mach-bf527/boards/cm-bf527.c
3 * Based on: arch/blackfin/mach-bf537/boards/stamp.c
4 * Author: Aidan Williams <aidan@nicta.com.au>
5 *
6 * Created:
7 * Description:
8 *
9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2008 Analog Devices Inc.
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 */
30
31#include <linux/device.h>
32#include <linux/platform_device.h>
33#include <linux/mtd/mtd.h>
34#include <linux/mtd/partitions.h>
35#include <linux/mtd/physmap.h>
36#include <linux/spi/spi.h>
37#include <linux/spi/flash.h>
38#include <linux/etherdevice.h>
39#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
40#include <linux/usb/isp1362.h>
41#endif
9db144fe
MH		 42#include <linux/i2c.h>
43#include <linux/irq.h>
44#include <linux/interrupt.h>
45#include <linux/usb/sl811.h>
9db144fe 46#include <linux/usb/musb.h>
9db144fe
MH		 47#include <asm/dma.h>
48#include <asm/bfin5xx_spi.h>
49#include <asm/reboot.h>
50#include <asm/nand.h>
51#include <asm/portmux.h>
52#include <asm/dpmc.h>
53#include <linux/spi/ad7877.h>
54
55/*
56 * Name the Board for the /proc/cpuinfo
57 */
58const char bfin_board_name[] = "Bluetechnix CM-BF527";
59
60/*
61 * Driver needs to know address, irq and flag pin.
62 */
63
9db144fe 64#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
3f375690
MH		 65#include <linux/usb/isp1760.h>
66static struct resource bfin_isp1760_resources[] = {
9db144fe 67 [0] = {
3f375690
MH		 68 .start = 0x203C0000,
69 .end = 0x203C0000 + 0x000fffff,
9db144fe
MH		 70 .flags = IORESOURCE_MEM,
71 },
72 [1] = {
3f375690
MH		 73 .start = IRQ_PF7,
74 .end = IRQ_PF7,
9db144fe
MH		 75 .flags = IORESOURCE_IRQ,
76 },
77};
78
3f375690
MH		 79static struct isp1760_platform_data isp1760_priv = {
80 .is_isp1761 = 0,
81 .port1_disable = 0,
82 .bus_width_16 = 1,
83 .port1_otg = 0,
84 .analog_oc = 0,
85 .dack_polarity_high = 0,
86 .dreq_polarity_high = 0,
9db144fe
MH		 87};
88
3f375690
MH		 89static struct platform_device bfin_isp1760_device = {
90 .name = "isp1760-hcd",
91 .id = 0,
92 .dev = {
93 .platform_data = &isp1760_priv,
94 },
95 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
96 .resource = bfin_isp1760_resources,
9db144fe 97};
9db144fe
MH		 98#endif
99
100#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
101static struct resource musb_resources[] = {
102 [0] = {
103 .start = 0xffc03800,
104 .end = 0xffc03cff,
105 .flags = IORESOURCE_MEM,
106 },
107 [1] = { /* general IRQ */
108 .start = IRQ_USB_INT0,
109 .end = IRQ_USB_INT0,
110 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
111 },
112 [2] = { /* DMA IRQ */
113 .start = IRQ_USB_DMA,
114 .end = IRQ_USB_DMA,
115 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
116 },
117};
118
50041acb
BW		 119static struct musb_hdrc_config musb_config = {
120 .multipoint = 0,
121 .dyn_fifo = 0,
122 .soft_con = 1,
123 .dma = 1,
fea05dac
BW		 124 .num_eps = 8,
125 .dma_channels = 8,
50041acb
BW		 126 .gpio_vrsel = GPIO_PF11,
127};
128
9db144fe
MH		 129static struct musb_hdrc_platform_data musb_plat = {
130#if defined(CONFIG_USB_MUSB_OTG)
131 .mode = MUSB_OTG,
132#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
133 .mode = MUSB_HOST,
134#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
135 .mode = MUSB_PERIPHERAL,
136#endif
50041acb 137 .config = &musb_config,
9db144fe
MH		 138};
139
140static u64 musb_dmamask = ~(u32)0;
141
142static struct platform_device musb_device = {
143 .name = "musb_hdrc",
144 .id = 0,
145 .dev = {
146 .dma_mask = &musb_dmamask,
147 .coherent_dma_mask = 0xffffffff,
148 .platform_data = &musb_plat,
149 },
150 .num_resources = ARRAY_SIZE(musb_resources),
151 .resource = musb_resources,
152};
153#endif
154
155#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
156static struct mtd_partition ezkit_partitions[] = {
157 {
aa582977 158 .name = "bootloader(nor)",
9db144fe
MH		 159 .size = 0x40000,
160 .offset = 0,
161 }, {
aa582977 162 .name = "linux kernel(nor)",
9db144fe
MH		 163 .size = 0x1C0000,
164 .offset = MTDPART_OFS_APPEND,
165 }, {
aa582977 166 .name = "file system(nor)",
9db144fe
MH		 167 .size = MTDPART_SIZ_FULL,
168 .offset = MTDPART_OFS_APPEND,
169 }
170};
171
172static struct physmap_flash_data ezkit_flash_data = {
173 .width = 2,
174 .parts = ezkit_partitions,
175 .nr_parts = ARRAY_SIZE(ezkit_partitions),
176};
177
178static struct resource ezkit_flash_resource = {
179 .start = 0x20000000,
180 .end = 0x201fffff,
181 .flags = IORESOURCE_MEM,
182};
183
184static struct platform_device ezkit_flash_device = {
185 .name = "physmap-flash",
186 .id = 0,
187 .dev = {
188 .platform_data = &ezkit_flash_data,
189 },
190 .num_resources = 1,
191 .resource = &ezkit_flash_resource,
192};
193#endif
194
195#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
196static struct mtd_partition partition_info[] = {
197 {
aa582977 198 .name = "linux kernel(nand)",
9db144fe 199 .offset = 0,
f4585a08 200 .size = 4 * 1024 * 1024,
9db144fe
MH		 201 },
202 {
aa582977 203 .name = "file system(nand)",
9db144fe
MH		 204 .offset = MTDPART_OFS_APPEND,
205 .size = MTDPART_SIZ_FULL,
206 },
207};
208
209static struct bf5xx_nand_platform bf5xx_nand_platform = {
210 .page_size = NFC_PG_SIZE_256,
211 .data_width = NFC_NWIDTH_8,
212 .partitions = partition_info,
213 .nr_partitions = ARRAY_SIZE(partition_info),
214 .rd_dly = 3,
215 .wr_dly = 3,
216};
217
218static struct resource bf5xx_nand_resources[] = {
219 {
220 .start = NFC_CTL,
221 .end = NFC_DATA_RD + 2,
222 .flags = IORESOURCE_MEM,
223 },
224 {
225 .start = CH_NFC,
226 .end = CH_NFC,
227 .flags = IORESOURCE_IRQ,
228 },
229};
230
231static struct platform_device bf5xx_nand_device = {
232 .name = "bf5xx-nand",
233 .id = 0,
234 .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
235 .resource = bf5xx_nand_resources,
236 .dev = {
237 .platform_data = &bf5xx_nand_platform,
238 },
239};
240#endif
241
242#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
243static struct resource bfin_pcmcia_cf_resources[] = {
244 {
245 .start = 0x20310000, /* IO PORT */
246 .end = 0x20312000,
247 .flags = IORESOURCE_MEM,
248 }, {
249 .start = 0x20311000, /* Attribute Memory */
250 .end = 0x20311FFF,
251 .flags = IORESOURCE_MEM,
252 }, {
253 .start = IRQ_PF4,
254 .end = IRQ_PF4,
255 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
256 }, {
257 .start = 6, /* Card Detect PF6 */
258 .end = 6,
259 .flags = IORESOURCE_IRQ,
260 },
261};
262
263static struct platform_device bfin_pcmcia_cf_device = {
264 .name = "bfin_cf_pcmcia",
265 .id = -1,
266 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
267 .resource = bfin_pcmcia_cf_resources,
268};
269#endif
270
271#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
272static struct platform_device rtc_device = {
273 .name = "rtc-bfin",
274 .id = -1,
275};
276#endif
277
278#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
279static struct resource smc91x_resources[] = {
280 {
281 .name = "smc91x-regs",
282 .start = 0x20300300,
283 .end = 0x20300300 + 16,
284 .flags = IORESOURCE_MEM,
285 }, {
286
287 .start = IRQ_PF7,
288 .end = IRQ_PF7,
289 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
290 },
291};
292static struct platform_device smc91x_device = {
293 .name = "smc91x",
294 .id = 0,
295 .num_resources = ARRAY_SIZE(smc91x_resources),
296 .resource = smc91x_resources,
297};
298#endif
299
300#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
301static struct resource dm9000_resources[] = {
302 [0] = {
303 .start = 0x203FB800,
304 .end = 0x203FB800 + 8,
305 .flags = IORESOURCE_MEM,
306 },
307 [1] = {
308 .start = IRQ_PF9,
309 .end = IRQ_PF9,
310 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
311 },
312};
313
314static struct platform_device dm9000_device = {
315 .name = "dm9000",
316 .id = -1,
317 .num_resources = ARRAY_SIZE(dm9000_resources),
318 .resource = dm9000_resources,
319};
320#endif
321
322#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
323static struct resource sl811_hcd_resources[] = {
324 {
325 .start = 0x20340000,
326 .end = 0x20340000,
327 .flags = IORESOURCE_MEM,
328 }, {
329 .start = 0x20340004,
330 .end = 0x20340004,
331 .flags = IORESOURCE_MEM,
332 }, {
333 .start = CONFIG_USB_SL811_BFIN_IRQ,
334 .end = CONFIG_USB_SL811_BFIN_IRQ,
335 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
336 },
337};
338
339#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
340void sl811_port_power(struct device *dev, int is_on)
341{
342 gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
343 gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
344}
345#endif
346
347static struct sl811_platform_data sl811_priv = {
348 .potpg = 10,
349 .power = 250, /* == 500mA */
350#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
351 .port_power = &sl811_port_power,
352#endif
353};
354
355static struct platform_device sl811_hcd_device = {
356 .name = "sl811-hcd",
357 .id = 0,
358 .dev = {
359 .platform_data = &sl811_priv,
360 },
361 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
362 .resource = sl811_hcd_resources,
363};
364#endif
365
366#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
367static struct resource isp1362_hcd_resources[] = {
368 {
369 .start = 0x20360000,
370 .end = 0x20360000,
371 .flags = IORESOURCE_MEM,
372 }, {
373 .start = 0x20360004,
374 .end = 0x20360004,
375 .flags = IORESOURCE_MEM,
376 }, {
377 .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
378 .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
379 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
380 },
381};
382
383static struct isp1362_platform_data isp1362_priv = {
384 .sel15Kres = 1,
385 .clknotstop = 0,
386 .oc_enable = 0,
387 .int_act_high = 0,
388 .int_edge_triggered = 0,
389 .remote_wakeup_connected = 0,
390 .no_power_switching = 1,
391 .power_switching_mode = 0,
392};
393
394static struct platform_device isp1362_hcd_device = {
395 .name = "isp1362-hcd",
396 .id = 0,
397 .dev = {
398 .platform_data = &isp1362_priv,
399 },
400 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
401 .resource = isp1362_hcd_resources,
402};
403#endif
404
405#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
65319628
GY		 406static struct platform_device bfin_mii_bus = {
407 .name = "bfin_mii_bus",
408};
409
9db144fe
MH		 410static struct platform_device bfin_mac_device = {
411 .name = "bfin_mac",
65319628 412 .dev.platform_data = &bfin_mii_bus,
9db144fe
MH		 413};
414#endif
415
416#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
417static struct resource net2272_bfin_resources[] = {
418 {
419 .start = 0x20300000,
420 .end = 0x20300000 + 0x100,
421 .flags = IORESOURCE_MEM,
422 }, {
423 .start = IRQ_PF7,
424 .end = IRQ_PF7,
425 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
426 },
427};
428
429static struct platform_device net2272_bfin_device = {
430 .name = "net2272",
431 .id = -1,
432 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
433 .resource = net2272_bfin_resources,
434};
435#endif
436
437#if defined(CONFIG_MTD_M25P80) \
438 || defined(CONFIG_MTD_M25P80_MODULE)
439static struct mtd_partition bfin_spi_flash_partitions[] = {
440 {
aa582977 441 .name = "bootloader(spi)",
9db144fe
MH		 442 .size = 0x00040000,
443 .offset = 0,
444 .mask_flags = MTD_CAP_ROM
445 }, {
aa582977 446 .name = "linux kernel(spi)",
9db144fe
MH		 447 .size = MTDPART_SIZ_FULL,
448 .offset = MTDPART_OFS_APPEND,
449 }
450};
451
452static struct flash_platform_data bfin_spi_flash_data = {
453 .name = "m25p80",
454 .parts = bfin_spi_flash_partitions,
455 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
456 .type = "m25p16",
457};
458
459/* SPI flash chip (m25p64) */
460static struct bfin5xx_spi_chip spi_flash_chip_info = {
461 .enable_dma = 0, /* use dma transfer with this chip*/
462 .bits_per_word = 8,
463};
464#endif
465
466#if defined(CONFIG_SPI_ADC_BF533) \
467 || defined(CONFIG_SPI_ADC_BF533_MODULE)
468/* SPI ADC chip */
469static struct bfin5xx_spi_chip spi_adc_chip_info = {
470 .enable_dma = 1, /* use dma transfer with this chip*/
471 .bits_per_word = 16,
472};
473#endif
474
475#if defined(CONFIG_SND_BLACKFIN_AD1836) \
476 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
477static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
478 .enable_dma = 0,
479 .bits_per_word = 16,
480};
481#endif
482
483#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
484static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
485 .enable_dma = 0,
486 .bits_per_word = 16,
487};
488#endif
489
f3f704d3
MH		 490#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
491static struct bfin5xx_spi_chip mmc_spi_chip_info = {
492 .enable_dma = 0,
9db144fe
MH		 493 .bits_per_word = 8,
494};
495#endif
496
497#if defined(CONFIG_PBX)
498static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
499 .ctl_reg = 0x4, /* send zero */
500 .enable_dma = 0,
501 .bits_per_word = 8,
502 .cs_change_per_word = 1,
503};
504#endif
505
506#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
507static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
508 .enable_dma = 0,
509 .bits_per_word = 16,
510};
511
512static const struct ad7877_platform_data bfin_ad7877_ts_info = {
513 .model = 7877,
514 .vref_delay_usecs = 50, /* internal, no capacitor */
515 .x_plate_ohms = 419,
516 .y_plate_ohms = 486,
517 .pressure_max = 1000,
518 .pressure_min = 0,
519 .stopacq_polarity = 1,
520 .first_conversion_delay = 3,
521 .acquisition_time = 1,
522 .averaging = 1,
523 .pen_down_acc_interval = 1,
524};
525#endif
526
527#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
528 && defined(CONFIG_SND_SOC_WM8731_SPI)
529static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
530 .enable_dma = 0,
531 .bits_per_word = 16,
532};
533#endif
534
535#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
536static struct bfin5xx_spi_chip spidev_chip_info = {
537 .enable_dma = 0,
538 .bits_per_word = 8,
539};
540#endif
541
542static struct spi_board_info bfin_spi_board_info[] __initdata = {
543#if defined(CONFIG_MTD_M25P80) \
544 || defined(CONFIG_MTD_M25P80_MODULE)
545 {
546 /* the modalias must be the same as spi device driver name */
547 .modalias = "m25p80", /* Name of spi_driver for this device */
548 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
549 .bus_num = 0, /* Framework bus number */
550 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
551 .platform_data = &bfin_spi_flash_data,
552 .controller_data = &spi_flash_chip_info,
553 .mode = SPI_MODE_3,
554 },
555#endif
556
557#if defined(CONFIG_SPI_ADC_BF533) \
558 || defined(CONFIG_SPI_ADC_BF533_MODULE)
559 {
560 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
561 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
562 .bus_num = 0, /* Framework bus number */
563 .chip_select = 1, /* Framework chip select. */
564 .platform_data = NULL, /* No spi_driver specific config */
565 .controller_data = &spi_adc_chip_info,
566 },
567#endif
568
569#if defined(CONFIG_SND_BLACKFIN_AD1836) \
570 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
571 {
572 .modalias = "ad1836-spi",
573 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
574 .bus_num = 0,
575 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
576 .controller_data = &ad1836_spi_chip_info,
577 },
578#endif
579#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
580 {
581 .modalias = "ad9960-spi",
582 .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
583 .bus_num = 0,
584 .chip_select = 1,
585 .controller_data = &ad9960_spi_chip_info,
586 },
587#endif
f3f704d3 588#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
9db144fe 589 {
f3f704d3
MH		 590 .modalias = "mmc_spi",
591 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
9db144fe 592 .bus_num = 0,
f3f704d3
MH		 593 .chip_select = 5,
594 .controller_data = &mmc_spi_chip_info,
9db144fe
MH		 595 .mode = SPI_MODE_3,
596 },
597#endif
598#if defined(CONFIG_PBX)
599 {
600 .modalias = "fxs-spi",
601 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
602 .bus_num = 0,
603 .chip_select = 8 - CONFIG_J11_JUMPER,
604 .controller_data = &spi_si3xxx_chip_info,
605 .mode = SPI_MODE_3,
606 },
607 {
608 .modalias = "fxo-spi",
609 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
610 .bus_num = 0,
611 .chip_select = 8 - CONFIG_J19_JUMPER,
612 .controller_data = &spi_si3xxx_chip_info,
613 .mode = SPI_MODE_3,
614 },
615#endif
616#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
617 {
618 .modalias = "ad7877",
619 .platform_data = &bfin_ad7877_ts_info,
620 .irq = IRQ_PF8,
621 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
622 .bus_num = 0,
623 .chip_select = 2,
624 .controller_data = &spi_ad7877_chip_info,
625 },
626#endif
627#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
628 && defined(CONFIG_SND_SOC_WM8731_SPI)
629 {
630 .modalias = "wm8731",
631 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
632 .bus_num = 0,
633 .chip_select = 5,
634 .controller_data = &spi_wm8731_chip_info,
635 .mode = SPI_MODE_0,
636 },
637#endif
638#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
639 {
640 .modalias = "spidev",
641 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
642 .bus_num = 0,
643 .chip_select = 1,
644 .controller_data = &spidev_chip_info,
645 },
646#endif
647};
648
649#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
650/* SPI controller data */
651static struct bfin5xx_spi_master bfin_spi0_info = {
652 .num_chipselect = 8,
653 .enable_dma = 1, /* master has the ability to do dma transfer */
654 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
655};
656
657/* SPI (0) */
658static struct resource bfin_spi0_resource[] = {
659 [0] = {
660 .start = SPI0_REGBASE,
661 .end = SPI0_REGBASE + 0xFF,
662 .flags = IORESOURCE_MEM,
663 },
664 [1] = {
665 .start = CH_SPI,
666 .end = CH_SPI,
667 .flags = IORESOURCE_IRQ,
668 },
669};
670
671static struct platform_device bfin_spi0_device = {
672 .name = "bfin-spi",
673 .id = 0, /* Bus number */
674 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
675 .resource = bfin_spi0_resource,
676 .dev = {
677 .platform_data = &bfin_spi0_info, /* Passed to driver */
678 },
679};
680#endif /* spi master and devices */
681
682#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
683static struct platform_device bfin_fb_adv7393_device = {
684 .name = "bfin-adv7393",
685};
686#endif
687
688#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
689static struct resource bfin_uart_resources[] = {
690#ifdef CONFIG_SERIAL_BFIN_UART0
691 {
692 .start = 0xFFC00400,
693 .end = 0xFFC004FF,
694 .flags = IORESOURCE_MEM,
695 },
696#endif
697#ifdef CONFIG_SERIAL_BFIN_UART1
698 {
699 .start = 0xFFC02000,
700 .end = 0xFFC020FF,
701 .flags = IORESOURCE_MEM,
702 },
703#endif
704};
705
706static struct platform_device bfin_uart_device = {
707 .name = "bfin-uart",
708 .id = 1,
709 .num_resources = ARRAY_SIZE(bfin_uart_resources),
710 .resource = bfin_uart_resources,
711};
712#endif
713
714#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
9db144fe 715#ifdef CONFIG_BFIN_SIR0
42bd8bcb 716static struct resource bfin_sir0_resources[] = {
9db144fe
MH		 717 {
718 .start = 0xFFC00400,
719 .end = 0xFFC004FF,
720 .flags = IORESOURCE_MEM,
721 },
42bd8bcb
GY		 722 {
723 .start = IRQ_UART0_RX,
724 .end = IRQ_UART0_RX+1,
725 .flags = IORESOURCE_IRQ,
726 },
727 {
728 .start = CH_UART0_RX,
729 .end = CH_UART0_RX+1,
730 .flags = IORESOURCE_DMA,
731 },
732};
733
734static struct platform_device bfin_sir0_device = {
735 .name = "bfin_sir",
736 .id = 0,
737 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
738 .resource = bfin_sir0_resources,
739};
9db144fe
MH		 740#endif
741#ifdef CONFIG_BFIN_SIR1
42bd8bcb 742static struct resource bfin_sir1_resources[] = {
9db144fe
MH		 743 {
744 .start = 0xFFC02000,
745 .end = 0xFFC020FF,
746 .flags = IORESOURCE_MEM,
747 },
42bd8bcb
GY		 748 {
749 .start = IRQ_UART1_RX,
750 .end = IRQ_UART1_RX+1,
751 .flags = IORESOURCE_IRQ,
752 },
753 {
754 .start = CH_UART1_RX,
755 .end = CH_UART1_RX+1,
756 .flags = IORESOURCE_DMA,
757 },
9db144fe
MH		 758};
759
42bd8bcb 760static struct platform_device bfin_sir1_device = {
9db144fe 761 .name = "bfin_sir",
42bd8bcb
GY		 762 .id = 1,
763 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
764 .resource = bfin_sir1_resources,
9db144fe
MH		 765};
766#endif
42bd8bcb 767#endif
9db144fe
MH		 768
769#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
770static struct resource bfin_twi0_resource[] = {
771 [0] = {
772 .start = TWI0_REGBASE,
773 .end = TWI0_REGBASE,
774 .flags = IORESOURCE_MEM,
775 },
776 [1] = {
777 .start = IRQ_TWI,
778 .end = IRQ_TWI,
779 .flags = IORESOURCE_IRQ,
780 },
781};
782
783static struct platform_device i2c_bfin_twi_device = {
784 .name = "i2c-bfin-twi",
785 .id = 0,
786 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
787 .resource = bfin_twi0_resource,
788};
789#endif
790
9db144fe
MH		 791static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
792#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
793 {
794 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
795 .type = "pcf8574_lcd",
796 },
797#endif
798#if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
799 {
800 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
801 .type = "pcf8574_keypad",
802 .irq = IRQ_PF8,
803 },
804#endif
805};
9db144fe
MH		 806
807#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
808static struct platform_device bfin_sport0_uart_device = {
809 .name = "bfin-sport-uart",
810 .id = 0,
811};
812
813static struct platform_device bfin_sport1_uart_device = {
814 .name = "bfin-sport-uart",
815 .id = 1,
816};
817#endif
818
9db144fe
MH		 819#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
820#include <linux/input.h>
821#include <linux/gpio_keys.h>
822
823static struct gpio_keys_button bfin_gpio_keys_table[] = {
824 {BTN_0, GPIO_PF14, 1, "gpio-keys: BTN0"},
825};
826
827static struct gpio_keys_platform_data bfin_gpio_keys_data = {
828 .buttons = bfin_gpio_keys_table,
829 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
830};
831
832static struct platform_device bfin_device_gpiokeys = {
833 .name = "gpio-keys",
834 .dev = {
835 .platform_data = &bfin_gpio_keys_data,
836 },
837};
838#endif
839
840static struct resource bfin_gpios_resources = {
841 .start = 0,
842 .end = MAX_BLACKFIN_GPIOS - 1,
843 .flags = IORESOURCE_IRQ,
844};
845
846static struct platform_device bfin_gpios_device = {
847 .name = "simple-gpio",
848 .id = -1,
849 .num_resources = 1,
850 .resource = &bfin_gpios_resources,
851};
852
853static const unsigned int cclk_vlev_datasheet[] =
854{
855 VRPAIR(VLEV_100, 400000000),
856 VRPAIR(VLEV_105, 426000000),
857 VRPAIR(VLEV_110, 500000000),
858 VRPAIR(VLEV_115, 533000000),
859 VRPAIR(VLEV_120, 600000000),
860};
861
862static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
863 .tuple_tab = cclk_vlev_datasheet,
864 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
865 .vr_settling_time = 25 /* us */,
866};
867
868static struct platform_device bfin_dpmc = {
869 .name = "bfin dpmc",
870 .dev = {
871 .platform_data = &bfin_dmpc_vreg_data,
872 },
873};
874
875static struct platform_device *stamp_devices[] __initdata = {
876
877 &bfin_dpmc,
878
879#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
880 &bf5xx_nand_device,
881#endif
882
883#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
884 &bfin_pcmcia_cf_device,
885#endif
886
887#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
888 &rtc_device,
889#endif
890
891#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
892 &sl811_hcd_device,
893#endif
894
895#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
896 &isp1362_hcd_device,
897#endif
898
3f375690
MH		 899#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
900 &bfin_isp1760_device,
901#endif
902
9db144fe
MH		 903#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
904 &musb_device,
905#endif
906
907#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
908 &smc91x_device,
909#endif
910
911#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
912 &dm9000_device,
913#endif
914
915#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
65319628 916 &bfin_mii_bus,
9db144fe
MH		 917 &bfin_mac_device,
918#endif
919
920#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
921 &net2272_bfin_device,
922#endif
923
924#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
925 &bfin_spi0_device,
926#endif
927
928#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
929 &bfin_fb_adv7393_device,
930#endif
931
932#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
933 &bfin_uart_device,
934#endif
935
936#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb
GY		 937#ifdef CONFIG_BFIN_SIR0
938 &bfin_sir0_device,
939#endif
940#ifdef CONFIG_BFIN_SIR1
941 &bfin_sir1_device,
942#endif
9db144fe
MH		 943#endif
944
945#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
946 &i2c_bfin_twi_device,
947#endif
948
949#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
950 &bfin_sport0_uart_device,
951 &bfin_sport1_uart_device,
952#endif
953
9db144fe
MH		 954#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
955 &bfin_device_gpiokeys,
956#endif
957
958#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
959 &ezkit_flash_device,
960#endif
961
962 &bfin_gpios_device,
963};
964
7f6678c5 965static int __init cm_init(void)
9db144fe
MH		 966{
967 printk(KERN_INFO "%s(): registering device resources\n", __func__);
9db144fe
MH		 968 i2c_register_board_info(0, bfin_i2c_board_info,
969 ARRAY_SIZE(bfin_i2c_board_info));
9db144fe
MH		 970 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
971 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
9db144fe
MH		 972 return 0;
973}
974
7f6678c5 975arch_initcall(cm_init);
9db144fe
MH		 976
977void native_machine_restart(char *cmd)
978{
979 /* workaround reboot hang when booting from SPI */
980 if ((bfin_read_SYSCR() & 0x7) == 0x3)
b52dae31 981 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
9db144fe
MH		 982}
983
984void bfin_get_ether_addr(char *addr)
985{
986 random_ether_addr(addr);
987 printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
988}
989EXPORT_SYMBOL(bfin_get_ether_addr);
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