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Merge branch 'x86-pat-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[net-next-2.6.git] / arch / avr32 / kernel / ptrace.c
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1/*
2 * Copyright (C) 2004-2006 Atmel Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#undef DEBUG
9#include <linux/kernel.h>
10#include <linux/sched.h>
11#include <linux/mm.h>
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12#include <linux/ptrace.h>
13#include <linux/errno.h>
14#include <linux/user.h>
15#include <linux/security.h>
16#include <linux/unistd.h>
17#include <linux/notifier.h>
18
19#include <asm/traps.h>
20#include <asm/uaccess.h>
21#include <asm/ocd.h>
22#include <asm/mmu_context.h>
1eeb66a1 23#include <linux/kdebug.h>
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24
25static struct pt_regs *get_user_regs(struct task_struct *tsk)
26{
c9f4f06d 27 return (struct pt_regs *)((unsigned long)task_stack_page(tsk) +
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28 THREAD_SIZE - sizeof(struct pt_regs));
29}
30
9e584fbb 31void user_enable_single_step(struct task_struct *tsk)
5f97f7f9 32{
1d839317 33 pr_debug("user_enable_single_step: pid=%u, PC=0x%08lx, SR=0x%08lx\n",
2507bc13 34 tsk->pid, task_pt_regs(tsk)->pc, task_pt_regs(tsk)->sr);
5f97f7f9 35
2507bc13
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36 /*
37 * We can't schedule in Debug mode, so when TIF_BREAKPOINT is
38 * set, the system call or exception handler will do a
39 * breakpoint to enter monitor mode before returning to
40 * userspace.
41 *
42 * The monitor code will then notice that TIF_SINGLE_STEP is
43 * set and return to userspace with single stepping enabled.
44 * The CPU will then enter monitor mode again after exactly
45 * one instruction has been executed, and the monitor code
46 * will then send a SIGTRAP to the process.
47 */
48 set_tsk_thread_flag(tsk, TIF_BREAKPOINT);
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49 set_tsk_thread_flag(tsk, TIF_SINGLE_STEP);
50}
51
1d839317
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52void user_disable_single_step(struct task_struct *child)
53{
54 /* XXX(hch): a no-op here seems wrong.. */
55}
56
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57/*
58 * Called by kernel/ptrace.c when detaching
59 *
60 * Make sure any single step bits, etc. are not set
61 */
62void ptrace_disable(struct task_struct *child)
63{
64 clear_tsk_thread_flag(child, TIF_SINGLE_STEP);
2507bc13 65 clear_tsk_thread_flag(child, TIF_BREAKPOINT);
13b54a50 66 ocd_disable(child);
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67}
68
69/*
70 * Read the word at offset "offset" into the task's "struct user". We
71 * actually access the pt_regs struct stored on the kernel stack.
72 */
73static int ptrace_read_user(struct task_struct *tsk, unsigned long offset,
74 unsigned long __user *data)
75{
76 unsigned long *regs;
77 unsigned long value;
78
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79 if (offset & 3 || offset >= sizeof(struct user)) {
80 printk("ptrace_read_user: invalid offset 0x%08lx\n", offset);
81 return -EIO;
82 }
83
84 regs = (unsigned long *)get_user_regs(tsk);
85
86 value = 0;
87 if (offset < sizeof(struct pt_regs))
88 value = regs[offset / sizeof(regs[0])];
89
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90 pr_debug("ptrace_read_user(%s[%u], %#lx, %p) -> %#lx\n",
91 tsk->comm, tsk->pid, offset, data, value);
92
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93 return put_user(value, data);
94}
95
96/*
97 * Write the word "value" to offset "offset" into the task's "struct
98 * user". We actually access the pt_regs struct stored on the kernel
99 * stack.
100 */
101static int ptrace_write_user(struct task_struct *tsk, unsigned long offset,
102 unsigned long value)
103{
104 unsigned long *regs;
105
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106 pr_debug("ptrace_write_user(%s[%u], %#lx, %#lx)\n",
107 tsk->comm, tsk->pid, offset, value);
108
5f97f7f9 109 if (offset & 3 || offset >= sizeof(struct user)) {
2507bc13 110 pr_debug(" invalid offset 0x%08lx\n", offset);
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111 return -EIO;
112 }
113
114 if (offset >= sizeof(struct pt_regs))
115 return 0;
116
117 regs = (unsigned long *)get_user_regs(tsk);
118 regs[offset / sizeof(regs[0])] = value;
119
120 return 0;
121}
122
123static int ptrace_getregs(struct task_struct *tsk, void __user *uregs)
124{
125 struct pt_regs *regs = get_user_regs(tsk);
126
127 return copy_to_user(uregs, regs, sizeof(*regs)) ? -EFAULT : 0;
128}
129
130static int ptrace_setregs(struct task_struct *tsk, const void __user *uregs)
131{
132 struct pt_regs newregs;
133 int ret;
134
135 ret = -EFAULT;
136 if (copy_from_user(&newregs, uregs, sizeof(newregs)) == 0) {
137 struct pt_regs *regs = get_user_regs(tsk);
138
139 ret = -EINVAL;
140 if (valid_user_regs(&newregs)) {
141 *regs = newregs;
142 ret = 0;
143 }
144 }
145
146 return ret;
147}
148
149long arch_ptrace(struct task_struct *child, long request, long addr, long data)
150{
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151 int ret;
152
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153 switch (request) {
154 /* Read the word at location addr in the child process */
155 case PTRACE_PEEKTEXT:
156 case PTRACE_PEEKDATA:
76647323 157 ret = generic_ptrace_peekdata(child, addr, data);
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158 break;
159
160 case PTRACE_PEEKUSR:
161 ret = ptrace_read_user(child, addr,
162 (unsigned long __user *)data);
163 break;
164
165 /* Write the word in data at location addr */
166 case PTRACE_POKETEXT:
167 case PTRACE_POKEDATA:
f284ce72 168 ret = generic_ptrace_pokedata(child, addr, data);
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169 break;
170
171 case PTRACE_POKEUSR:
172 ret = ptrace_write_user(child, addr, data);
173 break;
174
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175 case PTRACE_GETREGS:
176 ret = ptrace_getregs(child, (void __user *)data);
177 break;
178
179 case PTRACE_SETREGS:
180 ret = ptrace_setregs(child, (const void __user *)data);
181 break;
182
183 default:
184 ret = ptrace_request(child, request, addr, data);
185 break;
186 }
187
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188 return ret;
189}
190
191asmlinkage void syscall_trace(void)
192{
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193 if (!test_thread_flag(TIF_SYSCALL_TRACE))
194 return;
195 if (!(current->ptrace & PT_PTRACED))
196 return;
197
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198 /* The 0x80 provides a way for the tracing parent to
199 * distinguish between a syscall stop and SIGTRAP delivery */
200 ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
201 ? 0x80 : 0));
202
203 /*
204 * this isn't the same as continuing with a signal, but it
205 * will do for normal use. strace only continues with a
206 * signal if the stopping signal is not SIGTRAP. -brl
207 */
208 if (current->exit_code) {
209 pr_debug("syscall_trace: sending signal %d to PID %u\n",
210 current->exit_code, current->pid);
211 send_sig(current->exit_code, current, 1);
212 current->exit_code = 0;
213 }
214}
215
5f97f7f9 216/*
2507bc13
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217 * debug_trampoline() is an assembly stub which will store all user
218 * registers on the stack and execute a breakpoint instruction.
219 *
220 * If we single-step into an exception handler which runs with
221 * interrupts disabled the whole time so it doesn't have to check for
222 * pending work, its return address will be modified so that it ends
223 * up returning to debug_trampoline.
224 *
225 * If the exception handler decides to store the user context and
226 * enable interrupts after all, it will restore the original return
227 * address and status register value. Before it returns, it will
228 * notice that TIF_BREAKPOINT is set and execute a breakpoint
229 * instruction.
5f97f7f9 230 */
2507bc13 231extern void debug_trampoline(void);
5f97f7f9 232
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233asmlinkage struct pt_regs *do_debug(struct pt_regs *regs)
234{
235 struct thread_info *ti;
236 unsigned long trampoline_addr;
237 u32 status;
238 u32 ctrl;
239 int code;
240
241 status = ocd_read(DS);
242 ti = current_thread_info();
243 code = TRAP_BRKPT;
244
245 pr_debug("do_debug: status=0x%08x PC=0x%08lx SR=0x%08lx tif=0x%08lx\n",
246 status, regs->pc, regs->sr, ti->flags);
247
248 if (!user_mode(regs)) {
249 unsigned long die_val = DIE_BREAKPOINT;
250
251 if (status & (1 << OCD_DS_SSS_BIT))
252 die_val = DIE_SSTEP;
253
254 if (notify_die(die_val, "ptrace", regs, 0, 0, SIGTRAP)
255 == NOTIFY_STOP)
256 return regs;
257
258 if ((status & (1 << OCD_DS_SWB_BIT))
259 && test_and_clear_ti_thread_flag(
260 ti, TIF_BREAKPOINT)) {
261 /*
262 * Explicit breakpoint from trampoline or
263 * exception/syscall/interrupt handler.
264 *
265 * The real saved regs are on the stack right
266 * after the ones we saved on entry.
267 */
268 regs++;
269 pr_debug(" -> TIF_BREAKPOINT done, adjusted regs:"
270 "PC=0x%08lx SR=0x%08lx\n",
271 regs->pc, regs->sr);
272 BUG_ON(!user_mode(regs));
273
274 if (test_thread_flag(TIF_SINGLE_STEP)) {
275 pr_debug("Going to do single step...\n");
276 return regs;
277 }
278
279 /*
280 * No TIF_SINGLE_STEP means we're done
281 * stepping over a syscall. Do the trap now.
282 */
283 code = TRAP_TRACE;
284 } else if ((status & (1 << OCD_DS_SSS_BIT))
285 && test_ti_thread_flag(ti, TIF_SINGLE_STEP)) {
286
287 pr_debug("Stepped into something, "
288 "setting TIF_BREAKPOINT...\n");
289 set_ti_thread_flag(ti, TIF_BREAKPOINT);
290
291 /*
292 * We stepped into an exception, interrupt or
293 * syscall handler. Some exception handlers
294 * don't check for pending work, so we need to
295 * set up a trampoline just in case.
296 *
297 * The exception entry code will undo the
298 * trampoline stuff if it does a full context
299 * save (which also means that it'll check for
300 * pending work later.)
301 */
302 if ((regs->sr & MODE_MASK) == MODE_EXCEPTION) {
303 trampoline_addr
304 = (unsigned long)&debug_trampoline;
305
306 pr_debug("Setting up trampoline...\n");
307 ti->rar_saved = sysreg_read(RAR_EX);
308 ti->rsr_saved = sysreg_read(RSR_EX);
309 sysreg_write(RAR_EX, trampoline_addr);
310 sysreg_write(RSR_EX, (MODE_EXCEPTION
311 | SR_EM | SR_GM));
312 BUG_ON(ti->rsr_saved & MODE_MASK);
313 }
314
315 /*
316 * If we stepped into a system call, we
317 * shouldn't do a single step after we return
318 * since the return address is right after the
319 * "scall" instruction we were told to step
320 * over.
321 */
322 if ((regs->sr & MODE_MASK) == MODE_SUPERVISOR) {
323 pr_debug("Supervisor; no single step\n");
324 clear_ti_thread_flag(ti, TIF_SINGLE_STEP);
325 }
326
327 ctrl = ocd_read(DC);
328 ctrl &= ~(1 << OCD_DC_SS_BIT);
329 ocd_write(DC, ctrl);
330
331 return regs;
332 } else {
333 printk(KERN_ERR "Unexpected OCD_DS value: 0x%08x\n",
334 status);
335 printk(KERN_ERR "Thread flags: 0x%08lx\n", ti->flags);
336 die("Unhandled debug trap in kernel mode",
337 regs, SIGTRAP);
338 }
339 } else if (status & (1 << OCD_DS_SSS_BIT)) {
340 /* Single step in user mode */
341 code = TRAP_TRACE;
5f97f7f9 342
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343 ctrl = ocd_read(DC);
344 ctrl &= ~(1 << OCD_DC_SS_BIT);
345 ocd_write(DC, ctrl);
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346 }
347
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348 pr_debug("Sending SIGTRAP: code=%d PC=0x%08lx SR=0x%08lx\n",
349 code, regs->pc, regs->sr);
5f97f7f9 350
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351 clear_thread_flag(TIF_SINGLE_STEP);
352 _exception(SIGTRAP, regs, code, instruction_pointer(regs));
353
354 return regs;
5f97f7f9 355}