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5a7652f2 BM |
1 | # Copyright 2009 Samsung Electronics Co. |
2 | # Byungho Min <bhmin@samsung.com> | |
3 | # | |
4 | # Licensed under GPLv2 | |
5 | ||
6 | config PLAT_S5PC1XX | |
7 | bool | |
8 | depends on ARCH_S5PC1XX | |
9 | default y | |
10 | select PLAT_S3C | |
11 | select ARM_VIC | |
12 | select NO_IOPORT | |
13 | select ARCH_REQUIRE_GPIOLIB | |
45426468 | 14 | select SAMSUNG_CLKSRC |
be97162d | 15 | select SAMSUNG_IRQ_UART |
47101ec7 | 16 | select SAMSUNG_IRQ_VIC_TIMER |
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17 | select S3C_GPIO_TRACK |
18 | select S3C_GPIO_PULL_UPDOWN | |
838c6d49 | 19 | select S5P_GPIO_DRVSTR |
b0d5217c KP |
20 | select S3C_GPIO_CFG_S3C24XX |
21 | select S3C_GPIO_CFG_S3C64XX | |
252b8efe | 22 | select SAMSUNG_GPIOLIB_4BIT |
5a7652f2 BM |
23 | help |
24 | Base platform code for any Samsung S5PC1XX device | |
25 | ||
26 | if PLAT_S5PC1XX | |
27 | ||
28 | # Configuration options shared by all S3C64XX implementations | |
29 | ||
30 | config CPU_S5PC100_INIT | |
31 | bool | |
32 | help | |
33 | Common initialisation code for the S5PC1XX | |
34 | ||
35 | config CPU_S5PC100_CLOCK | |
36 | bool | |
37 | help | |
38 | Common clock support code for the S5PC1XX | |
39 | ||
40 | # platform specific device setup | |
41 | ||
5eda288f | 42 | config S5PC1XX_SETUP_I2C0 |
5a7652f2 BM |
43 | bool |
44 | default y | |
45 | help | |
46 | Common setup code for i2c bus 0. | |
47 | ||
48 | Note, currently since i2c0 is always compiled, this setup helper | |
49 | is always compiled with it. | |
50 | ||
5eda288f | 51 | config S5PC1XX_SETUP_I2C1 |
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52 | bool |
53 | help | |
54 | Common setup code for i2c bus 1. | |
86cd4f5f KP |
55 | |
56 | config S5PC1XX_SETUP_SDHCI_GPIO | |
57 | bool | |
58 | help | |
59 | Common setup code for SDHCI gpio. | |
60 | ||
5a7652f2 | 61 | endif |