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1 | /* linux/include/asm-arm/plat-s3c24xx/map.h |
2 | * | |
3 | * Copyright (c) 2008 Simtec Electronics | |
4 | * Ben Dooks <ben@simtec.co.uk> | |
5 | * | |
6 | * S3C24XX - Memory map definitions | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #ifndef __ASM_PLAT_S3C24XX_MAP_H | |
14 | #define __ASM_PLAT_S3C24XX_MAP_H | |
15 | ||
16 | /* interrupt controller is the first thing we put in, to make | |
17 | * the assembly code for the irq detection easier | |
18 | */ | |
19 | #define S3C24XX_VA_IRQ S3C_VA_IRQ | |
20 | #define S3C2410_PA_IRQ (0x4A000000) | |
21 | #define S3C24XX_SZ_IRQ SZ_1M | |
22 | ||
23 | /* memory controller registers */ | |
24 | #define S3C24XX_VA_MEMCTRL S3C_VA_MEM | |
25 | #define S3C2410_PA_MEMCTRL (0x48000000) | |
26 | #define S3C24XX_SZ_MEMCTRL SZ_1M | |
27 | ||
28 | /* UARTs */ | |
29 | #define S3C24XX_VA_UART S3C_VA_UART | |
30 | #define S3C2410_PA_UART (0x50000000) | |
31 | #define S3C24XX_SZ_UART SZ_1M | |
e1a2bd1d | 32 | #define S3C_UART_OFFSET (0x4000) |
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33 | |
34 | /* Timers */ | |
35 | #define S3C24XX_VA_TIMER S3C_VA_TIMER | |
36 | #define S3C2410_PA_TIMER (0x51000000) | |
37 | #define S3C24XX_SZ_TIMER SZ_1M | |
38 | ||
39 | /* Clock and Power management */ | |
40 | #define S3C24XX_VA_CLKPWR S3C_VA_SYS | |
41 | #define S3C24XX_SZ_CLKPWR SZ_1M | |
42 | ||
43 | /* USB Device port */ | |
44 | #define S3C2410_PA_USBDEV (0x52000000) | |
45 | #define S3C24XX_SZ_USBDEV SZ_1M | |
46 | ||
47 | /* Watchdog */ | |
48 | #define S3C24XX_VA_WATCHDOG S3C_VA_WATCHDOG | |
49 | #define S3C2410_PA_WATCHDOG (0x53000000) | |
50 | #define S3C24XX_SZ_WATCHDOG SZ_1M | |
51 | ||
52 | /* Standard size definitions for peripheral blocks. */ | |
53 | ||
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54 | #define S3C24XX_SZ_IIS SZ_1M |
55 | #define S3C24XX_SZ_ADC SZ_1M | |
56 | #define S3C24XX_SZ_SPI SZ_1M | |
57 | #define S3C24XX_SZ_SDI SZ_1M | |
58 | #define S3C24XX_SZ_NAND SZ_1M | |
59 | #define S3C24XX_SZ_USBHOST SZ_1M | |
60 | ||
61 | /* GPIO ports */ | |
62 | ||
63 | /* the calculation for the VA of this must ensure that | |
64 | * it is the same distance apart from the UART in the | |
65 | * phsyical address space, as the initial mapping for the IO | |
66 | * is done as a 1:1 maping. This puts it (currently) at | |
67 | * 0xFA800000, which is not in the way of any current mapping | |
68 | * by the base system. | |
69 | */ | |
70 | ||
71 | #define S3C2410_PA_GPIO (0x56000000) | |
72 | #define S3C24XX_VA_GPIO ((S3C24XX_PA_GPIO - S3C24XX_PA_UART) + S3C24XX_VA_UART) | |
73 | #define S3C24XX_SZ_GPIO SZ_1M | |
74 | ||
75 | ||
76 | /* ISA style IO, for each machine to sort out mappings for, if it | |
77 | * implements it. We reserve two 16M regions for ISA. | |
78 | */ | |
79 | ||
80 | #define S3C24XX_VA_ISA_WORD S3C2410_ADDR(0x02000000) | |
81 | #define S3C24XX_VA_ISA_BYTE S3C2410_ADDR(0x03000000) | |
82 | ||
83 | /* deal with the registers that move under the 2412/2413 */ | |
84 | ||
85 | #if defined(CONFIG_CPU_S3C2412) || defined(CONFIG_CPU_S3C2413) | |
86 | #ifndef __ASSEMBLY__ | |
87 | extern void __iomem *s3c24xx_va_gpio2; | |
88 | #endif | |
89 | #ifdef CONFIG_CPU_S3C2412_ONLY | |
90 | #define S3C24XX_VA_GPIO2 (S3C24XX_VA_GPIO + 0x10) | |
91 | #else | |
92 | #define S3C24XX_VA_GPIO2 s3c24xx_va_gpio2 | |
93 | #endif | |
94 | #else | |
95 | #define s3c24xx_va_gpio2 S3C24XX_VA_GPIO | |
96 | #define S3C24XX_VA_GPIO2 S3C24XX_VA_GPIO | |
97 | #endif | |
98 | ||
99 | #endif /* __ASM_PLAT_S3C24XX_MAP_H */ |