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1da177e4 LT |
1 | /** |
2 | * @file common.c | |
3 | * | |
4 | * @remark Copyright 2004 Oprofile Authors | |
8c1fc96f | 5 | * @remark Copyright 2010 ARM Ltd. |
1da177e4 LT |
6 | * @remark Read the file COPYING |
7 | * | |
8 | * @author Zwane Mwaikambo | |
8c1fc96f | 9 | * @author Will Deacon [move to perf] |
1da177e4 LT |
10 | */ |
11 | ||
8c1fc96f WD |
12 | #include <linux/cpumask.h> |
13 | #include <linux/errno.h> | |
1da177e4 | 14 | #include <linux/init.h> |
8c1fc96f | 15 | #include <linux/mutex.h> |
1da177e4 | 16 | #include <linux/oprofile.h> |
8c1fc96f | 17 | #include <linux/perf_event.h> |
ae92dc9f | 18 | #include <linux/slab.h> |
1da177e4 | 19 | #include <linux/sysdev.h> |
8c1fc96f WD |
20 | #include <asm/stacktrace.h> |
21 | #include <linux/uaccess.h> | |
22 | ||
23 | #include <asm/perf_event.h> | |
24 | #include <asm/ptrace.h> | |
1da177e4 | 25 | |
8c1fc96f WD |
26 | #ifdef CONFIG_HW_PERF_EVENTS |
27 | /* | |
28 | * Per performance monitor configuration as set via oprofilefs. | |
29 | */ | |
30 | struct op_counter_config { | |
31 | unsigned long count; | |
32 | unsigned long enabled; | |
33 | unsigned long event; | |
34 | unsigned long unit_mask; | |
35 | unsigned long kernel; | |
36 | unsigned long user; | |
37 | struct perf_event_attr attr; | |
38 | }; | |
1da177e4 | 39 | |
55f05234 | 40 | static int op_arm_enabled; |
93ad7949 | 41 | static DEFINE_MUTEX(op_arm_mutex); |
1da177e4 | 42 | |
8c1fc96f WD |
43 | static struct op_counter_config *counter_config; |
44 | static struct perf_event **perf_events[nr_cpumask_bits]; | |
45 | static int perf_num_counters; | |
46 | ||
47 | /* | |
48 | * Overflow callback for oprofile. | |
49 | */ | |
50 | static void op_overflow_handler(struct perf_event *event, int unused, | |
51 | struct perf_sample_data *data, struct pt_regs *regs) | |
52 | { | |
53 | int id; | |
54 | u32 cpu = smp_processor_id(); | |
55 | ||
56 | for (id = 0; id < perf_num_counters; ++id) | |
57 | if (perf_events[cpu][id] == event) | |
58 | break; | |
59 | ||
60 | if (id != perf_num_counters) | |
61 | oprofile_add_sample(regs, id); | |
62 | else | |
63 | pr_warning("oprofile: ignoring spurious overflow " | |
64 | "on cpu %u\n", cpu); | |
65 | } | |
66 | ||
67 | /* | |
68 | * Called by op_arm_setup to create perf attributes to mirror the oprofile | |
69 | * settings in counter_config. Attributes are created as `pinned' events and | |
70 | * so are permanently scheduled on the PMU. | |
71 | */ | |
72 | static void op_perf_setup(void) | |
73 | { | |
74 | int i; | |
75 | u32 size = sizeof(struct perf_event_attr); | |
76 | struct perf_event_attr *attr; | |
77 | ||
78 | for (i = 0; i < perf_num_counters; ++i) { | |
79 | attr = &counter_config[i].attr; | |
80 | memset(attr, 0, size); | |
81 | attr->type = PERF_TYPE_RAW; | |
82 | attr->size = size; | |
83 | attr->config = counter_config[i].event; | |
84 | attr->sample_period = counter_config[i].count; | |
85 | attr->pinned = 1; | |
86 | } | |
87 | } | |
88 | ||
89 | static int op_create_counter(int cpu, int event) | |
90 | { | |
91 | int ret = 0; | |
92 | struct perf_event *pevent; | |
93 | ||
94 | if (!counter_config[event].enabled || (perf_events[cpu][event] != NULL)) | |
95 | return ret; | |
96 | ||
97 | pevent = perf_event_create_kernel_counter(&counter_config[event].attr, | |
98 | cpu, -1, | |
99 | op_overflow_handler); | |
100 | ||
101 | if (IS_ERR(pevent)) { | |
102 | ret = PTR_ERR(pevent); | |
103 | } else if (pevent->state != PERF_EVENT_STATE_ACTIVE) { | |
104 | pr_warning("oprofile: failed to enable event %d " | |
105 | "on CPU %d\n", event, cpu); | |
106 | ret = -EBUSY; | |
107 | } else { | |
108 | perf_events[cpu][event] = pevent; | |
109 | } | |
110 | ||
111 | return ret; | |
112 | } | |
113 | ||
114 | static void op_destroy_counter(int cpu, int event) | |
115 | { | |
116 | struct perf_event *pevent = perf_events[cpu][event]; | |
117 | ||
118 | if (pevent) { | |
119 | perf_event_release_kernel(pevent); | |
120 | perf_events[cpu][event] = NULL; | |
121 | } | |
122 | } | |
123 | ||
124 | /* | |
125 | * Called by op_arm_start to create active perf events based on the | |
126 | * perviously configured attributes. | |
127 | */ | |
128 | static int op_perf_start(void) | |
129 | { | |
130 | int cpu, event, ret = 0; | |
131 | ||
132 | for_each_online_cpu(cpu) { | |
133 | for (event = 0; event < perf_num_counters; ++event) { | |
134 | ret = op_create_counter(cpu, event); | |
135 | if (ret) | |
136 | goto out; | |
137 | } | |
138 | } | |
139 | ||
140 | out: | |
141 | return ret; | |
142 | } | |
143 | ||
144 | /* | |
145 | * Called by op_arm_stop at the end of a profiling run. | |
146 | */ | |
147 | static void op_perf_stop(void) | |
148 | { | |
149 | int cpu, event; | |
150 | ||
151 | for_each_online_cpu(cpu) | |
152 | for (event = 0; event < perf_num_counters; ++event) | |
153 | op_destroy_counter(cpu, event); | |
154 | } | |
155 | ||
156 | ||
157 | static char *op_name_from_perf_id(enum arm_perf_pmu_ids id) | |
158 | { | |
159 | switch (id) { | |
160 | case ARM_PERF_PMU_ID_XSCALE1: | |
161 | return "arm/xscale1"; | |
162 | case ARM_PERF_PMU_ID_XSCALE2: | |
163 | return "arm/xscale2"; | |
164 | case ARM_PERF_PMU_ID_V6: | |
165 | return "arm/armv6"; | |
166 | case ARM_PERF_PMU_ID_V6MP: | |
167 | return "arm/mpcore"; | |
168 | case ARM_PERF_PMU_ID_CA8: | |
169 | return "arm/armv7"; | |
170 | case ARM_PERF_PMU_ID_CA9: | |
171 | return "arm/armv7-ca9"; | |
172 | default: | |
173 | return NULL; | |
174 | } | |
175 | } | |
1da177e4 | 176 | |
55f05234 | 177 | static int op_arm_create_files(struct super_block *sb, struct dentry *root) |
1da177e4 LT |
178 | { |
179 | unsigned int i; | |
180 | ||
8c1fc96f | 181 | for (i = 0; i < perf_num_counters; i++) { |
1da177e4 | 182 | struct dentry *dir; |
ae92dc9f | 183 | char buf[4]; |
1da177e4 LT |
184 | |
185 | snprintf(buf, sizeof buf, "%d", i); | |
186 | dir = oprofilefs_mkdir(sb, root, buf); | |
187 | oprofilefs_create_ulong(sb, dir, "enabled", &counter_config[i].enabled); | |
188 | oprofilefs_create_ulong(sb, dir, "event", &counter_config[i].event); | |
189 | oprofilefs_create_ulong(sb, dir, "count", &counter_config[i].count); | |
190 | oprofilefs_create_ulong(sb, dir, "unit_mask", &counter_config[i].unit_mask); | |
191 | oprofilefs_create_ulong(sb, dir, "kernel", &counter_config[i].kernel); | |
192 | oprofilefs_create_ulong(sb, dir, "user", &counter_config[i].user); | |
193 | } | |
194 | ||
195 | return 0; | |
196 | } | |
197 | ||
55f05234 | 198 | static int op_arm_setup(void) |
1da177e4 | 199 | { |
1da177e4 | 200 | spin_lock(&oprofilefs_lock); |
8c1fc96f | 201 | op_perf_setup(); |
1da177e4 | 202 | spin_unlock(&oprofilefs_lock); |
8c1fc96f | 203 | return 0; |
1da177e4 LT |
204 | } |
205 | ||
55f05234 | 206 | static int op_arm_start(void) |
1da177e4 LT |
207 | { |
208 | int ret = -EBUSY; | |
209 | ||
93ad7949 | 210 | mutex_lock(&op_arm_mutex); |
55f05234 | 211 | if (!op_arm_enabled) { |
8c1fc96f WD |
212 | ret = 0; |
213 | op_perf_start(); | |
214 | op_arm_enabled = 1; | |
1da177e4 | 215 | } |
93ad7949 | 216 | mutex_unlock(&op_arm_mutex); |
1da177e4 LT |
217 | return ret; |
218 | } | |
219 | ||
55f05234 | 220 | static void op_arm_stop(void) |
1da177e4 | 221 | { |
93ad7949 | 222 | mutex_lock(&op_arm_mutex); |
55f05234 | 223 | if (op_arm_enabled) |
8c1fc96f | 224 | op_perf_stop(); |
55f05234 | 225 | op_arm_enabled = 0; |
93ad7949 | 226 | mutex_unlock(&op_arm_mutex); |
1da177e4 LT |
227 | } |
228 | ||
b5893c56 | 229 | #ifdef CONFIG_PM |
55f05234 | 230 | static int op_arm_suspend(struct sys_device *dev, pm_message_t state) |
b5893c56 | 231 | { |
93ad7949 | 232 | mutex_lock(&op_arm_mutex); |
55f05234 | 233 | if (op_arm_enabled) |
8c1fc96f | 234 | op_perf_stop(); |
93ad7949 | 235 | mutex_unlock(&op_arm_mutex); |
b5893c56 RK |
236 | return 0; |
237 | } | |
238 | ||
55f05234 | 239 | static int op_arm_resume(struct sys_device *dev) |
b5893c56 | 240 | { |
93ad7949 | 241 | mutex_lock(&op_arm_mutex); |
8c1fc96f | 242 | if (op_arm_enabled && op_perf_start()) |
55f05234 | 243 | op_arm_enabled = 0; |
93ad7949 | 244 | mutex_unlock(&op_arm_mutex); |
b5893c56 RK |
245 | return 0; |
246 | } | |
247 | ||
248 | static struct sysdev_class oprofile_sysclass = { | |
af5ca3f4 | 249 | .name = "oprofile", |
55f05234 RK |
250 | .resume = op_arm_resume, |
251 | .suspend = op_arm_suspend, | |
b5893c56 RK |
252 | }; |
253 | ||
254 | static struct sys_device device_oprofile = { | |
255 | .id = 0, | |
256 | .cls = &oprofile_sysclass, | |
257 | }; | |
258 | ||
259 | static int __init init_driverfs(void) | |
260 | { | |
261 | int ret; | |
262 | ||
263 | if (!(ret = sysdev_class_register(&oprofile_sysclass))) | |
264 | ret = sysdev_register(&device_oprofile); | |
265 | ||
266 | return ret; | |
267 | } | |
268 | ||
269 | static void exit_driverfs(void) | |
270 | { | |
271 | sysdev_unregister(&device_oprofile); | |
272 | sysdev_class_unregister(&oprofile_sysclass); | |
273 | } | |
274 | #else | |
275 | #define init_driverfs() do { } while (0) | |
276 | #define exit_driverfs() do { } while (0) | |
277 | #endif /* CONFIG_PM */ | |
278 | ||
8c1fc96f | 279 | static int report_trace(struct stackframe *frame, void *d) |
1da177e4 | 280 | { |
8c1fc96f | 281 | unsigned int *depth = d; |
c6b9dafc | 282 | |
8c1fc96f WD |
283 | if (*depth) { |
284 | oprofile_add_trace(frame->pc); | |
285 | (*depth)--; | |
286 | } | |
1b7b5698 | 287 | |
8c1fc96f WD |
288 | return *depth == 0; |
289 | } | |
c6b9dafc | 290 | |
8c1fc96f WD |
291 | /* |
292 | * The registers we're interested in are at the end of the variable | |
293 | * length saved register structure. The fp points at the end of this | |
294 | * structure so the address of this struct is: | |
295 | * (struct frame_tail *)(xxx->fp)-1 | |
296 | */ | |
297 | struct frame_tail { | |
298 | struct frame_tail *fp; | |
299 | unsigned long sp; | |
300 | unsigned long lr; | |
301 | } __attribute__((packed)); | |
2d9e1ae0 | 302 | |
8c1fc96f WD |
303 | static struct frame_tail* user_backtrace(struct frame_tail *tail) |
304 | { | |
305 | struct frame_tail buftail[2]; | |
10c03f69 | 306 | |
8c1fc96f WD |
307 | /* Also check accessibility of one struct frame_tail beyond */ |
308 | if (!access_ok(VERIFY_READ, tail, sizeof(buftail))) | |
309 | return NULL; | |
310 | if (__copy_from_user_inatomic(buftail, tail, sizeof(buftail))) | |
311 | return NULL; | |
d7ac4e28 | 312 | |
8c1fc96f | 313 | oprofile_add_trace(buftail[0].lr); |
c6b9dafc | 314 | |
8c1fc96f WD |
315 | /* frame pointers should strictly progress back up the stack |
316 | * (towards higher addresses) */ | |
317 | if (tail >= buftail[0].fp) | |
318 | return NULL; | |
319 | ||
320 | return buftail[0].fp-1; | |
321 | } | |
322 | ||
323 | static void arm_backtrace(struct pt_regs * const regs, unsigned int depth) | |
324 | { | |
325 | struct frame_tail *tail = ((struct frame_tail *) regs->ARM_fp) - 1; | |
326 | ||
327 | if (!user_mode(regs)) { | |
328 | struct stackframe frame; | |
329 | frame.fp = regs->ARM_fp; | |
330 | frame.sp = regs->ARM_sp; | |
331 | frame.lr = regs->ARM_lr; | |
332 | frame.pc = regs->ARM_pc; | |
333 | walk_stackframe(&frame, report_trace, &depth); | |
334 | return; | |
335 | } | |
336 | ||
337 | while (depth-- && tail && !((unsigned long) tail & 3)) | |
338 | tail = user_backtrace(tail); | |
339 | } | |
340 | ||
341 | int __init oprofile_arch_init(struct oprofile_operations *ops) | |
342 | { | |
343 | int cpu, ret = 0; | |
344 | ||
345 | perf_num_counters = armpmu_get_max_events(); | |
346 | ||
347 | counter_config = kcalloc(perf_num_counters, | |
348 | sizeof(struct op_counter_config), GFP_KERNEL); | |
ae92dc9f | 349 | |
8c1fc96f WD |
350 | if (!counter_config) { |
351 | pr_info("oprofile: failed to allocate %d " | |
352 | "counters\n", perf_num_counters); | |
353 | return -ENOMEM; | |
c6b9dafc | 354 | } |
1da177e4 | 355 | |
8c1fc96f WD |
356 | for_each_possible_cpu(cpu) { |
357 | perf_events[cpu] = kcalloc(perf_num_counters, | |
358 | sizeof(struct perf_event *), GFP_KERNEL); | |
359 | if (!perf_events[cpu]) { | |
360 | pr_info("oprofile: failed to allocate %d perf events " | |
361 | "for cpu %d\n", perf_num_counters, cpu); | |
362 | while (--cpu >= 0) | |
363 | kfree(perf_events[cpu]); | |
364 | return -ENOMEM; | |
365 | } | |
366 | } | |
367 | ||
368 | init_driverfs(); | |
369 | ops->backtrace = arm_backtrace; | |
370 | ops->create_files = op_arm_create_files; | |
371 | ops->setup = op_arm_setup; | |
372 | ops->start = op_arm_start; | |
373 | ops->stop = op_arm_stop; | |
374 | ops->shutdown = op_arm_stop; | |
375 | ops->cpu_type = op_name_from_perf_id(armpmu_get_pmu_id()); | |
376 | ||
377 | if (!ops->cpu_type) | |
378 | ret = -ENODEV; | |
379 | else | |
380 | pr_info("oprofile: using %s\n", ops->cpu_type); | |
381 | ||
c6b9dafc | 382 | return ret; |
1da177e4 LT |
383 | } |
384 | ||
c6b9dafc | 385 | void oprofile_arch_exit(void) |
1da177e4 | 386 | { |
8c1fc96f WD |
387 | int cpu, id; |
388 | struct perf_event *event; | |
389 | ||
390 | if (*perf_events) { | |
1da177e4 | 391 | exit_driverfs(); |
8c1fc96f WD |
392 | for_each_possible_cpu(cpu) { |
393 | for (id = 0; id < perf_num_counters; ++id) { | |
394 | event = perf_events[cpu][id]; | |
395 | if (event != NULL) | |
396 | perf_event_release_kernel(event); | |
397 | } | |
398 | kfree(perf_events[cpu]); | |
399 | } | |
1da177e4 | 400 | } |
8c1fc96f WD |
401 | |
402 | if (counter_config) | |
403 | kfree(counter_config); | |
404 | } | |
405 | #else | |
406 | int __init oprofile_arch_init(struct oprofile_operations *ops) | |
407 | { | |
408 | pr_info("oprofile: hardware counters not available\n"); | |
409 | return -ENODEV; | |
1da177e4 | 410 | } |
8c1fc96f WD |
411 | void oprofile_arch_exit(void) {} |
412 | #endif /* CONFIG_HW_PERF_EVENTS */ |