]> bbs.cooldavid.org Git - net-next-2.6.git/blame - arch/arm/mm/copypage-v6.c
ARM: 5794/1: Flush the D-cache during copy_user_highpage()
[net-next-2.6.git] / arch / arm / mm / copypage-v6.c
CommitLineData
1da177e4
LT
1/*
2 * linux/arch/arm/mm/copypage-v6.c
3 *
4 * Copyright (C) 2002 Deep Blue Solutions Ltd, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <linux/init.h>
11#include <linux/spinlock.h>
12#include <linux/mm.h>
063b0a42 13#include <linux/highmem.h>
1da177e4 14
1da177e4
LT
15#include <asm/pgtable.h>
16#include <asm/shmparam.h>
17#include <asm/tlbflush.h>
18#include <asm/cacheflush.h>
46097c7d 19#include <asm/cachetype.h>
1da177e4 20
1b2e2b73
RK
21#include "mm.h"
22
1da177e4
LT
23#if SHMLBA > 16384
24#error FIX ME
25#endif
26
27#define from_address (0xffff8000)
1da177e4 28#define to_address (0xffffc000)
1da177e4 29
1da177e4
LT
30static DEFINE_SPINLOCK(v6_lock);
31
1da177e4
LT
32/*
33 * Copy the user page. No aliasing to deal with so we can just
34 * attack the kernel's existing mapping of these pages.
35 */
063b0a42
RK
36static void v6_copy_user_highpage_nonaliasing(struct page *to,
37 struct page *from, unsigned long vaddr)
1da177e4 38{
063b0a42
RK
39 void *kto, *kfrom;
40
41 kfrom = kmap_atomic(from, KM_USER0);
42 kto = kmap_atomic(to, KM_USER1);
1da177e4 43 copy_page(kto, kfrom);
115b2247
CM
44#ifdef CONFIG_HIGHMEM
45 /*
46 * kmap_atomic() doesn't set the page virtual address, and
47 * kunmap_atomic() takes care of cache flushing already.
48 */
49 if (page_address(to) != NULL)
50#endif
51 __cpuc_flush_dcache_page(kto);
063b0a42
RK
52 kunmap_atomic(kto, KM_USER1);
53 kunmap_atomic(kfrom, KM_USER0);
1da177e4
LT
54}
55
56/*
57 * Clear the user page. No aliasing to deal with so we can just
58 * attack the kernel's existing mapping of this page.
59 */
303c6443 60static void v6_clear_user_highpage_nonaliasing(struct page *page, unsigned long vaddr)
1da177e4 61{
303c6443 62 void *kaddr = kmap_atomic(page, KM_USER0);
1da177e4 63 clear_page(kaddr);
303c6443 64 kunmap_atomic(kaddr, KM_USER0);
1da177e4
LT
65}
66
67/*
063b0a42
RK
68 * Discard data in the kernel mapping for the new page.
69 * FIXME: needs this MCRR to be supported.
1da177e4 70 */
063b0a42 71static void discard_old_kernel_data(void *kto)
1da177e4 72{
1da177e4
LT
73 __asm__("mcrr p15, 0, %1, %0, c6 @ 0xec401f06"
74 :
75 : "r" (kto),
76 "r" ((unsigned long)kto + PAGE_SIZE - L1_CACHE_BYTES)
77 : "cc");
063b0a42
RK
78}
79
80/*
81 * Copy the page, taking account of the cache colour.
82 */
83static void v6_copy_user_highpage_aliasing(struct page *to,
84 struct page *from, unsigned long vaddr)
85{
86 unsigned int offset = CACHE_COLOUR(vaddr);
87 unsigned long kfrom, kto;
88
89 if (test_and_clear_bit(PG_dcache_dirty, &from->flags))
90 __flush_dcache_page(page_mapping(from), from);
91
92 /* FIXME: not highmem safe */
93 discard_old_kernel_data(page_address(to));
1da177e4
LT
94
95 /*
96 * Now copy the page using the same cache colour as the
97 * pages ultimate destination.
98 */
99 spin_lock(&v6_lock);
100
063b0a42
RK
101 set_pte_ext(TOP_PTE(from_address) + offset, pfn_pte(page_to_pfn(from), PAGE_KERNEL), 0);
102 set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(page_to_pfn(to), PAGE_KERNEL), 0);
1da177e4 103
063b0a42
RK
104 kfrom = from_address + (offset << PAGE_SHIFT);
105 kto = to_address + (offset << PAGE_SHIFT);
1da177e4 106
063b0a42
RK
107 flush_tlb_kernel_page(kfrom);
108 flush_tlb_kernel_page(kto);
1da177e4 109
063b0a42 110 copy_page((void *)kto, (void *)kfrom);
1da177e4
LT
111
112 spin_unlock(&v6_lock);
113}
114
115/*
116 * Clear the user page. We need to deal with the aliasing issues,
117 * so remap the kernel page into the same cache colour as the user
118 * page.
119 */
303c6443 120static void v6_clear_user_highpage_aliasing(struct page *page, unsigned long vaddr)
1da177e4 121{
b8a9b66f 122 unsigned int offset = CACHE_COLOUR(vaddr);
1da177e4
LT
123 unsigned long to = to_address + (offset << PAGE_SHIFT);
124
303c6443
RK
125 /* FIXME: not highmem safe */
126 discard_old_kernel_data(page_address(page));
1da177e4
LT
127
128 /*
129 * Now clear the page using the same cache colour as
130 * the pages ultimate destination.
131 */
132 spin_lock(&v6_lock);
133
303c6443 134 set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(page_to_pfn(page), PAGE_KERNEL), 0);
1da177e4
LT
135 flush_tlb_kernel_page(to);
136 clear_page((void *)to);
137
138 spin_unlock(&v6_lock);
139}
140
141struct cpu_user_fns v6_user_fns __initdata = {
303c6443 142 .cpu_clear_user_highpage = v6_clear_user_highpage_nonaliasing,
063b0a42 143 .cpu_copy_user_highpage = v6_copy_user_highpage_nonaliasing,
1da177e4
LT
144};
145
146static int __init v6_userpage_init(void)
147{
148 if (cache_is_vipt_aliasing()) {
303c6443 149 cpu_user.cpu_clear_user_highpage = v6_clear_user_highpage_aliasing;
063b0a42 150 cpu_user.cpu_copy_user_highpage = v6_copy_user_highpage_aliasing;
1da177e4
LT
151 }
152
153 return 0;
154}
155
08ee4e4c 156core_initcall(v6_userpage_init);