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86e5e38c | 1 | /* |
6e23fcb3 | 2 | * Support for Compaq iPAQ H3100 and H3600 handheld computers (common code) |
86e5e38c | 3 | * |
6e23fcb3 DA |
4 | * Copyright (c) 2000,1 Compaq Computer Corporation. (Author: Jamey Hicks) |
5 | * Copyright (c) 2009 Dmitry Artamonow <mad_soft@inbox.ru> | |
86e5e38c | 6 | * |
6e23fcb3 DA |
7 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
86e5e38c DA |
10 | * |
11 | */ | |
6e23fcb3 | 12 | |
86e5e38c | 13 | #include <linux/kernel.h> |
4aa97555 | 14 | #include <linux/gpio.h> |
86e5e38c DA |
15 | #include <linux/mfd/htc-egpio.h> |
16 | #include <linux/mtd/mtd.h> | |
17 | #include <linux/mtd/partitions.h> | |
86e5e38c | 18 | #include <linux/platform_device.h> |
4aa97555 | 19 | #include <linux/serial_core.h> |
86e5e38c | 20 | |
86e5e38c | 21 | #include <asm/mach/flash.h> |
86e5e38c DA |
22 | #include <asm/mach/map.h> |
23 | #include <asm/mach/serial_sa1100.h> | |
24 | ||
25 | #include <mach/h3xxx.h> | |
26 | ||
27 | #include "generic.h" | |
28 | ||
29 | void h3xxx_init_gpio(struct gpio_default_state *s, size_t n) | |
30 | { | |
31 | while (n--) { | |
32 | const char *name = s->name; | |
33 | int err; | |
34 | ||
35 | if (!name) | |
36 | name = "[init]"; | |
37 | err = gpio_request(s->gpio, name); | |
38 | if (err) { | |
39 | printk(KERN_ERR "gpio%u: unable to request: %d\n", | |
40 | s->gpio, err); | |
41 | continue; | |
42 | } | |
43 | if (s->mode >= 0) { | |
44 | err = gpio_direction_output(s->gpio, s->mode); | |
45 | } else { | |
46 | err = gpio_direction_input(s->gpio); | |
47 | } | |
48 | if (err) { | |
49 | printk(KERN_ERR "gpio%u: unable to set direction: %d\n", | |
50 | s->gpio, err); | |
51 | continue; | |
52 | } | |
53 | if (!s->name) | |
54 | gpio_free(s->gpio); | |
55 | s++; | |
56 | } | |
57 | } | |
58 | ||
59 | ||
60 | /* | |
61 | * H3xxx flash support | |
62 | */ | |
63 | static struct mtd_partition h3xxx_partitions[] = { | |
64 | { | |
65 | .name = "H3XXX boot firmware", | |
66 | .size = 0x00040000, | |
67 | .offset = 0, | |
68 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
69 | }, { | |
70 | .name = "H3XXX rootfs", | |
71 | .size = MTDPART_SIZ_FULL, | |
72 | .offset = 0x00040000, | |
73 | } | |
74 | }; | |
75 | ||
76 | static void h3xxx_set_vpp(int vpp) | |
77 | { | |
78 | gpio_set_value(H3XXX_EGPIO_VPP_ON, vpp); | |
79 | } | |
80 | ||
81 | static int h3xxx_flash_init(void) | |
82 | { | |
83 | int err = gpio_request(H3XXX_EGPIO_VPP_ON, "Flash Vpp"); | |
84 | if (err) | |
85 | return err; | |
86 | ||
87 | err = gpio_direction_output(H3XXX_EGPIO_VPP_ON, 0); | |
88 | if (err) | |
89 | gpio_free(H3XXX_EGPIO_VPP_ON); | |
90 | ||
91 | return err; | |
92 | } | |
93 | ||
94 | static void h3xxx_flash_exit(void) | |
95 | { | |
96 | gpio_free(H3XXX_EGPIO_VPP_ON); | |
97 | } | |
98 | ||
99 | static struct flash_platform_data h3xxx_flash_data = { | |
100 | .map_name = "cfi_probe", | |
101 | .set_vpp = h3xxx_set_vpp, | |
102 | .init = h3xxx_flash_init, | |
103 | .exit = h3xxx_flash_exit, | |
104 | .parts = h3xxx_partitions, | |
105 | .nr_parts = ARRAY_SIZE(h3xxx_partitions), | |
106 | }; | |
107 | ||
108 | static struct resource h3xxx_flash_resource = { | |
109 | .start = SA1100_CS0_PHYS, | |
110 | .end = SA1100_CS0_PHYS + SZ_32M - 1, | |
111 | .flags = IORESOURCE_MEM, | |
112 | }; | |
113 | ||
114 | ||
115 | /* | |
116 | * H3xxx uart support | |
117 | */ | |
118 | static void h3xxx_uart_set_mctrl(struct uart_port *port, u_int mctrl) | |
119 | { | |
120 | if (port->mapbase == _Ser3UTCR0) { | |
121 | gpio_set_value(H3XXX_GPIO_COM_RTS, !(mctrl & TIOCM_RTS)); | |
122 | } | |
123 | } | |
124 | ||
125 | static u_int h3xxx_uart_get_mctrl(struct uart_port *port) | |
126 | { | |
127 | u_int ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR; | |
128 | ||
129 | if (port->mapbase == _Ser3UTCR0) { | |
130 | /* | |
131 | * DCD and CTS bits are inverted in GPLR by RS232 transceiver | |
132 | */ | |
133 | if (gpio_get_value(H3XXX_GPIO_COM_DCD)) | |
134 | ret &= ~TIOCM_CD; | |
135 | if (gpio_get_value(H3XXX_GPIO_COM_CTS)) | |
136 | ret &= ~TIOCM_CTS; | |
137 | } | |
138 | ||
139 | return ret; | |
140 | } | |
141 | ||
142 | static void h3xxx_uart_pm(struct uart_port *port, u_int state, u_int oldstate) | |
143 | { | |
144 | if (port->mapbase == _Ser3UTCR0) | |
145 | if (!gpio_request(H3XXX_EGPIO_RS232_ON, "RS232 transceiver")) { | |
146 | gpio_direction_output(H3XXX_EGPIO_RS232_ON, !state); | |
147 | gpio_free(H3XXX_EGPIO_RS232_ON); | |
148 | } | |
149 | } | |
150 | ||
151 | /* | |
152 | * Enable/Disable wake up events for this serial port. | |
153 | * Obviously, we only support this on the normal COM port. | |
154 | */ | |
155 | static int h3xxx_uart_set_wake(struct uart_port *port, u_int enable) | |
156 | { | |
157 | int err = -EINVAL; | |
158 | ||
159 | if (port->mapbase == _Ser3UTCR0) { | |
160 | if (enable) | |
161 | PWER |= PWER_GPIO23 | PWER_GPIO25; /* DCD and CTS */ | |
162 | else | |
163 | PWER &= ~(PWER_GPIO23 | PWER_GPIO25); /* DCD and CTS */ | |
164 | err = 0; | |
165 | } | |
166 | return err; | |
167 | } | |
168 | ||
169 | static struct sa1100_port_fns h3xxx_port_fns __initdata = { | |
170 | .set_mctrl = h3xxx_uart_set_mctrl, | |
171 | .get_mctrl = h3xxx_uart_get_mctrl, | |
172 | .pm = h3xxx_uart_pm, | |
173 | .set_wake = h3xxx_uart_set_wake, | |
174 | }; | |
175 | ||
176 | /* | |
177 | * EGPIO | |
178 | */ | |
179 | ||
180 | static struct resource egpio_resources[] = { | |
181 | [0] = { | |
182 | .start = H3600_EGPIO_PHYS, | |
183 | .end = H3600_EGPIO_PHYS + 0x4 - 1, | |
184 | .flags = IORESOURCE_MEM, | |
185 | }, | |
186 | }; | |
187 | ||
188 | static struct htc_egpio_chip egpio_chips[] = { | |
189 | [0] = { | |
190 | .reg_start = 0, | |
191 | .gpio_base = H3XXX_EGPIO_BASE, | |
192 | .num_gpios = 16, | |
193 | .direction = HTC_EGPIO_OUTPUT, | |
194 | .initial_values = 0x0080, /* H3XXX_EGPIO_RS232_ON */ | |
195 | }, | |
196 | }; | |
197 | ||
198 | static struct htc_egpio_platform_data egpio_info = { | |
199 | .reg_width = 16, | |
200 | .bus_width = 16, | |
201 | .chip = egpio_chips, | |
202 | .num_chips = ARRAY_SIZE(egpio_chips), | |
203 | }; | |
204 | ||
205 | static struct platform_device h3xxx_egpio = { | |
206 | .name = "htc-egpio", | |
207 | .id = -1, | |
208 | .resource = egpio_resources, | |
209 | .num_resources = ARRAY_SIZE(egpio_resources), | |
210 | .dev = { | |
211 | .platform_data = &egpio_info, | |
212 | }, | |
213 | }; | |
214 | ||
215 | static struct platform_device *h3xxx_devices[] = { | |
216 | &h3xxx_egpio, | |
217 | }; | |
218 | ||
219 | void __init h3xxx_mach_init(void) | |
220 | { | |
221 | sa1100_register_uart_fns(&h3xxx_port_fns); | |
222 | sa11x0_register_mtd(&h3xxx_flash_data, &h3xxx_flash_resource, 1); | |
223 | platform_add_devices(h3xxx_devices, ARRAY_SIZE(h3xxx_devices)); | |
224 | } | |
225 | ||
226 | static struct map_desc h3600_io_desc[] __initdata = { | |
227 | { /* static memory bank 2 CS#2 */ | |
228 | .virtual = H3600_BANK_2_VIRT, | |
229 | .pfn = __phys_to_pfn(SA1100_CS2_PHYS), | |
230 | .length = 0x02800000, | |
231 | .type = MT_DEVICE | |
232 | }, { /* static memory bank 4 CS#4 */ | |
233 | .virtual = H3600_BANK_4_VIRT, | |
234 | .pfn = __phys_to_pfn(SA1100_CS4_PHYS), | |
235 | .length = 0x00800000, | |
236 | .type = MT_DEVICE | |
237 | }, { /* EGPIO 0 CS#5 */ | |
238 | .virtual = H3600_EGPIO_VIRT, | |
239 | .pfn = __phys_to_pfn(H3600_EGPIO_PHYS), | |
240 | .length = 0x01000000, | |
241 | .type = MT_DEVICE | |
242 | } | |
243 | }; | |
244 | ||
245 | /* | |
246 | * Common map_io initialization | |
247 | */ | |
248 | ||
249 | void __init h3xxx_map_io(void) | |
250 | { | |
251 | sa1100_map_io(); | |
252 | iotable_init(h3600_io_desc, ARRAY_SIZE(h3600_io_desc)); | |
253 | ||
254 | sa1100_register_uart(0, 3); /* Common serial port */ | |
255 | // sa1100_register_uart(1, 1); /* Microcontroller on 3100/3600 */ | |
256 | ||
257 | /* Ensure those pins are outputs and driving low */ | |
258 | PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM; | |
259 | PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM); | |
260 | ||
261 | /* Configure suspend conditions */ | |
262 | PGSR = 0; | |
263 | PWER = PWER_GPIO0; | |
264 | PCFR = PCFR_OPDE; | |
265 | PSDR = 0; | |
266 | ||
267 | GPCR = 0x0fffffff; /* All outputs are set low by default */ | |
268 | GPDR = 0; /* Configure all GPIOs as input */ | |
269 | } | |
270 |