[net-next-2.6.git] / arch / arm / mach-s5pc100 / dma.c

/*
 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
 *	Jaswinder Singh <jassi.brar@samsung.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <linux/platform_device.h>
#include <linux/dma-mapping.h>

#include <plat/devs.h>

#include <mach/map.h>
#include <mach/irqs.h>

#include <plat/s3c-pl330-pdata.h>

static u64 dma_dmamask = DMA_BIT_MASK(32);

static struct resource s5pc100_pdma0_resource[] = {
	[0] = {
		.start  = S5PC100_PA_PDMA0,
		.end    = S5PC100_PA_PDMA0 + SZ_4K,
		.flags = IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_PDMA0,
		.end	= IRQ_PDMA0,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct s3c_pl330_platdata s5pc100_pdma0_pdata = {
	.peri = {
		[0] = DMACH_UART0_RX,
		[1] = DMACH_UART0_TX,
		[2] = DMACH_UART1_RX,
		[3] = DMACH_UART1_TX,
		[4] = DMACH_UART2_RX,
		[5] = DMACH_UART2_TX,
		[6] = DMACH_UART3_RX,
		[7] = DMACH_UART3_TX,
		[8] = DMACH_IRDA,
		[9] = DMACH_I2S0_RX,
		[10] = DMACH_I2S0_TX,
		[11] = DMACH_I2S0S_TX,
		[12] = DMACH_I2S1_RX,
		[13] = DMACH_I2S1_TX,
		[14] = DMACH_I2S2_RX,
		[15] = DMACH_I2S2_TX,
		[16] = DMACH_SPI0_RX,
		[17] = DMACH_SPI0_TX,
		[18] = DMACH_SPI1_RX,
		[19] = DMACH_SPI1_TX,
		[20] = DMACH_SPI2_RX,
		[21] = DMACH_SPI2_TX,
		[22] = DMACH_AC97_MICIN,
		[23] = DMACH_AC97_PCMIN,
		[24] = DMACH_AC97_PCMOUT,
		[25] = DMACH_EXTERNAL,
		[26] = DMACH_PWM,
		[27] = DMACH_SPDIF,
		[28] = DMACH_HSI_RX,
		[29] = DMACH_HSI_TX,
		[30] = DMACH_MAX,
		[31] = DMACH_MAX,
	},
};

static struct platform_device s5pc100_device_pdma0 = {
	.name		= "s3c-pl330",
	.id		= 0,
	.num_resources	= ARRAY_SIZE(s5pc100_pdma0_resource),
	.resource	= s5pc100_pdma0_resource,
	.dev		= {
		.dma_mask = &dma_dmamask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
		.platform_data = &s5pc100_pdma0_pdata,
	},
};

static struct resource s5pc100_pdma1_resource[] = {
	[0] = {
		.start  = S5PC100_PA_PDMA1,
		.end    = S5PC100_PA_PDMA1 + SZ_4K,
		.flags = IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_PDMA1,
		.end	= IRQ_PDMA1,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct s3c_pl330_platdata s5pc100_pdma1_pdata = {
	.peri = {
		[0] = DMACH_UART0_RX,
		[1] = DMACH_UART0_TX,
		[2] = DMACH_UART1_RX,
		[3] = DMACH_UART1_TX,
		[4] = DMACH_UART2_RX,
		[5] = DMACH_UART2_TX,
		[6] = DMACH_UART3_RX,
		[7] = DMACH_UART3_TX,
		[8] = DMACH_IRDA,
		[9] = DMACH_I2S0_RX,
		[10] = DMACH_I2S0_TX,
		[11] = DMACH_I2S0S_TX,
		[12] = DMACH_I2S1_RX,
		[13] = DMACH_I2S1_TX,
		[14] = DMACH_I2S2_RX,
		[15] = DMACH_I2S2_TX,
		[16] = DMACH_SPI0_RX,
		[17] = DMACH_SPI0_TX,
		[18] = DMACH_SPI1_RX,
		[19] = DMACH_SPI1_TX,
		[20] = DMACH_SPI2_RX,
		[21] = DMACH_SPI2_TX,
		[22] = DMACH_PCM0_RX,
		[23] = DMACH_PCM0_TX,
		[24] = DMACH_PCM1_RX,
		[25] = DMACH_PCM1_TX,
		[26] = DMACH_MSM_REQ0,
		[27] = DMACH_MSM_REQ1,
		[28] = DMACH_MSM_REQ2,
		[29] = DMACH_MSM_REQ3,
		[30] = DMACH_MAX,
		[31] = DMACH_MAX,
	},
};

static struct platform_device s5pc100_device_pdma1 = {
	.name		= "s3c-pl330",
	.id		= 1,
	.num_resources	= ARRAY_SIZE(s5pc100_pdma1_resource),
	.resource	= s5pc100_pdma1_resource,
	.dev		= {
		.dma_mask = &dma_dmamask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
		.platform_data = &s5pc100_pdma1_pdata,
	},
};

static struct platform_device *s5pc100_dmacs[] __initdata = {
	&s5pc100_device_pdma0,
	&s5pc100_device_pdma1,
};

static int __init s5pc100_dma_init(void)
{
	platform_add_devices(s5pc100_dmacs, ARRAY_SIZE(s5pc100_dmacs));

	return 0;
}
arch_initcall(s5pc100_dma_init);
Commit	Line	Data
c5e2caca JB	1	/*
	2	* Copyright (C) 2010 Samsung Electronics Co. Ltd.
	3	* Jaswinder Singh <jassi.brar@samsung.com>
	4	*
	5	* This program is free software; you can redistribute it and/or modify
	6	* it under the terms of the GNU General Public License as published by
	7	* the Free Software Foundation; either version 2 of the License, or
	8	* (at your option) any later version.
	9	*
	10	* This program is distributed in the hope that it will be useful,
	11	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	13	* GNU General Public License for more details.
	14	*
	15	* You should have received a copy of the GNU General Public License
	16	* along with this program; if not, write to the Free Software
	17	* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	18	*/
	19
	20	#include <linux/platform_device.h>
	21	#include <linux/dma-mapping.h>
	22
	23	#include <plat/devs.h>
c5e2caca JB	24
c5e2caca JB	25	#include <mach/map.h>
45c79433	26	#include <mach/irqs.h>
c5e2caca JB	27
	28	#include <plat/s3c-pl330-pdata.h>
	29
	30	static u64 dma_dmamask = DMA_BIT_MASK(32);
	31
	32	static struct resource s5pc100_pdma0_resource[] = {
	33	[0] = {
	34	.start = S5PC100_PA_PDMA0,
	35	.end = S5PC100_PA_PDMA0 + SZ_4K,
	36	.flags = IORESOURCE_MEM,
	37	},
	38	[1] = {
	39	.start = IRQ_PDMA0,
	40	.end = IRQ_PDMA0,
	41	.flags = IORESOURCE_IRQ,
	42	},
	43	};
	44
	45	static struct s3c_pl330_platdata s5pc100_pdma0_pdata = {
	46	.peri = {
	47	[0] = DMACH_UART0_RX,
	48	[1] = DMACH_UART0_TX,
	49	[2] = DMACH_UART1_RX,
	50	[3] = DMACH_UART1_TX,
	51	[4] = DMACH_UART2_RX,
	52	[5] = DMACH_UART2_TX,
	53	[6] = DMACH_UART3_RX,
	54	[7] = DMACH_UART3_TX,
	55	[8] = DMACH_IRDA,
	56	[9] = DMACH_I2S0_RX,
	57	[10] = DMACH_I2S0_TX,
	58	[11] = DMACH_I2S0S_TX,
	59	[12] = DMACH_I2S1_RX,
	60	[13] = DMACH_I2S1_TX,
	61	[14] = DMACH_I2S2_RX,
	62	[15] = DMACH_I2S2_TX,
	63	[16] = DMACH_SPI0_RX,
	64	[17] = DMACH_SPI0_TX,
	65	[18] = DMACH_SPI1_RX,
	66	[19] = DMACH_SPI1_TX,
	67	[20] = DMACH_SPI2_RX,
	68	[21] = DMACH_SPI2_TX,
	69	[22] = DMACH_AC97_MICIN,
	70	[23] = DMACH_AC97_PCMIN,
	71	[24] = DMACH_AC97_PCMOUT,
	72	[25] = DMACH_EXTERNAL,
	73	[26] = DMACH_PWM,
	74	[27] = DMACH_SPDIF,
	75	[28] = DMACH_HSI_RX,
	76	[29] = DMACH_HSI_TX,
	77	[30] = DMACH_MAX,
	78	[31] = DMACH_MAX,
	79	},
	80	};
	81
	82	static struct platform_device s5pc100_device_pdma0 = {
	83	.name = "s3c-pl330",
9d59c17a	84	.id = 0,
c5e2caca JB	85	.num_resources = ARRAY_SIZE(s5pc100_pdma0_resource),
	86	.resource = s5pc100_pdma0_resource,
	87	.dev = {
	88	.dma_mask = &dma_dmamask,
	89	.coherent_dma_mask = DMA_BIT_MASK(32),
	90	.platform_data = &s5pc100_pdma0_pdata,
	91	},
	92	};
	93
	94	static struct resource s5pc100_pdma1_resource[] = {
	95	[0] = {
	96	.start = S5PC100_PA_PDMA1,
	97	.end = S5PC100_PA_PDMA1 + SZ_4K,
	98	.flags = IORESOURCE_MEM,
	99	},
	100	[1] = {
	101	.start = IRQ_PDMA1,
	102	.end = IRQ_PDMA1,
	103	.flags = IORESOURCE_IRQ,
	104	},
	105	};
	106
	107	static struct s3c_pl330_platdata s5pc100_pdma1_pdata = {
	108	.peri = {
	109	[0] = DMACH_UART0_RX,
	110	[1] = DMACH_UART0_TX,
	111	[2] = DMACH_UART1_RX,
	112	[3] = DMACH_UART1_TX,
	113	[4] = DMACH_UART2_RX,
	114	[5] = DMACH_UART2_TX,
	115	[6] = DMACH_UART3_RX,
	116	[7] = DMACH_UART3_TX,
	117	[8] = DMACH_IRDA,
	118	[9] = DMACH_I2S0_RX,
	119	[10] = DMACH_I2S0_TX,
	120	[11] = DMACH_I2S0S_TX,
	121	[12] = DMACH_I2S1_RX,
	122	[13] = DMACH_I2S1_TX,
	123	[14] = DMACH_I2S2_RX,
	124	[15] = DMACH_I2S2_TX,
	125	[16] = DMACH_SPI0_RX,
	126	[17] = DMACH_SPI0_TX,
	127	[18] = DMACH_SPI1_RX,
	128	[19] = DMACH_SPI1_TX,
	129	[20] = DMACH_SPI2_RX,
	130	[21] = DMACH_SPI2_TX,
	131	[22] = DMACH_PCM0_RX,
	132	[23] = DMACH_PCM0_TX,
	133	[24] = DMACH_PCM1_RX,
	134	[25] = DMACH_PCM1_TX,
	135	[26] = DMACH_MSM_REQ0,
	136	[27] = DMACH_MSM_REQ1,
	137	[28] = DMACH_MSM_REQ2,
	138	[29] = DMACH_MSM_REQ3,
	139	[30] = DMACH_MAX,
	140	[31] = DMACH_MAX,
	141	},
	142	};
	143
	144	static struct platform_device s5pc100_device_pdma1 = {
	145	.name = "s3c-pl330",
9d59c17a	146	.id = 1,
c5e2caca JB	147	.num_resources = ARRAY_SIZE(s5pc100_pdma1_resource),
	148	.resource = s5pc100_pdma1_resource,
	149	.dev = {
	150	.dma_mask = &dma_dmamask,
	151	.coherent_dma_mask = DMA_BIT_MASK(32),
	152	.platform_data = &s5pc100_pdma1_pdata,
	153	},
	154	};
	155
	156	static struct platform_device *s5pc100_dmacs[] __initdata = {
	157	&s5pc100_device_pdma0,
	158	&s5pc100_device_pdma1,
	159	};
	160
	161	static int __init s5pc100_dma_init(void)
	162	{
	163	platform_add_devices(s5pc100_dmacs, ARRAY_SIZE(s5pc100_dmacs));
	164
	165	return 0;
	166	}
	167	arch_initcall(s5pc100_dma_init);