[net-next-2.6.git] / arch / arm / mach-realview / realview_pb1176.c

/*
 *  linux/arch/arm/mach-realview/realview_pb1176.c
 *
 *  Copyright (C) 2008 ARM Limited
 *  Copyright (C) 2000 Deep Blue Solutions Ltd
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */

#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/sysdev.h>
#include <linux/amba/bus.h>
#include <linux/amba/pl061.h>
#include <linux/amba/mmci.h>
#include <linux/io.h>

#include <mach/hardware.h>
#include <asm/irq.h>
#include <asm/leds.h>
#include <asm/mach-types.h>
#include <asm/pmu.h>
#include <asm/pgtable.h>
#include <asm/hardware/gic.h>
#include <asm/hardware/cache-l2x0.h>

#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>

#include <mach/board-pb1176.h>
#include <mach/irqs.h>

#include "core.h"

static struct map_desc realview_pb1176_io_desc[] __initdata = {
	{
		.virtual	= IO_ADDRESS(REALVIEW_SYS_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_SYS_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_PB1176_GIC_CPU_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_PB1176_GIC_CPU_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_PB1176_GIC_DIST_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_PB1176_GIC_DIST_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_DC1176_GIC_CPU_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_DC1176_GIC_CPU_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_DC1176_GIC_DIST_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_DC1176_GIC_DIST_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_SCTL_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_SCTL_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_PB1176_TIMER0_1_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_PB1176_TIMER0_1_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_PB1176_TIMER2_3_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_PB1176_TIMER2_3_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_PB1176_L220_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_PB1176_L220_BASE),
		.length		= SZ_8K,
		.type		= MT_DEVICE,
	},
#ifdef CONFIG_DEBUG_LL
	{
		.virtual	= IO_ADDRESS(REALVIEW_PB1176_UART0_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_PB1176_UART0_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	},
#endif
};

static void __init realview_pb1176_map_io(void)
{
	iotable_init(realview_pb1176_io_desc, ARRAY_SIZE(realview_pb1176_io_desc));
}

static struct pl061_platform_data gpio0_plat_data = {
	.gpio_base	= 0,
	.irq_base	= -1,
};

static struct pl061_platform_data gpio1_plat_data = {
	.gpio_base	= 8,
	.irq_base	= -1,
};

static struct pl061_platform_data gpio2_plat_data = {
	.gpio_base	= 16,
	.irq_base	= -1,
};

/*
 * RealView PB1176 AMBA devices
 */
#define GPIO2_IRQ	{ IRQ_PB1176_GPIO2, NO_IRQ }
#define GPIO2_DMA	{ 0, 0 }
#define GPIO3_IRQ	{ IRQ_PB1176_GPIO3, NO_IRQ }
#define GPIO3_DMA	{ 0, 0 }
#define AACI_IRQ	{ IRQ_PB1176_AACI, NO_IRQ }
#define AACI_DMA	{ 0x80, 0x81 }
#define MMCI0_IRQ	{ IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B }
#define MMCI0_DMA	{ 0x84, 0 }
#define KMI0_IRQ	{ IRQ_PB1176_KMI0, NO_IRQ }
#define KMI0_DMA	{ 0, 0 }
#define KMI1_IRQ	{ IRQ_PB1176_KMI1, NO_IRQ }
#define KMI1_DMA	{ 0, 0 }
#define PB1176_SMC_IRQ	{ NO_IRQ, NO_IRQ }
#define PB1176_SMC_DMA	{ 0, 0 }
#define MPMC_IRQ	{ NO_IRQ, NO_IRQ }
#define MPMC_DMA	{ 0, 0 }
#define PB1176_CLCD_IRQ	{ IRQ_DC1176_CLCD, NO_IRQ }
#define PB1176_CLCD_DMA	{ 0, 0 }
#define DMAC_IRQ	{ IRQ_PB1176_DMAC, NO_IRQ }
#define DMAC_DMA	{ 0, 0 }
#define SCTL_IRQ	{ NO_IRQ, NO_IRQ }
#define SCTL_DMA	{ 0, 0 }
#define PB1176_WATCHDOG_IRQ	{ IRQ_DC1176_WATCHDOG, NO_IRQ }
#define PB1176_WATCHDOG_DMA	{ 0, 0 }
#define PB1176_GPIO0_IRQ	{ IRQ_PB1176_GPIO0, NO_IRQ }
#define PB1176_GPIO0_DMA	{ 0, 0 }
#define GPIO1_IRQ	{ IRQ_PB1176_GPIO1, NO_IRQ }
#define GPIO1_DMA	{ 0, 0 }
#define PB1176_RTC_IRQ	{ IRQ_DC1176_RTC, NO_IRQ }
#define PB1176_RTC_DMA	{ 0, 0 }
#define SCI_IRQ		{ IRQ_PB1176_SCI, NO_IRQ }
#define SCI_DMA		{ 7, 6 }
#define PB1176_UART0_IRQ	{ IRQ_DC1176_UART0, NO_IRQ }
#define PB1176_UART0_DMA	{ 15, 14 }
#define PB1176_UART1_IRQ	{ IRQ_DC1176_UART1, NO_IRQ }
#define PB1176_UART1_DMA	{ 13, 12 }
#define PB1176_UART2_IRQ	{ IRQ_DC1176_UART2, NO_IRQ }
#define PB1176_UART2_DMA	{ 11, 10 }
#define PB1176_UART3_IRQ	{ IRQ_DC1176_UART3, NO_IRQ }
#define PB1176_UART3_DMA	{ 0x86, 0x87 }
#define PB1176_SSP_IRQ		{ IRQ_PB1176_SSP, NO_IRQ }
#define PB1176_SSP_DMA		{ 9, 8 }

/* FPGA Primecells */
AMBA_DEVICE(aaci,	"fpga:aaci",	AACI,		NULL);
AMBA_DEVICE(mmc0,	"fpga:mmc0",	MMCI0,		&realview_mmc0_plat_data);
AMBA_DEVICE(kmi0,	"fpga:kmi0",	KMI0,		NULL);
AMBA_DEVICE(kmi1,	"fpga:kmi1",	KMI1,		NULL);
AMBA_DEVICE(uart3,	"fpga:uart3",	PB1176_UART3,	NULL);

/* DevChip Primecells */
AMBA_DEVICE(smc,	"dev:smc",	PB1176_SMC,	NULL);
AMBA_DEVICE(sctl,	"dev:sctl",	SCTL,		NULL);
AMBA_DEVICE(wdog,	"dev:wdog",	PB1176_WATCHDOG,	NULL);
AMBA_DEVICE(gpio0,	"dev:gpio0",	PB1176_GPIO0,	&gpio0_plat_data);
AMBA_DEVICE(gpio1,	"dev:gpio1",	GPIO1,		&gpio1_plat_data);
AMBA_DEVICE(gpio2,	"dev:gpio2",	GPIO2,		&gpio2_plat_data);
AMBA_DEVICE(rtc,	"dev:rtc",	PB1176_RTC,	NULL);
AMBA_DEVICE(sci0,	"dev:sci0",	SCI,		NULL);
AMBA_DEVICE(uart0,	"dev:uart0",	PB1176_UART0,	NULL);
AMBA_DEVICE(uart1,	"dev:uart1",	PB1176_UART1,	NULL);
AMBA_DEVICE(uart2,	"dev:uart2",	PB1176_UART2,	NULL);
AMBA_DEVICE(ssp0,	"dev:ssp0",	PB1176_SSP,	NULL);

/* Primecells on the NEC ISSP chip */
AMBA_DEVICE(clcd,	"issp:clcd",	PB1176_CLCD,	&clcd_plat_data);
//AMBA_DEVICE(dmac,	"issp:dmac",	PB1176_DMAC,	NULL);

static struct amba_device *amba_devs[] __initdata = {
//	&dmac_device,
	&uart0_device,
	&uart1_device,
	&uart2_device,
	&uart3_device,
	&smc_device,
	&clcd_device,
	&sctl_device,
	&wdog_device,
	&gpio0_device,
	&gpio1_device,
	&gpio2_device,
	&rtc_device,
	&sci0_device,
	&ssp0_device,
	&aaci_device,
	&mmc0_device,
	&kmi0_device,
	&kmi1_device,
};

/*
 * RealView PB1176 platform devices
 */
static struct resource realview_pb1176_flash_resources[] = {
	[0] = {
		.start		= REALVIEW_PB1176_FLASH_BASE,
		.end		= REALVIEW_PB1176_FLASH_BASE + REALVIEW_PB1176_FLASH_SIZE - 1,
		.flags		= IORESOURCE_MEM,
	},
	[1] = {
		.start		= REALVIEW_PB1176_SEC_FLASH_BASE,
		.end		= REALVIEW_PB1176_SEC_FLASH_BASE + REALVIEW_PB1176_SEC_FLASH_SIZE - 1,
		.flags		= IORESOURCE_MEM,
	},
};
#ifdef CONFIG_REALVIEW_PB1176_SECURE_FLASH
#define PB1176_FLASH_BLOCKS	2
#else
#define PB1176_FLASH_BLOCKS	1
#endif

static struct resource realview_pb1176_smsc911x_resources[] = {
	[0] = {
		.start		= REALVIEW_PB1176_ETH_BASE,
		.end		= REALVIEW_PB1176_ETH_BASE + SZ_64K - 1,
		.flags		= IORESOURCE_MEM,
	},
	[1] = {
		.start		= IRQ_PB1176_ETH,
		.end		= IRQ_PB1176_ETH,
		.flags		= IORESOURCE_IRQ,
	},
};

static struct resource realview_pb1176_isp1761_resources[] = {
	[0] = {
		.start		= REALVIEW_PB1176_USB_BASE,
		.end		= REALVIEW_PB1176_USB_BASE + SZ_128K - 1,
		.flags		= IORESOURCE_MEM,
	},
	[1] = {
		.start		= IRQ_PB1176_USB,
		.end		= IRQ_PB1176_USB,
		.flags		= IORESOURCE_IRQ,
	},
};

static struct resource pmu_resource = {
	.start		= IRQ_DC1176_CORE_PMU,
	.end		= IRQ_DC1176_CORE_PMU,
	.flags		= IORESOURCE_IRQ,
};

static struct platform_device pmu_device = {
	.name			= "arm-pmu",
	.id			= ARM_PMU_DEVICE_CPU,
	.num_resources		= 1,
	.resource		= &pmu_resource,
};

static void __init gic_init_irq(void)
{
	/* ARM1176 DevChip GIC, primary */
	gic_cpu_base_addr = __io_address(REALVIEW_DC1176_GIC_CPU_BASE);
	gic_dist_init(0, __io_address(REALVIEW_DC1176_GIC_DIST_BASE), IRQ_DC1176_GIC_START);
	gic_cpu_init(0, gic_cpu_base_addr);

	/* board GIC, secondary */
	gic_dist_init(1, __io_address(REALVIEW_PB1176_GIC_DIST_BASE), IRQ_PB1176_GIC_START);
	gic_cpu_init(1, __io_address(REALVIEW_PB1176_GIC_CPU_BASE));
	gic_cascade_irq(1, IRQ_DC1176_PB_IRQ1);
}

static void __init realview_pb1176_timer_init(void)
{
	timer0_va_base = __io_address(REALVIEW_PB1176_TIMER0_1_BASE);
	timer1_va_base = __io_address(REALVIEW_PB1176_TIMER0_1_BASE) + 0x20;
	timer2_va_base = __io_address(REALVIEW_PB1176_TIMER2_3_BASE);
	timer3_va_base = __io_address(REALVIEW_PB1176_TIMER2_3_BASE) + 0x20;

	realview_timer_init(IRQ_DC1176_TIMER0);
}

static struct sys_timer realview_pb1176_timer = {
	.init		= realview_pb1176_timer_init,
};

static void realview_pb1176_reset(char mode)
{
	void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
	void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
	__raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
	__raw_writel(REALVIEW_PB1176_SYS_SOFT_RESET, reset_ctrl);
}

static void realview_pb1176_fixup(struct machine_desc *mdesc,
				  struct tag *tags, char **from,
				  struct meminfo *meminfo)
{
	/*
	 * RealView PB1176 only has 128MB of RAM mapped at 0.
	 */
	meminfo->bank[0].start = 0;
	meminfo->bank[0].size = SZ_128M;
	meminfo->nr_banks = 1;
}

static void __init realview_pb1176_init(void)
{
	int i;

#ifdef CONFIG_CACHE_L2X0
	/* 128Kb (16Kb/way) 8-way associativity. evmon/parity/share enabled. */
	l2x0_init(__io_address(REALVIEW_PB1176_L220_BASE), 0x00730000, 0xfe000fff);
#endif

	realview_flash_register(realview_pb1176_flash_resources,
				PB1176_FLASH_BLOCKS);
	realview_eth_register(NULL, realview_pb1176_smsc911x_resources);
	platform_device_register(&realview_i2c_device);
	realview_usb_register(realview_pb1176_isp1761_resources);
	platform_device_register(&pmu_device);

	for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
		struct amba_device *d = amba_devs[i];
		amba_device_register(d, &iomem_resource);
	}

#ifdef CONFIG_LEDS
	leds_event = realview_leds_event;
#endif
	realview_reset = realview_pb1176_reset;
}

MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
	/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
	.phys_io	= REALVIEW_PB1176_UART0_BASE & SECTION_MASK,
	.io_pg_offst	= (IO_ADDRESS(REALVIEW_PB1176_UART0_BASE) >> 18) & 0xfffc,
	.boot_params	= PHYS_OFFSET + 0x00000100,
	.fixup		= realview_pb1176_fixup,
	.map_io		= realview_pb1176_map_io,
	.init_irq	= gic_init_irq,
	.timer		= &realview_pb1176_timer,
	.init_machine	= realview_pb1176_init,
MACHINE_END
Commit	Line	Data
a0316b24 BB	1	/*
	2	* linux/arch/arm/mach-realview/realview_pb1176.c
	3	*
	4	* Copyright (C) 2008 ARM Limited
	5	* Copyright (C) 2000 Deep Blue Solutions Ltd
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation; either version 2 of the License, or
	10	* (at your option) any later version.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	20	*/
	21
	22	#include <linux/init.h>
	23	#include <linux/platform_device.h>
	24	#include <linux/sysdev.h>
	25	#include <linux/amba/bus.h>
eb7fffa3	26	#include <linux/amba/pl061.h>
6ef297f8	27	#include <linux/amba/mmci.h>
fced80c7	28	#include <linux/io.h>
a0316b24	29
a09e64fb	30	#include <mach/hardware.h>
a0316b24 BB	31	#include <asm/irq.h>
	32	#include <asm/leds.h>
	33	#include <asm/mach-types.h>
f417cbad	34	#include <asm/pmu.h>
cc9897df	35	#include <asm/pgtable.h>
a0316b24	36	#include <asm/hardware/gic.h>
a0316b24 BB	37	#include <asm/hardware/cache-l2x0.h>
	38
	39	#include <asm/mach/arch.h>
	40	#include <asm/mach/flash.h>
	41	#include <asm/mach/map.h>
a0316b24 BB	42	#include <asm/mach/time.h>
a0316b24 BB	43
a09e64fb RK	44	#include <mach/board-pb1176.h>
a09e64fb RK	45	#include <mach/irqs.h>
a0316b24 BB	46
a0316b24 BB	47	#include "core.h"
a0316b24 BB	48
	49	static struct map_desc realview_pb1176_io_desc[] __initdata = {
	50	{
	51	.virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
	52	.pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
	53	.length = SZ_4K,
	54	.type = MT_DEVICE,
	55	}, {
	56	.virtual = IO_ADDRESS(REALVIEW_PB1176_GIC_CPU_BASE),
	57	.pfn = __phys_to_pfn(REALVIEW_PB1176_GIC_CPU_BASE),
	58	.length = SZ_4K,
	59	.type = MT_DEVICE,
	60	}, {
	61	.virtual = IO_ADDRESS(REALVIEW_PB1176_GIC_DIST_BASE),
	62	.pfn = __phys_to_pfn(REALVIEW_PB1176_GIC_DIST_BASE),
	63	.length = SZ_4K,
	64	.type = MT_DEVICE,
	65	}, {
	66	.virtual = IO_ADDRESS(REALVIEW_DC1176_GIC_CPU_BASE),
	67	.pfn = __phys_to_pfn(REALVIEW_DC1176_GIC_CPU_BASE),
	68	.length = SZ_4K,
	69	.type = MT_DEVICE,
	70	}, {
	71	.virtual = IO_ADDRESS(REALVIEW_DC1176_GIC_DIST_BASE),
	72	.pfn = __phys_to_pfn(REALVIEW_DC1176_GIC_DIST_BASE),
	73	.length = SZ_4K,
	74	.type = MT_DEVICE,
	75	}, {
	76	.virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
	77	.pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
	78	.length = SZ_4K,
	79	.type = MT_DEVICE,
	80	}, {
	81	.virtual = IO_ADDRESS(REALVIEW_PB1176_TIMER0_1_BASE),
	82	.pfn = __phys_to_pfn(REALVIEW_PB1176_TIMER0_1_BASE),
	83	.length = SZ_4K,
	84	.type = MT_DEVICE,
	85	}, {
	86	.virtual = IO_ADDRESS(REALVIEW_PB1176_TIMER2_3_BASE),
	87	.pfn = __phys_to_pfn(REALVIEW_PB1176_TIMER2_3_BASE),
	88	.length = SZ_4K,
	89	.type = MT_DEVICE,
	90	}, {
	91	.virtual = IO_ADDRESS(REALVIEW_PB1176_L220_BASE),
	92	.pfn = __phys_to_pfn(REALVIEW_PB1176_L220_BASE),
	93	.length = SZ_8K,
	94	.type = MT_DEVICE,
	95	},
	96	#ifdef CONFIG_DEBUG_LL
	97	{
	98	.virtual = IO_ADDRESS(REALVIEW_PB1176_UART0_BASE),
	99	.pfn = __phys_to_pfn(REALVIEW_PB1176_UART0_BASE),
	100	.length = SZ_4K,
	101	.type = MT_DEVICE,
	102	},
	103	#endif
	104	};
	105
	106	static void __init realview_pb1176_map_io(void)
	107	{
	108	iotable_init(realview_pb1176_io_desc, ARRAY_SIZE(realview_pb1176_io_desc));
	109	}
	110
eb7fffa3 RK	111	static struct pl061_platform_data gpio0_plat_data = {
	112	.gpio_base = 0,
	113	.irq_base = -1,
	114	};
	115
	116	static struct pl061_platform_data gpio1_plat_data = {
	117	.gpio_base = 8,
	118	.irq_base = -1,
	119	};
	120
	121	static struct pl061_platform_data gpio2_plat_data = {
	122	.gpio_base = 16,
	123	.irq_base = -1,
	124	};
	125
a0316b24 BB	126	/*
	127	* RealView PB1176 AMBA devices
	128	*/
	129	#define GPIO2_IRQ { IRQ_PB1176_GPIO2, NO_IRQ }
	130	#define GPIO2_DMA { 0, 0 }
	131	#define GPIO3_IRQ { IRQ_PB1176_GPIO3, NO_IRQ }
	132	#define GPIO3_DMA { 0, 0 }
	133	#define AACI_IRQ { IRQ_PB1176_AACI, NO_IRQ }
	134	#define AACI_DMA { 0x80, 0x81 }
	135	#define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B }
	136	#define MMCI0_DMA { 0x84, 0 }
	137	#define KMI0_IRQ { IRQ_PB1176_KMI0, NO_IRQ }
	138	#define KMI0_DMA { 0, 0 }
	139	#define KMI1_IRQ { IRQ_PB1176_KMI1, NO_IRQ }
	140	#define KMI1_DMA { 0, 0 }
	141	#define PB1176_SMC_IRQ { NO_IRQ, NO_IRQ }
	142	#define PB1176_SMC_DMA { 0, 0 }
	143	#define MPMC_IRQ { NO_IRQ, NO_IRQ }
	144	#define MPMC_DMA { 0, 0 }
	145	#define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD, NO_IRQ }
	146	#define PB1176_CLCD_DMA { 0, 0 }
	147	#define DMAC_IRQ { IRQ_PB1176_DMAC, NO_IRQ }
	148	#define DMAC_DMA { 0, 0 }
	149	#define SCTL_IRQ { NO_IRQ, NO_IRQ }
	150	#define SCTL_DMA { 0, 0 }
	151	#define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG, NO_IRQ }
	152	#define PB1176_WATCHDOG_DMA { 0, 0 }
	153	#define PB1176_GPIO0_IRQ { IRQ_PB1176_GPIO0, NO_IRQ }
	154	#define PB1176_GPIO0_DMA { 0, 0 }
	155	#define GPIO1_IRQ { IRQ_PB1176_GPIO1, NO_IRQ }
	156	#define GPIO1_DMA { 0, 0 }
	157	#define PB1176_RTC_IRQ { IRQ_DC1176_RTC, NO_IRQ }
	158	#define PB1176_RTC_DMA { 0, 0 }
	159	#define SCI_IRQ { IRQ_PB1176_SCI, NO_IRQ }
	160	#define SCI_DMA { 7, 6 }
	161	#define PB1176_UART0_IRQ { IRQ_DC1176_UART0, NO_IRQ }
	162	#define PB1176_UART0_DMA { 15, 14 }
	163	#define PB1176_UART1_IRQ { IRQ_DC1176_UART1, NO_IRQ }
	164	#define PB1176_UART1_DMA { 13, 12 }
	165	#define PB1176_UART2_IRQ { IRQ_DC1176_UART2, NO_IRQ }
	166	#define PB1176_UART2_DMA { 11, 10 }
	167	#define PB1176_UART3_IRQ { IRQ_DC1176_UART3, NO_IRQ }
	168	#define PB1176_UART3_DMA { 0x86, 0x87 }
	169	#define PB1176_SSP_IRQ { IRQ_PB1176_SSP, NO_IRQ }
	170	#define PB1176_SSP_DMA { 9, 8 }
	171
	172	/* FPGA Primecells */
4321532c LW	173	AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL);
	174	AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
	175	AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
	176	AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
	177	AMBA_DEVICE(uart3, "fpga:uart3", PB1176_UART3, NULL);
a0316b24 BB	178
a0316b24 BB	179	/* DevChip Primecells */
4321532c LW	180	AMBA_DEVICE(smc, "dev:smc", PB1176_SMC, NULL);
	181	AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL);
	182	AMBA_DEVICE(wdog, "dev:wdog", PB1176_WATCHDOG, NULL);
	183	AMBA_DEVICE(gpio0, "dev:gpio0", PB1176_GPIO0, &gpio0_plat_data);
	184	AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
	185	AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
	186	AMBA_DEVICE(rtc, "dev:rtc", PB1176_RTC, NULL);
	187	AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL);
	188	AMBA_DEVICE(uart0, "dev:uart0", PB1176_UART0, NULL);
	189	AMBA_DEVICE(uart1, "dev:uart1", PB1176_UART1, NULL);
	190	AMBA_DEVICE(uart2, "dev:uart2", PB1176_UART2, NULL);
	191	AMBA_DEVICE(ssp0, "dev:ssp0", PB1176_SSP, NULL);
a0316b24 BB	192
a0316b24 BB	193	/* Primecells on the NEC ISSP chip */
4321532c LW	194	AMBA_DEVICE(clcd, "issp:clcd", PB1176_CLCD, &clcd_plat_data);
4321532c LW	195	//AMBA_DEVICE(dmac, "issp:dmac", PB1176_DMAC, NULL);
a0316b24 BB	196
	197	static struct amba_device *amba_devs[] __initdata = {
	198	// &dmac_device,
	199	&uart0_device,
	200	&uart1_device,
	201	&uart2_device,
	202	&uart3_device,
	203	&smc_device,
	204	&clcd_device,
	205	&sctl_device,
	206	&wdog_device,
	207	&gpio0_device,
	208	&gpio1_device,
	209	&gpio2_device,
	210	&rtc_device,
	211	&sci0_device,
	212	&ssp0_device,
	213	&aaci_device,
	214	&mmc0_device,
	215	&kmi0_device,
	216	&kmi1_device,
	217	};
	218
	219	/*
	220	* RealView PB1176 platform devices
	221	*/
af607747 CM	222	static struct resource realview_pb1176_flash_resources[] = {
	223	[0] = {
	224	.start = REALVIEW_PB1176_FLASH_BASE,
	225	.end = REALVIEW_PB1176_FLASH_BASE + REALVIEW_PB1176_FLASH_SIZE - 1,
	226	.flags = IORESOURCE_MEM,
	227	},
	228	[1] = {
	229	.start = REALVIEW_PB1176_SEC_FLASH_BASE,
	230	.end = REALVIEW_PB1176_SEC_FLASH_BASE + REALVIEW_PB1176_SEC_FLASH_SIZE - 1,
	231	.flags = IORESOURCE_MEM,
	232	},
a0316b24	233	};
af607747 CM	234	#ifdef CONFIG_REALVIEW_PB1176_SECURE_FLASH
	235	#define PB1176_FLASH_BLOCKS 2
	236	#else
	237	#define PB1176_FLASH_BLOCKS 1
	238	#endif
a0316b24 BB	239
	240	static struct resource realview_pb1176_smsc911x_resources[] = {
	241	[0] = {
	242	.start = REALVIEW_PB1176_ETH_BASE,
	243	.end = REALVIEW_PB1176_ETH_BASE + SZ_64K - 1,
	244	.flags = IORESOURCE_MEM,
	245	},
	246	[1] = {
	247	.start = IRQ_PB1176_ETH,
	248	.end = IRQ_PB1176_ETH,
	249	.flags = IORESOURCE_IRQ,
	250	},
	251	};
	252
7db21712 CM	253	static struct resource realview_pb1176_isp1761_resources[] = {
	254	[0] = {
	255	.start = REALVIEW_PB1176_USB_BASE,
	256	.end = REALVIEW_PB1176_USB_BASE + SZ_128K - 1,
	257	.flags = IORESOURCE_MEM,
	258	},
	259	[1] = {
	260	.start = IRQ_PB1176_USB,
	261	.end = IRQ_PB1176_USB,
	262	.flags = IORESOURCE_IRQ,
	263	},
	264	};
	265
f417cbad WD	266	static struct resource pmu_resource = {
	267	.start = IRQ_DC1176_CORE_PMU,
	268	.end = IRQ_DC1176_CORE_PMU,
	269	.flags = IORESOURCE_IRQ,
	270	};
	271
	272	static struct platform_device pmu_device = {
	273	.name = "arm-pmu",
	274	.id = ARM_PMU_DEVICE_CPU,
	275	.num_resources = 1,
	276	.resource = &pmu_resource,
	277	};
	278
a0316b24 BB	279	static void __init gic_init_irq(void)
	280	{
	281	/* ARM1176 DevChip GIC, primary */
	282	gic_cpu_base_addr = __io_address(REALVIEW_DC1176_GIC_CPU_BASE);
	283	gic_dist_init(0, __io_address(REALVIEW_DC1176_GIC_DIST_BASE), IRQ_DC1176_GIC_START);
	284	gic_cpu_init(0, gic_cpu_base_addr);
	285
	286	/* board GIC, secondary */
	287	gic_dist_init(1, __io_address(REALVIEW_PB1176_GIC_DIST_BASE), IRQ_PB1176_GIC_START);
	288	gic_cpu_init(1, __io_address(REALVIEW_PB1176_GIC_CPU_BASE));
	289	gic_cascade_irq(1, IRQ_DC1176_PB_IRQ1);
	290	}
	291
	292	static void __init realview_pb1176_timer_init(void)
	293	{
	294	timer0_va_base = __io_address(REALVIEW_PB1176_TIMER0_1_BASE);
	295	timer1_va_base = __io_address(REALVIEW_PB1176_TIMER0_1_BASE) + 0x20;
	296	timer2_va_base = __io_address(REALVIEW_PB1176_TIMER2_3_BASE);
	297	timer3_va_base = __io_address(REALVIEW_PB1176_TIMER2_3_BASE) + 0x20;
	298
	299	realview_timer_init(IRQ_DC1176_TIMER0);
	300	}
	301
	302	static struct sys_timer realview_pb1176_timer = {
	303	.init = realview_pb1176_timer_init,
	304	};
	305
426fcd2a PJ	306	static void realview_pb1176_reset(char mode)
426fcd2a PJ	307	{
4c9f8be7 CT	308	void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
	309	void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
	310	__raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
	311	__raw_writel(REALVIEW_PB1176_SYS_SOFT_RESET, reset_ctrl);
426fcd2a PJ	312	}
426fcd2a PJ	313
5b39d154 CM	314	static void realview_pb1176_fixup(struct machine_desc *mdesc,
	315	struct tag tags, char *from,
	316	struct meminfo *meminfo)
	317	{
	318	/*
	319	* RealView PB1176 only has 128MB of RAM mapped at 0.
	320	*/
	321	meminfo->bank[0].start = 0;
	322	meminfo->bank[0].size = SZ_128M;
	323	meminfo->nr_banks = 1;
	324	}
	325
a0316b24 BB	326	static void __init realview_pb1176_init(void)
	327	{
	328	int i;
	329
ba927951	330	#ifdef CONFIG_CACHE_L2X0
a0316b24 BB	331	/* 128Kb (16Kb/way) 8-way associativity. evmon/parity/share enabled. */
a0316b24 BB	332	l2x0_init(__io_address(REALVIEW_PB1176_L220_BASE), 0x00730000, 0xfe000fff);
ba927951	333	#endif
a0316b24	334
af607747 CM	335	realview_flash_register(realview_pb1176_flash_resources,
af607747 CM	336	PB1176_FLASH_BLOCKS);
0a381330	337	realview_eth_register(NULL, realview_pb1176_smsc911x_resources);
533ad5e6	338	platform_device_register(&realview_i2c_device);
7db21712	339	realview_usb_register(realview_pb1176_isp1761_resources);
f417cbad	340	platform_device_register(&pmu_device);
a0316b24 BB	341
	342	for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
	343	struct amba_device *d = amba_devs[i];
	344	amba_device_register(d, &iomem_resource);
	345	}
	346
	347	#ifdef CONFIG_LEDS
	348	leds_event = realview_leds_event;
	349	#endif
426fcd2a	350	realview_reset = realview_pb1176_reset;
a0316b24 BB	351	}
	352
	353	MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
	354	/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
cc9897df	355	.phys_io = REALVIEW_PB1176_UART0_BASE & SECTION_MASK,
a0316b24	356	.io_pg_offst = (IO_ADDRESS(REALVIEW_PB1176_UART0_BASE) >> 18) & 0xfffc,
70bb62f8	357	.boot_params = PHYS_OFFSET + 0x00000100,
5b39d154	358	.fixup = realview_pb1176_fixup,
a0316b24 BB	359	.map_io = realview_pb1176_map_io,
	360	.init_irq = gic_init_irq,
	361	.timer = &realview_pb1176_timer,
	362	.init_machine = realview_pb1176_init,
	363	MACHINE_END