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Add IRQF_IRQPOLL flag on arm
[net-next-2.6.git] / arch / arm / mach-pxa / time.c
CommitLineData
1da177e4
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1/*
2 * arch/arm/mach-pxa/time.c
3 *
4 * Author: Nicolas Pitre
5 * Created: Jun 15, 2001
6 * Copyright: MontaVista Software Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
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13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/delay.h>
16#include <linux/interrupt.h>
17#include <linux/time.h>
18#include <linux/signal.h>
19#include <linux/errno.h>
20#include <linux/sched.h>
c80204e5 21#include <linux/clocksource.h>
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22
23#include <asm/system.h>
24#include <asm/hardware.h>
25#include <asm/io.h>
26#include <asm/leds.h>
27#include <asm/irq.h>
28#include <asm/mach/irq.h>
29#include <asm/mach/time.h>
30#include <asm/arch/pxa-regs.h>
31
32
33static inline unsigned long pxa_get_rtc_time(void)
34{
35 return RCNR;
36}
37
38static int pxa_set_rtc(void)
39{
40 unsigned long current_time = xtime.tv_sec;
41
42 if (RTSR & RTSR_ALE) {
43 /* make sure not to forward the clock over an alarm */
44 unsigned long alarm = RTAR;
45 if (current_time >= alarm && alarm >= RCNR)
46 return -ERESTARTSYS;
47 }
48 RCNR = current_time;
49 return 0;
50}
51
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52#ifdef CONFIG_NO_IDLE_HZ
53static unsigned long initial_match;
54static int match_posponed;
55#endif
56
1da177e4 57static irqreturn_t
0cd61b68 58pxa_timer_interrupt(int irq, void *dev_id)
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59{
60 int next_match;
61
62 write_seqlock(&xtime_lock);
63
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64#ifdef CONFIG_NO_IDLE_HZ
65 if (match_posponed) {
66 match_posponed = 0;
67 OSMR0 = initial_match;
68 }
69#endif
70
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71 /* Loop until we get ahead of the free running timer.
72 * This ensures an exact clock tick count and time accuracy.
20e91268
NP
73 * Since IRQs are disabled at this point, coherence between
74 * lost_ticks(updated in do_timer()) and the match reg value is
75 * ensured, hence we can use do_gettimeofday() from interrupt
76 * handlers.
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77 *
78 * HACK ALERT: it seems that the PXA timer regs aren't updated right
79 * away in all cases when a write occurs. We therefore compare with
80 * 8 instead of 0 in the while() condition below to avoid missing a
81 * match if OSCR has already reached the next OSMR value.
82 * Experience has shown that up to 6 ticks are needed to work around
83 * this problem, but let's use 8 to be conservative. Note that this
84 * affect things only when the timer IRQ has been delayed by nearly
85 * exactly one tick period which should be a pretty rare event.
86 */
87 do {
0cd61b68 88 timer_tick();
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89 OSSR = OSSR_M0; /* Clear match on timer 0 */
90 next_match = (OSMR0 += LATCH);
91 } while( (signed long)(next_match - OSCR) <= 8 );
92
93 write_sequnlock(&xtime_lock);
94
95 return IRQ_HANDLED;
96}
97
98static struct irqaction pxa_timer_irq = {
99 .name = "PXA Timer Tick",
b30fabad 100 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
09b8b5f8 101 .handler = pxa_timer_interrupt,
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102};
103
35108fb9 104static cycle_t pxa_get_cycles(void)
c80204e5
SH
105{
106 return OSCR;
107}
108
109static struct clocksource clocksource_pxa = {
110 .name = "pxa_timer",
111 .rating = 200,
112 .read = pxa_get_cycles,
113 .mask = CLOCKSOURCE_MASK(32),
114 .shift = 20,
c66699a7 115 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
c80204e5
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116};
117
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118static void __init pxa_timer_init(void)
119{
120 struct timespec tv;
46ec0ce8 121 unsigned long flags;
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122
123 set_rtc = pxa_set_rtc;
124
125 tv.tv_nsec = 0;
126 tv.tv_sec = pxa_get_rtc_time();
127 do_settimeofday(&tv);
128
5285eb57 129 OIER = 0; /* disable any timer interrupts */
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130 OSSR = 0xf; /* clear status on all timers */
131 setup_irq(IRQ_OST0, &pxa_timer_irq);
46ec0ce8 132 local_irq_save(flags);
5285eb57 133 OIER = OIER_E0; /* enable match on timer 0 to cause interrupts */
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134 OSMR0 = OSCR + LATCH; /* set initial match */
135 local_irq_restore(flags);
c80204e5 136
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137 /*
138 * OSCR runs continuously on PXA and is not written to,
139 * so we can use it as clock source directly.
c80204e5
SH
140 */
141 clocksource_pxa.mult =
142 clocksource_hz2mult(CLOCK_TICK_RATE, clocksource_pxa.shift);
143 clocksource_register(&clocksource_pxa);
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144}
145
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146#ifdef CONFIG_NO_IDLE_HZ
147static int pxa_dyn_tick_enable_disable(void)
148{
149 /* nothing to do */
150 return 0;
151}
152
153static void pxa_dyn_tick_reprogram(unsigned long ticks)
154{
155 if (ticks > 1) {
156 initial_match = OSMR0;
157 OSMR0 = initial_match + ticks * LATCH;
158 match_posponed = 1;
159 }
160}
161
162static irqreturn_t
0cd61b68 163pxa_dyn_tick_handler(int irq, void *dev_id)
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NP
164{
165 if (match_posponed) {
166 match_posponed = 0;
167 OSMR0 = initial_match;
168 if ( (signed long)(initial_match - OSCR) <= 8 )
0cd61b68 169 return pxa_timer_interrupt(irq, dev_id);
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170 }
171 return IRQ_NONE;
172}
173
174static struct dyn_tick_timer pxa_dyn_tick = {
175 .enable = pxa_dyn_tick_enable_disable,
176 .disable = pxa_dyn_tick_enable_disable,
177 .reprogram = pxa_dyn_tick_reprogram,
178 .handler = pxa_dyn_tick_handler,
179};
180#endif
181
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182#ifdef CONFIG_PM
183static unsigned long osmr[4], oier;
184
185static void pxa_timer_suspend(void)
186{
187 osmr[0] = OSMR0;
188 osmr[1] = OSMR1;
189 osmr[2] = OSMR2;
190 osmr[3] = OSMR3;
191 oier = OIER;
192}
193
194static void pxa_timer_resume(void)
195{
196 OSMR0 = osmr[0];
197 OSMR1 = osmr[1];
198 OSMR2 = osmr[2];
199 OSMR3 = osmr[3];
200 OIER = oier;
201
202 /*
203 * OSMR0 is the system timer: make sure OSCR is sufficiently behind
204 */
205 OSCR = OSMR0 - LATCH;
206}
207#else
208#define pxa_timer_suspend NULL
209#define pxa_timer_resume NULL
210#endif
211
212struct sys_timer pxa_timer = {
213 .init = pxa_timer_init,
214 .suspend = pxa_timer_suspend,
215 .resume = pxa_timer_resume,
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216#ifdef CONFIG_NO_IDLE_HZ
217 .dyn_tick = &pxa_dyn_tick,
218#endif
1da177e4 219};