[net-next-2.6.git] / arch / arm / mach-orion5x / common.c

/*
 * arch/arm/mach-orion5x/common.c
 *
 * Core functions for Marvell Orion 5x SoCs
 *
 * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/serial_8250.h>
#include <linux/mbus.h>
#include <linux/mv643xx_eth.h>
#include <linux/mv643xx_i2c.h>
#include <linux/ata_platform.h>
#include <asm/page.h>
#include <asm/setup.h>
#include <asm/timex.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>
#include <asm/arch/hardware.h>
#include <asm/arch/orion5x.h>
#include <asm/plat-orion/ehci-orion.h>
#include <asm/plat-orion/orion_nand.h>
#include <asm/plat-orion/time.h>
#include "common.h"

/*****************************************************************************
 * I/O Address Mapping
 ****************************************************************************/
static struct map_desc orion5x_io_desc[] __initdata = {
	{
		.virtual	= ORION5X_REGS_VIRT_BASE,
		.pfn		= __phys_to_pfn(ORION5X_REGS_PHYS_BASE),
		.length		= ORION5X_REGS_SIZE,
		.type		= MT_DEVICE,
	}, {
		.virtual	= ORION5X_PCIE_IO_VIRT_BASE,
		.pfn		= __phys_to_pfn(ORION5X_PCIE_IO_PHYS_BASE),
		.length		= ORION5X_PCIE_IO_SIZE,
		.type		= MT_DEVICE,
	}, {
		.virtual	= ORION5X_PCI_IO_VIRT_BASE,
		.pfn		= __phys_to_pfn(ORION5X_PCI_IO_PHYS_BASE),
		.length		= ORION5X_PCI_IO_SIZE,
		.type		= MT_DEVICE,
	}, {
		.virtual	= ORION5X_PCIE_WA_VIRT_BASE,
		.pfn		= __phys_to_pfn(ORION5X_PCIE_WA_PHYS_BASE),
		.length		= ORION5X_PCIE_WA_SIZE,
		.type		= MT_DEVICE,
	},
};

void __init orion5x_map_io(void)
{
	iotable_init(orion5x_io_desc, ARRAY_SIZE(orion5x_io_desc));
}


/*****************************************************************************
 * EHCI
 ****************************************************************************/
static struct orion_ehci_data orion5x_ehci_data = {
	.dram		= &orion5x_mbus_dram_info,
};

static u64 ehci_dmamask = 0xffffffffUL;


/*****************************************************************************
 * EHCI0
 ****************************************************************************/
static struct resource orion5x_ehci0_resources[] = {
	{
		.start	= ORION5X_USB0_PHYS_BASE,
		.end	= ORION5X_USB0_PHYS_BASE + SZ_4K - 1,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_ORION5X_USB0_CTRL,
		.end	= IRQ_ORION5X_USB0_CTRL,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct platform_device orion5x_ehci0 = {
	.name		= "orion-ehci",
	.id		= 0,
	.dev		= {
		.dma_mask		= &ehci_dmamask,
		.coherent_dma_mask	= 0xffffffff,
		.platform_data		= &orion5x_ehci_data,
	},
	.resource	= orion5x_ehci0_resources,
	.num_resources	= ARRAY_SIZE(orion5x_ehci0_resources),
};

void __init orion5x_ehci0_init(void)
{
	platform_device_register(&orion5x_ehci0);
}


/*****************************************************************************
 * EHCI1
 ****************************************************************************/
static struct resource orion5x_ehci1_resources[] = {
	{
		.start	= ORION5X_USB1_PHYS_BASE,
		.end	= ORION5X_USB1_PHYS_BASE + SZ_4K - 1,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_ORION5X_USB1_CTRL,
		.end	= IRQ_ORION5X_USB1_CTRL,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct platform_device orion5x_ehci1 = {
	.name		= "orion-ehci",
	.id		= 1,
	.dev		= {
		.dma_mask		= &ehci_dmamask,
		.coherent_dma_mask	= 0xffffffff,
		.platform_data		= &orion5x_ehci_data,
	},
	.resource	= orion5x_ehci1_resources,
	.num_resources	= ARRAY_SIZE(orion5x_ehci1_resources),
};

void __init orion5x_ehci1_init(void)
{
	platform_device_register(&orion5x_ehci1);
}


/*****************************************************************************
 * GigE
 ****************************************************************************/
struct mv643xx_eth_shared_platform_data orion5x_eth_shared_data = {
	.dram		= &orion5x_mbus_dram_info,
	.t_clk		= ORION5X_TCLK,
};

static struct resource orion5x_eth_shared_resources[] = {
	{
		.start	= ORION5X_ETH_PHYS_BASE + 0x2000,
		.end	= ORION5X_ETH_PHYS_BASE + 0x3fff,
		.flags	= IORESOURCE_MEM,
	},
};

static struct platform_device orion5x_eth_shared = {
	.name		= MV643XX_ETH_SHARED_NAME,
	.id		= 0,
	.dev		= {
		.platform_data	= &orion5x_eth_shared_data,
	},
	.num_resources	= 1,
	.resource	= orion5x_eth_shared_resources,
};

static struct resource orion5x_eth_resources[] = {
	{
		.name	= "eth irq",
		.start	= IRQ_ORION5X_ETH_SUM,
		.end	= IRQ_ORION5X_ETH_SUM,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct platform_device orion5x_eth = {
	.name		= MV643XX_ETH_NAME,
	.id		= 0,
	.num_resources	= 1,
	.resource	= orion5x_eth_resources,
};

void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
{
	eth_data->shared = &orion5x_eth_shared;
	orion5x_eth.dev.platform_data = eth_data;

	platform_device_register(&orion5x_eth_shared);
	platform_device_register(&orion5x_eth);
}


/*****************************************************************************
 * I2C
 ****************************************************************************/
static struct mv64xxx_i2c_pdata orion5x_i2c_pdata = {
	.freq_m		= 8, /* assumes 166 MHz TCLK */
	.freq_n		= 3,
	.timeout	= 1000, /* Default timeout of 1 second */
};

static struct resource orion5x_i2c_resources[] = {
	{
		.name	= "i2c base",
		.start	= I2C_PHYS_BASE,
		.end	= I2C_PHYS_BASE + 0x1f,
		.flags	= IORESOURCE_MEM,
	}, {
		.name	= "i2c irq",
		.start	= IRQ_ORION5X_I2C,
		.end	= IRQ_ORION5X_I2C,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct platform_device orion5x_i2c = {
	.name		= MV64XXX_I2C_CTLR_NAME,
	.id		= 0,
	.num_resources	= ARRAY_SIZE(orion5x_i2c_resources),
	.resource	= orion5x_i2c_resources,
	.dev		= {
		.platform_data	= &orion5x_i2c_pdata,
	},
};

void __init orion5x_i2c_init(void)
{
	platform_device_register(&orion5x_i2c);
}


/*****************************************************************************
 * SATA
 ****************************************************************************/
static struct resource orion5x_sata_resources[] = {
	{
		.name	= "sata base",
		.start	= ORION5X_SATA_PHYS_BASE,
		.end	= ORION5X_SATA_PHYS_BASE + 0x5000 - 1,
		.flags	= IORESOURCE_MEM,
	}, {
		.name	= "sata irq",
		.start	= IRQ_ORION5X_SATA,
		.end	= IRQ_ORION5X_SATA,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct platform_device orion5x_sata = {
	.name		= "sata_mv",
	.id		= 0,
	.dev		= {
		.coherent_dma_mask	= 0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(orion5x_sata_resources),
	.resource	= orion5x_sata_resources,
};

void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data)
{
	sata_data->dram = &orion5x_mbus_dram_info;
	orion5x_sata.dev.platform_data = sata_data;
	platform_device_register(&orion5x_sata);
}


/*****************************************************************************
 * UART0
 ****************************************************************************/
static struct plat_serial8250_port orion5x_uart0_data[] = {
	{
		.mapbase	= UART0_PHYS_BASE,
		.membase	= (char *)UART0_VIRT_BASE,
		.irq		= IRQ_ORION5X_UART0,
		.flags		= UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
		.iotype		= UPIO_MEM,
		.regshift	= 2,
		.uartclk	= ORION5X_TCLK,
	}, {
	},
};

static struct resource orion5x_uart0_resources[] = {
	{
		.start		= UART0_PHYS_BASE,
		.end		= UART0_PHYS_BASE + 0xff,
		.flags		= IORESOURCE_MEM,
	}, {
		.start		= IRQ_ORION5X_UART0,
		.end		= IRQ_ORION5X_UART0,
		.flags		= IORESOURCE_IRQ,
	},
};

static struct platform_device orion5x_uart0 = {
	.name			= "serial8250",
	.id			= PLAT8250_DEV_PLATFORM,
	.dev			= {
		.platform_data	= orion5x_uart0_data,
	},
	.resource		= orion5x_uart0_resources,
	.num_resources		= ARRAY_SIZE(orion5x_uart0_resources),
};

void __init orion5x_uart0_init(void)
{
	platform_device_register(&orion5x_uart0);
}


/*****************************************************************************
 * UART1
 ****************************************************************************/
static struct plat_serial8250_port orion5x_uart1_data[] = {
	{
		.mapbase	= UART1_PHYS_BASE,
		.membase	= (char *)UART1_VIRT_BASE,
		.irq		= IRQ_ORION5X_UART1,
		.flags		= UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
		.iotype		= UPIO_MEM,
		.regshift	= 2,
		.uartclk	= ORION5X_TCLK,
	}, {
	},
};

static struct resource orion5x_uart1_resources[] = {
	{
		.start		= UART1_PHYS_BASE,
		.end		= UART1_PHYS_BASE + 0xff,
		.flags		= IORESOURCE_MEM,
	}, {
		.start		= IRQ_ORION5X_UART1,
		.end		= IRQ_ORION5X_UART1,
		.flags		= IORESOURCE_IRQ,
	},
};

static struct platform_device orion5x_uart1 = {
	.name			= "serial8250",
	.id			= PLAT8250_DEV_PLATFORM1,
	.dev			= {
		.platform_data	= orion5x_uart1_data,
	},
	.resource		= orion5x_uart1_resources,
	.num_resources		= ARRAY_SIZE(orion5x_uart1_resources),
};

void __init orion5x_uart1_init(void)
{
	platform_device_register(&orion5x_uart1);
}


/*****************************************************************************
 * Time handling
 ****************************************************************************/
static void orion5x_timer_init(void)
{
	orion_time_init(IRQ_ORION5X_BRIDGE, ORION5X_TCLK);
}

struct sys_timer orion5x_timer = {
	.init = orion5x_timer_init,
};


/*****************************************************************************
 * General
 ****************************************************************************/
/*
 * Identify device ID and rev from PCIe configuration header space '0'.
 */
static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name)
{
	orion5x_pcie_id(dev, rev);

	if (*dev == MV88F5281_DEV_ID) {
		if (*rev == MV88F5281_REV_D2) {
			*dev_name = "MV88F5281-D2";
		} else if (*rev == MV88F5281_REV_D1) {
			*dev_name = "MV88F5281-D1";
		} else {
			*dev_name = "MV88F5281-Rev-Unsupported";
		}
	} else if (*dev == MV88F5182_DEV_ID) {
		if (*rev == MV88F5182_REV_A2) {
			*dev_name = "MV88F5182-A2";
		} else {
			*dev_name = "MV88F5182-Rev-Unsupported";
		}
	} else if (*dev == MV88F5181_DEV_ID) {
		if (*rev == MV88F5181_REV_B1) {
			*dev_name = "MV88F5181-Rev-B1";
		} else if (*rev == MV88F5181L_REV_A1) {
			*dev_name = "MV88F5181L-Rev-A1";
		} else {
			*dev_name = "MV88F5181(L)-Rev-Unsupported";
		}
	} else {
		*dev_name = "Device-Unknown";
	}
}

void __init orion5x_init(void)
{
	char *dev_name;
	u32 dev, rev;

	orion5x_id(&dev, &rev, &dev_name);
	printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, ORION5X_TCLK);

	/*
	 * Setup Orion address map
	 */
	orion5x_setup_cpu_mbus_bridge();
}

/*
 * Many orion-based systems have buggy bootloader implementations.
 * This is a common fixup for bogus memory tags.
 */
void __init tag_fixup_mem32(struct machine_desc *mdesc, struct tag *t,
			    char **from, struct meminfo *meminfo)
{
	for (; t->hdr.size; t = tag_next(t))
		if (t->hdr.tag == ATAG_MEM &&
		    (!t->u.mem.size || t->u.mem.size & ~PAGE_MASK ||
		     t->u.mem.start & ~PAGE_MASK)) {
			printk(KERN_WARNING
			       "Clearing invalid memory bank %dKB@0x%08x\n",
			       t->u.mem.size / 1024, t->u.mem.start);
			t->hdr.tag = 0;
		}
}
Commit	Line	Data
585cf175	1	/*
9dd0b194	2	* arch/arm/mach-orion5x/common.c
585cf175	3	*
9dd0b194	4	* Core functions for Marvell Orion 5x SoCs
585cf175 TP	5	*
	6	* Maintainer: Tzachi Perelstein <tzachi@marvell.com>
	7	*
159ffb3a LB	8	* This file is licensed under the terms of the GNU General Public
159ffb3a LB	9	* License version 2. This program is licensed "as is" without any
585cf175 TP	10	* warranty of any kind, whether express or implied.
	11	*/
	12
	13	#include <linux/kernel.h>
	14	#include <linux/init.h>
ca26f7d3 TP	15	#include <linux/platform_device.h>
ca26f7d3 TP	16	#include <linux/serial_8250.h>
83b6d822	17	#include <linux/mbus.h>
e07c9d85	18	#include <linux/mv643xx_eth.h>
144aa3db	19	#include <linux/mv643xx_i2c.h>
15a32632	20	#include <linux/ata_platform.h>
585cf175	21	#include <asm/page.h>
be73a347	22	#include <asm/setup.h>
c67de5b3	23	#include <asm/timex.h>
be73a347	24	#include <asm/mach/arch.h>
585cf175	25	#include <asm/mach/map.h>
2bac1de2	26	#include <asm/mach/time.h>
f244baa3	27	#include <asm/arch/hardware.h>
9dd0b194	28	#include <asm/arch/orion5x.h>
705a7521	29	#include <asm/plat-orion/ehci-orion.h>
5d4294c5	30	#include <asm/plat-orion/orion_nand.h>
2bac1de2	31	#include <asm/plat-orion/time.h>
585cf175 TP	32	#include "common.h"
	33
	34	/*****************************************************************************
	35	* I/O Address Mapping
	36	****************************************************************************/
9dd0b194	37	static struct map_desc orion5x_io_desc[] __initdata = {
585cf175	38	{
9dd0b194 LB	39	.virtual = ORION5X_REGS_VIRT_BASE,
	40	.pfn = __phys_to_pfn(ORION5X_REGS_PHYS_BASE),
	41	.length = ORION5X_REGS_SIZE,
e7068ad3 LB	42	.type = MT_DEVICE,
e7068ad3 LB	43	}, {
9dd0b194 LB	44	.virtual = ORION5X_PCIE_IO_VIRT_BASE,
	45	.pfn = __phys_to_pfn(ORION5X_PCIE_IO_PHYS_BASE),
	46	.length = ORION5X_PCIE_IO_SIZE,
e7068ad3 LB	47	.type = MT_DEVICE,
e7068ad3 LB	48	}, {
9dd0b194 LB	49	.virtual = ORION5X_PCI_IO_VIRT_BASE,
	50	.pfn = __phys_to_pfn(ORION5X_PCI_IO_PHYS_BASE),
	51	.length = ORION5X_PCI_IO_SIZE,
e7068ad3 LB	52	.type = MT_DEVICE,
e7068ad3 LB	53	}, {
9dd0b194 LB	54	.virtual = ORION5X_PCIE_WA_VIRT_BASE,
	55	.pfn = __phys_to_pfn(ORION5X_PCIE_WA_PHYS_BASE),
	56	.length = ORION5X_PCIE_WA_SIZE,
e7068ad3	57	.type = MT_DEVICE,
585cf175 TP	58	},
	59	};
	60
9dd0b194	61	void __init orion5x_map_io(void)
585cf175	62	{
9dd0b194	63	iotable_init(orion5x_io_desc, ARRAY_SIZE(orion5x_io_desc));
585cf175	64	}
c67de5b3	65
044f6c7c	66
ca26f7d3	67	/*****************************************************************************
044f6c7c	68	* EHCI
ca26f7d3	69	****************************************************************************/
044f6c7c LB	70	static struct orion_ehci_data orion5x_ehci_data = {
044f6c7c LB	71	.dram = &orion5x_mbus_dram_info,
ca26f7d3 TP	72	};
ca26f7d3 TP	73
044f6c7c	74	static u64 ehci_dmamask = 0xffffffffUL;
ca26f7d3	75
ca26f7d3	76
044f6c7c LB	77	/*****************************************************************************
	78	* EHCI0
	79	****************************************************************************/
9dd0b194	80	static struct resource orion5x_ehci0_resources[] = {
ca26f7d3	81	{
9dd0b194	82	.start = ORION5X_USB0_PHYS_BASE,
994cab84	83	.end = ORION5X_USB0_PHYS_BASE + SZ_4K - 1,
ca26f7d3	84	.flags = IORESOURCE_MEM,
e7068ad3	85	}, {
9dd0b194 LB	86	.start = IRQ_ORION5X_USB0_CTRL,
9dd0b194 LB	87	.end = IRQ_ORION5X_USB0_CTRL,
ca26f7d3 TP	88	.flags = IORESOURCE_IRQ,
	89	},
	90	};
	91
9dd0b194	92	static struct platform_device orion5x_ehci0 = {
ca26f7d3 TP	93	.name = "orion-ehci",
	94	.id = 0,
	95	.dev = {
	96	.dma_mask = &ehci_dmamask,
	97	.coherent_dma_mask = 0xffffffff,
9dd0b194	98	.platform_data = &orion5x_ehci_data,
ca26f7d3	99	},
9dd0b194 LB	100	.resource = orion5x_ehci0_resources,
9dd0b194 LB	101	.num_resources = ARRAY_SIZE(orion5x_ehci0_resources),
ca26f7d3 TP	102	};
ca26f7d3 TP	103
044f6c7c LB	104	void __init orion5x_ehci0_init(void)
	105	{
	106	platform_device_register(&orion5x_ehci0);
	107	}
	108
	109
	110	/*****************************************************************************
	111	* EHCI1
	112	****************************************************************************/
	113	static struct resource orion5x_ehci1_resources[] = {
	114	{
	115	.start = ORION5X_USB1_PHYS_BASE,
	116	.end = ORION5X_USB1_PHYS_BASE + SZ_4K - 1,
	117	.flags = IORESOURCE_MEM,
	118	}, {
	119	.start = IRQ_ORION5X_USB1_CTRL,
	120	.end = IRQ_ORION5X_USB1_CTRL,
	121	.flags = IORESOURCE_IRQ,
	122	},
	123	};
	124
9dd0b194	125	static struct platform_device orion5x_ehci1 = {
ca26f7d3 TP	126	.name = "orion-ehci",
	127	.id = 1,
	128	.dev = {
	129	.dma_mask = &ehci_dmamask,
	130	.coherent_dma_mask = 0xffffffff,
9dd0b194	131	.platform_data = &orion5x_ehci_data,
ca26f7d3	132	},
9dd0b194 LB	133	.resource = orion5x_ehci1_resources,
9dd0b194 LB	134	.num_resources = ARRAY_SIZE(orion5x_ehci1_resources),
ca26f7d3 TP	135	};
ca26f7d3 TP	136
044f6c7c LB	137	void __init orion5x_ehci1_init(void)
	138	{
	139	platform_device_register(&orion5x_ehci1);
	140	}
	141
	142
e07c9d85	143	/*****************************************************************************
044f6c7c	144	* GigE
e07c9d85	145	****************************************************************************/
d236f5a5 LB	146	struct mv643xx_eth_shared_platform_data orion5x_eth_shared_data = {
d236f5a5 LB	147	.dram = &orion5x_mbus_dram_info,
b8c15a60	148	.t_clk = ORION5X_TCLK,
d236f5a5 LB	149	};
d236f5a5 LB	150
9dd0b194	151	static struct resource orion5x_eth_shared_resources[] = {
e07c9d85	152	{
9dd0b194 LB	153	.start = ORION5X_ETH_PHYS_BASE + 0x2000,
9dd0b194 LB	154	.end = ORION5X_ETH_PHYS_BASE + 0x3fff,
e07c9d85 TP	155	.flags = IORESOURCE_MEM,
	156	},
	157	};
	158
9dd0b194	159	static struct platform_device orion5x_eth_shared = {
e07c9d85 TP	160	.name = MV643XX_ETH_SHARED_NAME,
e07c9d85 TP	161	.id = 0,
d236f5a5 LB	162	.dev = {
	163	.platform_data = &orion5x_eth_shared_data,
	164	},
e07c9d85	165	.num_resources = 1,
9dd0b194	166	.resource = orion5x_eth_shared_resources,
e07c9d85 TP	167	};
e07c9d85 TP	168
9dd0b194	169	static struct resource orion5x_eth_resources[] = {
e07c9d85 TP	170	{
e07c9d85 TP	171	.name = "eth irq",
9dd0b194 LB	172	.start = IRQ_ORION5X_ETH_SUM,
9dd0b194 LB	173	.end = IRQ_ORION5X_ETH_SUM,
e07c9d85	174	.flags = IORESOURCE_IRQ,
e7068ad3	175	},
e07c9d85 TP	176	};
e07c9d85 TP	177
9dd0b194	178	static struct platform_device orion5x_eth = {
e07c9d85 TP	179	.name = MV643XX_ETH_NAME,
	180	.id = 0,
	181	.num_resources = 1,
9dd0b194	182	.resource = orion5x_eth_resources,
e07c9d85 TP	183	};
e07c9d85 TP	184
9dd0b194	185	void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
e07c9d85	186	{
fa3959f4	187	eth_data->shared = &orion5x_eth_shared;
9dd0b194	188	orion5x_eth.dev.platform_data = eth_data;
fa3959f4	189
9dd0b194 LB	190	platform_device_register(&orion5x_eth_shared);
9dd0b194 LB	191	platform_device_register(&orion5x_eth);
e07c9d85 TP	192	}
e07c9d85 TP	193
044f6c7c	194
144aa3db	195	/*****************************************************************************
044f6c7c	196	* I2C
144aa3db	197	****************************************************************************/
9dd0b194	198	static struct mv64xxx_i2c_pdata orion5x_i2c_pdata = {
144aa3db HVR	199	.freq_m = 8, /* assumes 166 MHz TCLK */
	200	.freq_n = 3,
	201	.timeout = 1000, /* Default timeout of 1 second */
	202	};
	203
9dd0b194	204	static struct resource orion5x_i2c_resources[] = {
144aa3db	205	{
e7068ad3 LB	206	.name = "i2c base",
e7068ad3 LB	207	.start = I2C_PHYS_BASE,
044f6c7c	208	.end = I2C_PHYS_BASE + 0x1f,
e7068ad3 LB	209	.flags = IORESOURCE_MEM,
	210	}, {
	211	.name = "i2c irq",
	212	.start = IRQ_ORION5X_I2C,
	213	.end = IRQ_ORION5X_I2C,
	214	.flags = IORESOURCE_IRQ,
144aa3db HVR	215	},
	216	};
	217
9dd0b194	218	static struct platform_device orion5x_i2c = {
144aa3db HVR	219	.name = MV64XXX_I2C_CTLR_NAME,
144aa3db HVR	220	.id = 0,
9dd0b194 LB	221	.num_resources = ARRAY_SIZE(orion5x_i2c_resources),
9dd0b194 LB	222	.resource = orion5x_i2c_resources,
144aa3db	223	.dev = {
e7068ad3	224	.platform_data = &orion5x_i2c_pdata,
144aa3db HVR	225	},
	226	};
	227
044f6c7c LB	228	void __init orion5x_i2c_init(void)
	229	{
	230	platform_device_register(&orion5x_i2c);
	231	}
	232
	233
f244baa3	234	/*****************************************************************************
044f6c7c	235	* SATA
f244baa3	236	****************************************************************************/
9dd0b194	237	static struct resource orion5x_sata_resources[] = {
f244baa3	238	{
e7068ad3 LB	239	.name = "sata base",
	240	.start = ORION5X_SATA_PHYS_BASE,
	241	.end = ORION5X_SATA_PHYS_BASE + 0x5000 - 1,
	242	.flags = IORESOURCE_MEM,
	243	}, {
	244	.name = "sata irq",
	245	.start = IRQ_ORION5X_SATA,
	246	.end = IRQ_ORION5X_SATA,
	247	.flags = IORESOURCE_IRQ,
	248	},
f244baa3 SB	249	};
f244baa3 SB	250
9dd0b194	251	static struct platform_device orion5x_sata = {
e7068ad3 LB	252	.name = "sata_mv",
e7068ad3 LB	253	.id = 0,
f244baa3 SB	254	.dev = {
	255	.coherent_dma_mask = 0xffffffff,
	256	},
e7068ad3 LB	257	.num_resources = ARRAY_SIZE(orion5x_sata_resources),
e7068ad3 LB	258	.resource = orion5x_sata_resources,
f244baa3 SB	259	};
f244baa3 SB	260
9dd0b194	261	void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data)
f244baa3	262	{
9dd0b194 LB	263	sata_data->dram = &orion5x_mbus_dram_info;
	264	orion5x_sata.dev.platform_data = sata_data;
	265	platform_device_register(&orion5x_sata);
f244baa3 SB	266	}
f244baa3 SB	267
044f6c7c	268
2bac1de2	269	/*****************************************************************************
044f6c7c LB	270	* UART0
	271	****************************************************************************/
	272	static struct plat_serial8250_port orion5x_uart0_data[] = {
	273	{
	274	.mapbase = UART0_PHYS_BASE,
	275	.membase = (char *)UART0_VIRT_BASE,
	276	.irq = IRQ_ORION5X_UART0,
	277	.flags = UPF_SKIP_TEST \| UPF_BOOT_AUTOCONF,
	278	.iotype = UPIO_MEM,
	279	.regshift = 2,
	280	.uartclk = ORION5X_TCLK,
	281	}, {
	282	},
	283	};
	284
	285	static struct resource orion5x_uart0_resources[] = {
	286	{
	287	.start = UART0_PHYS_BASE,
	288	.end = UART0_PHYS_BASE + 0xff,
	289	.flags = IORESOURCE_MEM,
	290	}, {
	291	.start = IRQ_ORION5X_UART0,
	292	.end = IRQ_ORION5X_UART0,
	293	.flags = IORESOURCE_IRQ,
	294	},
	295	};
	296
	297	static struct platform_device orion5x_uart0 = {
	298	.name = "serial8250",
	299	.id = PLAT8250_DEV_PLATFORM,
	300	.dev = {
	301	.platform_data = orion5x_uart0_data,
	302	},
	303	.resource = orion5x_uart0_resources,
	304	.num_resources = ARRAY_SIZE(orion5x_uart0_resources),
	305	};
	306
	307	void __init orion5x_uart0_init(void)
	308	{
	309	platform_device_register(&orion5x_uart0);
	310	}
	311
	312
	313	/*****************************************************************************
	314	* UART1
2bac1de2	315	****************************************************************************/
044f6c7c LB	316	static struct plat_serial8250_port orion5x_uart1_data[] = {
	317	{
	318	.mapbase = UART1_PHYS_BASE,
	319	.membase = (char *)UART1_VIRT_BASE,
	320	.irq = IRQ_ORION5X_UART1,
	321	.flags = UPF_SKIP_TEST \| UPF_BOOT_AUTOCONF,
	322	.iotype = UPIO_MEM,
	323	.regshift = 2,
	324	.uartclk = ORION5X_TCLK,
	325	}, {
	326	},
	327	};
	328
	329	static struct resource orion5x_uart1_resources[] = {
	330	{
	331	.start = UART1_PHYS_BASE,
	332	.end = UART1_PHYS_BASE + 0xff,
	333	.flags = IORESOURCE_MEM,
	334	}, {
	335	.start = IRQ_ORION5X_UART1,
	336	.end = IRQ_ORION5X_UART1,
	337	.flags = IORESOURCE_IRQ,
	338	},
	339	};
	340
	341	static struct platform_device orion5x_uart1 = {
	342	.name = "serial8250",
	343	.id = PLAT8250_DEV_PLATFORM1,
	344	.dev = {
	345	.platform_data = orion5x_uart1_data,
	346	},
	347	.resource = orion5x_uart1_resources,
	348	.num_resources = ARRAY_SIZE(orion5x_uart1_resources),
	349	};
	350
	351	void __init orion5x_uart1_init(void)
	352	{
	353	platform_device_register(&orion5x_uart1);
	354	}
2bac1de2	355
044f6c7c LB	356
	357	/*****************************************************************************
	358	* Time handling
	359	****************************************************************************/
9dd0b194	360	static void orion5x_timer_init(void)
2bac1de2	361	{
9dd0b194	362	orion_time_init(IRQ_ORION5X_BRIDGE, ORION5X_TCLK);
2bac1de2 LB	363	}
2bac1de2 LB	364
9dd0b194	365	struct sys_timer orion5x_timer = {
e7068ad3	366	.init = orion5x_timer_init,
2bac1de2 LB	367	};
2bac1de2 LB	368
044f6c7c	369
c67de5b3 TP	370	/*****************************************************************************
	371	* General
	372	****************************************************************************/
c67de5b3	373	/*
b46926bb	374	* Identify device ID and rev from PCIe configuration header space '0'.
c67de5b3	375	*/
9dd0b194	376	static void __init orion5x_id(u32 dev, u32 rev, char **dev_name)
c67de5b3	377	{
9dd0b194	378	orion5x_pcie_id(dev, rev);
c67de5b3 TP	379
	380	if (*dev == MV88F5281_DEV_ID) {
	381	if (*rev == MV88F5281_REV_D2) {
	382	*dev_name = "MV88F5281-D2";
	383	} else if (*rev == MV88F5281_REV_D1) {
	384	*dev_name = "MV88F5281-D1";
	385	} else {
	386	*dev_name = "MV88F5281-Rev-Unsupported";
	387	}
	388	} else if (*dev == MV88F5182_DEV_ID) {
	389	if (*rev == MV88F5182_REV_A2) {
	390	*dev_name = "MV88F5182-A2";
	391	} else {
	392	*dev_name = "MV88F5182-Rev-Unsupported";
	393	}
c9e3de94 HVR	394	} else if (*dev == MV88F5181_DEV_ID) {
	395	if (*rev == MV88F5181_REV_B1) {
	396	*dev_name = "MV88F5181-Rev-B1";
d2b2a6bb LB	397	} else if (*rev == MV88F5181L_REV_A1) {
d2b2a6bb LB	398	*dev_name = "MV88F5181L-Rev-A1";
c9e3de94	399	} else {
d2b2a6bb	400	*dev_name = "MV88F5181(L)-Rev-Unsupported";
c9e3de94	401	}
c67de5b3 TP	402	} else {
	403	*dev_name = "Device-Unknown";
	404	}
	405	}
	406
9dd0b194	407	void __init orion5x_init(void)
c67de5b3 TP	408	{
	409	char *dev_name;
	410	u32 dev, rev;
	411
9dd0b194 LB	412	orion5x_id(&dev, &rev, &dev_name);
9dd0b194 LB	413	printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, ORION5X_TCLK);
c67de5b3 TP	414
	415	/*
	416	* Setup Orion address map
	417	*/
9dd0b194	418	orion5x_setup_cpu_mbus_bridge();
c67de5b3	419	}
be73a347 GL	420
	421	/*
	422	* Many orion-based systems have buggy bootloader implementations.
	423	* This is a common fixup for bogus memory tags.
	424	*/
	425	void __init tag_fixup_mem32(struct machine_desc mdesc, struct tag t,
	426	char *from, struct meminfo meminfo)
	427	{
	428	for (; t->hdr.size; t = tag_next(t))
	429	if (t->hdr.tag == ATAG_MEM &&
	430	(!t->u.mem.size \|\| t->u.mem.size & ~PAGE_MASK \|\|
	431	t->u.mem.start & ~PAGE_MASK)) {
	432	printk(KERN_WARNING
	433	"Clearing invalid memory bank %dKB@0x%08x\n",
	434	t->u.mem.size / 1024, t->u.mem.start);
	435	t->hdr.tag = 0;
	436	}
	437	}