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Commit | Line | Data |
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ffe7f95b | 1 | /* |
9312fffb | 2 | * linux/arch/arm/mach-omap2/board-rx51-peripherals.c |
ffe7f95b LL |
3 | * |
4 | * Copyright (C) 2008-2009 Nokia | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | #include <linux/kernel.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/platform_device.h> | |
14 | #include <linux/input.h> | |
6135434a | 15 | #include <linux/input/matrix_keypad.h> |
ffe7f95b | 16 | #include <linux/spi/spi.h> |
a24e61a9 | 17 | #include <linux/spi/wl12xx.h> |
ffe7f95b | 18 | #include <linux/i2c.h> |
ebeb53e1 | 19 | #include <linux/i2c/twl.h> |
ffe7f95b LL |
20 | #include <linux/clk.h> |
21 | #include <linux/delay.h> | |
22 | #include <linux/regulator/machine.h> | |
23 | #include <linux/gpio.h> | |
f014ee32 | 24 | #include <linux/gpio_keys.h> |
5e763d29 | 25 | #include <linux/mmc/host.h> |
ffe7f95b | 26 | |
ce491cf8 TL |
27 | #include <plat/mcspi.h> |
28 | #include <plat/mux.h> | |
29 | #include <plat/board.h> | |
30 | #include <plat/common.h> | |
31 | #include <plat/dma.h> | |
32 | #include <plat/gpmc.h> | |
ce491cf8 TL |
33 | #include <plat/onenand.h> |
34 | #include <plat/gpmc-smc91x.h> | |
ffe7f95b | 35 | |
4896e394 | 36 | #include "mux.h" |
d02a900b | 37 | #include "hsmmc.h" |
ffe7f95b | 38 | |
f52eeee8 AH |
39 | #define SYSTEM_REV_B_USES_VAUX3 0x1699 |
40 | #define SYSTEM_REV_S_USES_VAUX3 0x8 | |
41 | ||
a24e61a9 KV |
42 | #define RX51_WL1251_POWER_GPIO 87 |
43 | #define RX51_WL1251_IRQ_GPIO 42 | |
44 | ||
45 | /* list all spi devices here */ | |
46 | enum { | |
47 | RX51_SPI_WL1251, | |
03e11104 | 48 | RX51_SPI_MIPID, /* LCD panel */ |
6996e7ff | 49 | RX51_SPI_TSC2005, /* Touch Controller */ |
a24e61a9 KV |
50 | }; |
51 | ||
52 | static struct wl12xx_platform_data wl1251_pdata; | |
53 | ||
54 | static struct omap2_mcspi_device_config wl1251_mcspi_config = { | |
55 | .turbo_mode = 0, | |
56 | .single_channel = 1, | |
57 | }; | |
58 | ||
03e11104 RQ |
59 | static struct omap2_mcspi_device_config mipid_mcspi_config = { |
60 | .turbo_mode = 0, | |
61 | .single_channel = 1, | |
62 | }; | |
63 | ||
6996e7ff RQ |
64 | static struct omap2_mcspi_device_config tsc2005_mcspi_config = { |
65 | .turbo_mode = 0, | |
66 | .single_channel = 1, | |
67 | }; | |
68 | ||
a24e61a9 KV |
69 | static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = { |
70 | [RX51_SPI_WL1251] = { | |
71 | .modalias = "wl1251", | |
72 | .bus_num = 4, | |
73 | .chip_select = 0, | |
74 | .max_speed_hz = 48000000, | |
860fc976 | 75 | .mode = SPI_MODE_3, |
a24e61a9 KV |
76 | .controller_data = &wl1251_mcspi_config, |
77 | .platform_data = &wl1251_pdata, | |
78 | }, | |
03e11104 RQ |
79 | [RX51_SPI_MIPID] = { |
80 | .modalias = "acx565akm", | |
81 | .bus_num = 1, | |
82 | .chip_select = 2, | |
83 | .max_speed_hz = 6000000, | |
84 | .controller_data = &mipid_mcspi_config, | |
85 | }, | |
6996e7ff RQ |
86 | [RX51_SPI_TSC2005] = { |
87 | .modalias = "tsc2005", | |
88 | .bus_num = 1, | |
89 | .chip_select = 0, | |
90 | /* .irq = OMAP_GPIO_IRQ(RX51_TSC2005_IRQ_GPIO),*/ | |
91 | .max_speed_hz = 6000000, | |
92 | .controller_data = &tsc2005_mcspi_config, | |
93 | /* .platform_data = &tsc2005_config,*/ | |
94 | }, | |
a24e61a9 KV |
95 | }; |
96 | ||
f014ee32 JN |
97 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) |
98 | ||
99 | #define RX51_GPIO_CAMERA_LENS_COVER 110 | |
100 | #define RX51_GPIO_CAMERA_FOCUS 68 | |
101 | #define RX51_GPIO_CAMERA_CAPTURE 69 | |
102 | #define RX51_GPIO_KEYPAD_SLIDE 71 | |
103 | #define RX51_GPIO_LOCK_BUTTON 113 | |
104 | #define RX51_GPIO_PROXIMITY 89 | |
105 | ||
106 | #define RX51_GPIO_DEBOUNCE_TIMEOUT 10 | |
107 | ||
108 | static struct gpio_keys_button rx51_gpio_keys[] = { | |
109 | { | |
110 | .desc = "Camera Lens Cover", | |
111 | .type = EV_SW, | |
112 | .code = SW_CAMERA_LENS_COVER, | |
113 | .gpio = RX51_GPIO_CAMERA_LENS_COVER, | |
114 | .active_low = 1, | |
115 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
116 | }, { | |
117 | .desc = "Camera Focus", | |
118 | .type = EV_KEY, | |
119 | .code = KEY_CAMERA_FOCUS, | |
120 | .gpio = RX51_GPIO_CAMERA_FOCUS, | |
121 | .active_low = 1, | |
122 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
123 | }, { | |
124 | .desc = "Camera Capture", | |
125 | .type = EV_KEY, | |
126 | .code = KEY_CAMERA, | |
127 | .gpio = RX51_GPIO_CAMERA_CAPTURE, | |
128 | .active_low = 1, | |
129 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
130 | }, { | |
131 | .desc = "Lock Button", | |
132 | .type = EV_KEY, | |
133 | .code = KEY_SCREENLOCK, | |
134 | .gpio = RX51_GPIO_LOCK_BUTTON, | |
135 | .active_low = 1, | |
136 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
137 | }, { | |
138 | .desc = "Keypad Slide", | |
139 | .type = EV_SW, | |
140 | .code = SW_KEYPAD_SLIDE, | |
141 | .gpio = RX51_GPIO_KEYPAD_SLIDE, | |
142 | .active_low = 1, | |
143 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
144 | }, { | |
145 | .desc = "Proximity Sensor", | |
146 | .type = EV_SW, | |
147 | .code = SW_FRONT_PROXIMITY, | |
148 | .gpio = RX51_GPIO_PROXIMITY, | |
149 | .active_low = 0, | |
150 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
151 | } | |
152 | }; | |
153 | ||
154 | static struct gpio_keys_platform_data rx51_gpio_keys_data = { | |
155 | .buttons = rx51_gpio_keys, | |
156 | .nbuttons = ARRAY_SIZE(rx51_gpio_keys), | |
157 | }; | |
158 | ||
159 | static struct platform_device rx51_gpio_keys_device = { | |
160 | .name = "gpio-keys", | |
161 | .id = -1, | |
162 | .dev = { | |
163 | .platform_data = &rx51_gpio_keys_data, | |
164 | }, | |
165 | }; | |
166 | ||
167 | static void __init rx51_add_gpio_keys(void) | |
168 | { | |
169 | platform_device_register(&rx51_gpio_keys_device); | |
170 | } | |
171 | #else | |
172 | static void __init rx51_add_gpio_keys(void) | |
173 | { | |
174 | } | |
175 | #endif /* CONFIG_KEYBOARD_GPIO || CONFIG_KEYBOARD_GPIO_MODULE */ | |
176 | ||
4f543332 | 177 | static int board_keymap[] = { |
3fea6026 DT |
178 | /* |
179 | * Note that KEY(x, 8, KEY_XXX) entries represent "entrire row | |
180 | * connected to the ground" matrix state. | |
181 | */ | |
ffe7f95b | 182 | KEY(0, 0, KEY_Q), |
acf442dc AK |
183 | KEY(0, 1, KEY_O), |
184 | KEY(0, 2, KEY_P), | |
185 | KEY(0, 3, KEY_COMMA), | |
186 | KEY(0, 4, KEY_BACKSPACE), | |
187 | KEY(0, 6, KEY_A), | |
188 | KEY(0, 7, KEY_S), | |
3fea6026 | 189 | |
acf442dc | 190 | KEY(1, 0, KEY_W), |
ffe7f95b | 191 | KEY(1, 1, KEY_D), |
acf442dc AK |
192 | KEY(1, 2, KEY_F), |
193 | KEY(1, 3, KEY_G), | |
194 | KEY(1, 4, KEY_H), | |
195 | KEY(1, 5, KEY_J), | |
196 | KEY(1, 6, KEY_K), | |
197 | KEY(1, 7, KEY_L), | |
3fea6026 | 198 | |
acf442dc AK |
199 | KEY(2, 0, KEY_E), |
200 | KEY(2, 1, KEY_DOT), | |
ffe7f95b | 201 | KEY(2, 2, KEY_UP), |
acf442dc AK |
202 | KEY(2, 3, KEY_ENTER), |
203 | KEY(2, 5, KEY_Z), | |
204 | KEY(2, 6, KEY_X), | |
205 | KEY(2, 7, KEY_C), | |
3fea6026 DT |
206 | KEY(2, 8, KEY_F9), |
207 | ||
acf442dc AK |
208 | KEY(3, 0, KEY_R), |
209 | KEY(3, 1, KEY_V), | |
210 | KEY(3, 2, KEY_B), | |
ffe7f95b | 211 | KEY(3, 3, KEY_N), |
acf442dc AK |
212 | KEY(3, 4, KEY_M), |
213 | KEY(3, 5, KEY_SPACE), | |
214 | KEY(3, 6, KEY_SPACE), | |
215 | KEY(3, 7, KEY_LEFT), | |
3fea6026 | 216 | |
acf442dc AK |
217 | KEY(4, 0, KEY_T), |
218 | KEY(4, 1, KEY_DOWN), | |
219 | KEY(4, 2, KEY_RIGHT), | |
ffe7f95b | 220 | KEY(4, 4, KEY_LEFTCTRL), |
acf442dc AK |
221 | KEY(4, 5, KEY_RIGHTALT), |
222 | KEY(4, 6, KEY_LEFTSHIFT), | |
2e65a207 | 223 | KEY(4, 8, KEY_F10), |
3fea6026 | 224 | |
acf442dc | 225 | KEY(5, 0, KEY_Y), |
2e65a207 | 226 | KEY(5, 8, KEY_F11), |
3fea6026 | 227 | |
acf442dc | 228 | KEY(6, 0, KEY_U), |
3fea6026 | 229 | |
acf442dc AK |
230 | KEY(7, 0, KEY_I), |
231 | KEY(7, 1, KEY_F7), | |
232 | KEY(7, 2, KEY_F8), | |
ffe7f95b LL |
233 | }; |
234 | ||
4f543332 TL |
235 | static struct matrix_keymap_data board_map_data = { |
236 | .keymap = board_keymap, | |
237 | .keymap_size = ARRAY_SIZE(board_keymap), | |
238 | }; | |
239 | ||
ffe7f95b | 240 | static struct twl4030_keypad_data rx51_kp_data = { |
4f543332 | 241 | .keymap_data = &board_map_data, |
ffe7f95b LL |
242 | .rows = 8, |
243 | .cols = 8, | |
ffe7f95b LL |
244 | .rep = 1, |
245 | }; | |
246 | ||
ffe7f95b LL |
247 | static struct twl4030_madc_platform_data rx51_madc_data = { |
248 | .irq_line = 1, | |
249 | }; | |
250 | ||
ce6f0016 AH |
251 | /* Enable input logic and pull all lines up when eMMC is on. */ |
252 | static struct omap_board_mux rx51_mmc2_on_mux[] = { | |
253 | OMAP3_MUX(SDMMC2_CMD, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
254 | OMAP3_MUX(SDMMC2_DAT0, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
255 | OMAP3_MUX(SDMMC2_DAT1, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
256 | OMAP3_MUX(SDMMC2_DAT2, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
257 | OMAP3_MUX(SDMMC2_DAT3, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
258 | OMAP3_MUX(SDMMC2_DAT4, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
259 | OMAP3_MUX(SDMMC2_DAT5, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
260 | OMAP3_MUX(SDMMC2_DAT6, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
261 | OMAP3_MUX(SDMMC2_DAT7, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
262 | { .reg_offset = OMAP_MUX_TERMINATOR }, | |
263 | }; | |
264 | ||
265 | /* Disable input logic and pull all lines down when eMMC is off. */ | |
266 | static struct omap_board_mux rx51_mmc2_off_mux[] = { | |
267 | OMAP3_MUX(SDMMC2_CMD, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
268 | OMAP3_MUX(SDMMC2_DAT0, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
269 | OMAP3_MUX(SDMMC2_DAT1, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
270 | OMAP3_MUX(SDMMC2_DAT2, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
271 | OMAP3_MUX(SDMMC2_DAT3, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
272 | OMAP3_MUX(SDMMC2_DAT4, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
273 | OMAP3_MUX(SDMMC2_DAT5, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
274 | OMAP3_MUX(SDMMC2_DAT6, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
275 | OMAP3_MUX(SDMMC2_DAT7, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
276 | { .reg_offset = OMAP_MUX_TERMINATOR }, | |
277 | }; | |
278 | ||
279 | /* | |
280 | * Current flows to eMMC when eMMC is off and the data lines are pulled up, | |
281 | * so pull them down. N.B. we pull 8 lines because we are using 8 lines. | |
282 | */ | |
283 | static void rx51_mmc2_remux(struct device *dev, int slot, int power_on) | |
284 | { | |
285 | if (power_on) | |
286 | omap_mux_write_array(rx51_mmc2_on_mux); | |
287 | else | |
288 | omap_mux_write_array(rx51_mmc2_off_mux); | |
289 | } | |
290 | ||
68ff0423 | 291 | static struct omap2_hsmmc_info mmc[] __initdata = { |
ffe7f95b LL |
292 | { |
293 | .name = "external", | |
294 | .mmc = 1, | |
295 | .wires = 4, | |
296 | .cover_only = true, | |
297 | .gpio_cd = 160, | |
298 | .gpio_wp = -EINVAL, | |
5e763d29 | 299 | .power_saving = true, |
ffe7f95b LL |
300 | }, |
301 | { | |
302 | .name = "internal", | |
303 | .mmc = 2, | |
ce6f0016 | 304 | .wires = 8, /* See also rx51_mmc2_remux */ |
ffe7f95b LL |
305 | .gpio_cd = -EINVAL, |
306 | .gpio_wp = -EINVAL, | |
5e763d29 AH |
307 | .nonremovable = true, |
308 | .power_saving = true, | |
ce6f0016 | 309 | .remux = rx51_mmc2_remux, |
ffe7f95b LL |
310 | }, |
311 | {} /* Terminator */ | |
312 | }; | |
313 | ||
314 | static struct regulator_consumer_supply rx51_vmmc1_supply = { | |
68ff0423 AH |
315 | .supply = "vmmc", |
316 | .dev_name = "mmci-omap-hs.0", | |
ffe7f95b LL |
317 | }; |
318 | ||
4cfcaef1 | 319 | static struct regulator_consumer_supply rx51_vaux3_supply = { |
68ff0423 AH |
320 | .supply = "vmmc", |
321 | .dev_name = "mmci-omap-hs.1", | |
ffe7f95b LL |
322 | }; |
323 | ||
324 | static struct regulator_consumer_supply rx51_vsim_supply = { | |
68ff0423 AH |
325 | .supply = "vmmc_aux", |
326 | .dev_name = "mmci-omap-hs.1", | |
ffe7f95b LL |
327 | }; |
328 | ||
4cfcaef1 JN |
329 | static struct regulator_consumer_supply rx51_vmmc2_supplies[] = { |
330 | /* tlv320aic3x analog supplies */ | |
331 | { | |
332 | .supply = "AVDD", | |
333 | .dev_name = "2-0018", | |
334 | }, | |
335 | { | |
336 | .supply = "DRVDD", | |
337 | .dev_name = "2-0018", | |
338 | }, | |
339 | /* Keep vmmc as last item. It is not iterated for newer boards */ | |
340 | { | |
341 | .supply = "vmmc", | |
342 | .dev_name = "mmci-omap-hs.1", | |
343 | }, | |
344 | }; | |
345 | ||
346 | static struct regulator_consumer_supply rx51_vio_supplies[] = { | |
347 | /* tlv320aic3x digital supplies */ | |
348 | { | |
349 | .supply = "IOVDD", | |
350 | .dev_name = "2-0018" | |
351 | }, | |
352 | { | |
353 | .supply = "DVDD", | |
354 | .dev_name = "2-0018" | |
355 | }, | |
356 | }; | |
357 | ||
0581b52e RQ |
358 | #if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE) |
359 | extern struct platform_device rx51_display_device; | |
360 | #endif | |
361 | ||
362 | static struct regulator_consumer_supply rx51_vaux1_consumers[] = { | |
363 | #if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE) | |
364 | { | |
365 | .supply = "vdds_sdi", | |
366 | .dev = &rx51_display_device.dev, | |
367 | }, | |
368 | #endif | |
369 | }; | |
370 | ||
ffe7f95b LL |
371 | static struct regulator_init_data rx51_vaux1 = { |
372 | .constraints = { | |
373 | .name = "V28", | |
374 | .min_uV = 2800000, | |
375 | .max_uV = 2800000, | |
376 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
377 | | REGULATOR_MODE_STANDBY, | |
378 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
379 | | REGULATOR_CHANGE_STATUS, | |
380 | }, | |
0581b52e RQ |
381 | .num_consumer_supplies = ARRAY_SIZE(rx51_vaux1_consumers), |
382 | .consumer_supplies = rx51_vaux1_consumers, | |
ffe7f95b LL |
383 | }; |
384 | ||
385 | static struct regulator_init_data rx51_vaux2 = { | |
386 | .constraints = { | |
387 | .name = "VCSI", | |
388 | .min_uV = 1800000, | |
389 | .max_uV = 1800000, | |
390 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
391 | | REGULATOR_MODE_STANDBY, | |
392 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
393 | | REGULATOR_CHANGE_STATUS, | |
394 | }, | |
395 | }; | |
396 | ||
397 | /* VAUX3 - adds more power to VIO_18 rail */ | |
f52eeee8 | 398 | static struct regulator_init_data rx51_vaux3_cam = { |
ffe7f95b LL |
399 | .constraints = { |
400 | .name = "VCAM_DIG_18", | |
401 | .min_uV = 1800000, | |
402 | .max_uV = 1800000, | |
403 | .apply_uV = true, | |
404 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
405 | | REGULATOR_MODE_STANDBY, | |
406 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
407 | | REGULATOR_CHANGE_STATUS, | |
408 | }, | |
409 | }; | |
410 | ||
f52eeee8 AH |
411 | static struct regulator_init_data rx51_vaux3_mmc = { |
412 | .constraints = { | |
413 | .name = "VMMC2_30", | |
414 | .min_uV = 2800000, | |
415 | .max_uV = 3000000, | |
416 | .apply_uV = true, | |
417 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
418 | | REGULATOR_MODE_STANDBY, | |
419 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
420 | | REGULATOR_CHANGE_MODE | |
421 | | REGULATOR_CHANGE_STATUS, | |
422 | }, | |
423 | .num_consumer_supplies = 1, | |
4cfcaef1 | 424 | .consumer_supplies = &rx51_vaux3_supply, |
f52eeee8 AH |
425 | }; |
426 | ||
ffe7f95b LL |
427 | static struct regulator_init_data rx51_vaux4 = { |
428 | .constraints = { | |
429 | .name = "VCAM_ANA_28", | |
430 | .min_uV = 2800000, | |
431 | .max_uV = 2800000, | |
432 | .apply_uV = true, | |
433 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
434 | | REGULATOR_MODE_STANDBY, | |
435 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
436 | | REGULATOR_CHANGE_STATUS, | |
437 | }, | |
438 | }; | |
439 | ||
440 | static struct regulator_init_data rx51_vmmc1 = { | |
441 | .constraints = { | |
442 | .min_uV = 1850000, | |
443 | .max_uV = 3150000, | |
444 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
445 | | REGULATOR_MODE_STANDBY, | |
446 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
447 | | REGULATOR_CHANGE_MODE | |
448 | | REGULATOR_CHANGE_STATUS, | |
449 | }, | |
450 | .num_consumer_supplies = 1, | |
451 | .consumer_supplies = &rx51_vmmc1_supply, | |
452 | }; | |
453 | ||
454 | static struct regulator_init_data rx51_vmmc2 = { | |
455 | .constraints = { | |
f2add1de JN |
456 | .name = "V28_A", |
457 | .min_uV = 2800000, | |
458 | .max_uV = 3000000, | |
ffe7f95b LL |
459 | .apply_uV = true, |
460 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
461 | | REGULATOR_MODE_STANDBY, | |
462 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
463 | | REGULATOR_CHANGE_MODE | |
464 | | REGULATOR_CHANGE_STATUS, | |
465 | }, | |
4cfcaef1 JN |
466 | .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc2_supplies), |
467 | .consumer_supplies = rx51_vmmc2_supplies, | |
ffe7f95b LL |
468 | }; |
469 | ||
470 | static struct regulator_init_data rx51_vsim = { | |
471 | .constraints = { | |
472 | .name = "VMMC2_IO_18", | |
473 | .min_uV = 1800000, | |
474 | .max_uV = 1800000, | |
475 | .apply_uV = true, | |
476 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
477 | | REGULATOR_MODE_STANDBY, | |
478 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
479 | | REGULATOR_CHANGE_STATUS, | |
480 | }, | |
481 | .num_consumer_supplies = 1, | |
482 | .consumer_supplies = &rx51_vsim_supply, | |
483 | }; | |
484 | ||
485 | static struct regulator_init_data rx51_vdac = { | |
486 | .constraints = { | |
487 | .min_uV = 1800000, | |
488 | .max_uV = 1800000, | |
489 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
490 | | REGULATOR_MODE_STANDBY, | |
491 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
492 | | REGULATOR_CHANGE_MODE | |
493 | | REGULATOR_CHANGE_STATUS, | |
494 | }, | |
495 | }; | |
496 | ||
4cfcaef1 JN |
497 | static struct regulator_init_data rx51_vio = { |
498 | .constraints = { | |
499 | .min_uV = 1800000, | |
500 | .max_uV = 1800000, | |
501 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
502 | | REGULATOR_MODE_STANDBY, | |
503 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
504 | | REGULATOR_CHANGE_MODE | |
505 | | REGULATOR_CHANGE_STATUS, | |
506 | }, | |
507 | .num_consumer_supplies = ARRAY_SIZE(rx51_vio_supplies), | |
508 | .consumer_supplies = rx51_vio_supplies, | |
509 | }; | |
510 | ||
ffe7f95b LL |
511 | static int rx51_twlgpio_setup(struct device *dev, unsigned gpio, unsigned n) |
512 | { | |
513 | /* FIXME this gpio setup is just a placeholder for now */ | |
514 | gpio_request(gpio + 6, "backlight_pwm"); | |
515 | gpio_direction_output(gpio + 6, 0); | |
516 | gpio_request(gpio + 7, "speaker_en"); | |
517 | gpio_direction_output(gpio + 7, 1); | |
518 | ||
ffe7f95b LL |
519 | return 0; |
520 | } | |
521 | ||
522 | static struct twl4030_gpio_platform_data rx51_gpio_data = { | |
523 | .gpio_base = OMAP_MAX_GPIO_LINES, | |
524 | .irq_base = TWL4030_GPIO_IRQ_BASE, | |
525 | .irq_end = TWL4030_GPIO_IRQ_END, | |
526 | .pulldowns = BIT(0) | BIT(1) | BIT(2) | BIT(3) | |
527 | | BIT(4) | BIT(5) | |
528 | | BIT(8) | BIT(9) | BIT(10) | BIT(11) | |
529 | | BIT(12) | BIT(13) | BIT(14) | BIT(15) | |
530 | | BIT(16) | BIT(17) , | |
531 | .setup = rx51_twlgpio_setup, | |
532 | }; | |
533 | ||
dfc27b34 RQ |
534 | static struct twl4030_usb_data rx51_usb_data = { |
535 | .usb_mode = T2_USB_MODE_ULPI, | |
536 | }; | |
537 | ||
9312fffb AK |
538 | static struct twl4030_ins sleep_on_seq[] __initdata = { |
539 | /* | |
3c684e84 | 540 | * Turn off everything |
9312fffb | 541 | */ |
3c684e84 | 542 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_SLEEP), 2}, |
9312fffb AK |
543 | }; |
544 | ||
545 | static struct twl4030_script sleep_on_script __initdata = { | |
546 | .script = sleep_on_seq, | |
547 | .size = ARRAY_SIZE(sleep_on_seq), | |
548 | .flags = TWL4030_SLEEP_SCRIPT, | |
549 | }; | |
550 | ||
551 | static struct twl4030_ins wakeup_seq[] __initdata = { | |
552 | /* | |
3c684e84 | 553 | * Reenable everything |
9312fffb | 554 | */ |
3c684e84 | 555 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2}, |
9312fffb AK |
556 | }; |
557 | ||
558 | static struct twl4030_script wakeup_script __initdata = { | |
559 | .script = wakeup_seq, | |
560 | .size = ARRAY_SIZE(wakeup_seq), | |
561 | .flags = TWL4030_WAKEUP12_SCRIPT, | |
562 | }; | |
563 | ||
564 | static struct twl4030_ins wakeup_p3_seq[] __initdata = { | |
565 | /* | |
3c684e84 | 566 | * Reenable everything |
9312fffb | 567 | */ |
3c684e84 | 568 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2}, |
9312fffb AK |
569 | }; |
570 | ||
571 | static struct twl4030_script wakeup_p3_script __initdata = { | |
572 | .script = wakeup_p3_seq, | |
573 | .size = ARRAY_SIZE(wakeup_p3_seq), | |
574 | .flags = TWL4030_WAKEUP3_SCRIPT, | |
575 | }; | |
576 | ||
577 | static struct twl4030_ins wrst_seq[] __initdata = { | |
578 | /* | |
579 | * Reset twl4030. | |
580 | * Reset VDD1 regulator. | |
581 | * Reset VDD2 regulator. | |
582 | * Reset VPLL1 regulator. | |
583 | * Enable sysclk output. | |
584 | * Reenable twl4030. | |
585 | */ | |
586 | {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_OFF), 2}, | |
587 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 0, 1, RES_STATE_ACTIVE), | |
588 | 0x13}, | |
9312fffb AK |
589 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP, 0, 3, RES_STATE_OFF), 0x13}, |
590 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD1, RES_STATE_WRST), 0x13}, | |
591 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD2, RES_STATE_WRST), 0x13}, | |
592 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VPLL1, RES_STATE_WRST), 0x35}, | |
3c684e84 | 593 | {MSG_SINGULAR(DEV_GRP_P3, RES_HFCLKOUT, RES_STATE_ACTIVE), 2}, |
9312fffb AK |
594 | {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_ACTIVE), 2}, |
595 | }; | |
596 | ||
597 | static struct twl4030_script wrst_script __initdata = { | |
598 | .script = wrst_seq, | |
599 | .size = ARRAY_SIZE(wrst_seq), | |
600 | .flags = TWL4030_WRST_SCRIPT, | |
601 | }; | |
602 | ||
603 | static struct twl4030_script *twl4030_scripts[] __initdata = { | |
604 | /* wakeup12 script should be loaded before sleep script, otherwise a | |
605 | board might hit retention before loading of wakeup script is | |
606 | completed. This can cause boot failures depending on timing issues. | |
607 | */ | |
608 | &wakeup_script, | |
609 | &sleep_on_script, | |
610 | &wakeup_p3_script, | |
611 | &wrst_script, | |
612 | }; | |
613 | ||
614 | static struct twl4030_resconfig twl4030_rconfig[] __initdata = { | |
3c684e84 AK |
615 | { .resource = RES_VDD1, .devgroup = -1, |
616 | .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF, | |
617 | .remap_sleep = RES_STATE_OFF | |
618 | }, | |
619 | { .resource = RES_VDD2, .devgroup = -1, | |
620 | .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF, | |
621 | .remap_sleep = RES_STATE_OFF | |
622 | }, | |
623 | { .resource = RES_VPLL1, .devgroup = -1, | |
624 | .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF, | |
625 | .remap_sleep = RES_STATE_OFF | |
626 | }, | |
627 | { .resource = RES_VPLL2, .devgroup = -1, | |
628 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
629 | }, | |
630 | { .resource = RES_VAUX1, .devgroup = -1, | |
631 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
632 | }, | |
633 | { .resource = RES_VAUX2, .devgroup = -1, | |
634 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
635 | }, | |
636 | { .resource = RES_VAUX3, .devgroup = -1, | |
637 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
638 | }, | |
639 | { .resource = RES_VAUX4, .devgroup = -1, | |
640 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
641 | }, | |
642 | { .resource = RES_VMMC1, .devgroup = -1, | |
643 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
644 | }, | |
645 | { .resource = RES_VMMC2, .devgroup = -1, | |
646 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
647 | }, | |
648 | { .resource = RES_VDAC, .devgroup = -1, | |
649 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
650 | }, | |
651 | { .resource = RES_VSIM, .devgroup = -1, | |
652 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
653 | }, | |
654 | { .resource = RES_VINTANA1, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
655 | .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
656 | }, | |
657 | { .resource = RES_VINTANA2, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
658 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
659 | }, | |
660 | { .resource = RES_VINTDIG, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
661 | .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
662 | }, | |
663 | { .resource = RES_VIO, .devgroup = DEV_GRP_P3, | |
664 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
665 | }, | |
666 | { .resource = RES_CLKEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
667 | .type = 1, .type2 = -1 , .remap_off = -1, .remap_sleep = -1 | |
668 | }, | |
669 | { .resource = RES_REGEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
670 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
671 | }, | |
672 | { .resource = RES_NRES_PWRON, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
673 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
674 | }, | |
675 | { .resource = RES_SYSEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
676 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
677 | }, | |
678 | { .resource = RES_HFCLKOUT, .devgroup = DEV_GRP_P3, | |
679 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
680 | }, | |
681 | { .resource = RES_32KCLKOUT, .devgroup = -1, | |
682 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
683 | }, | |
684 | { .resource = RES_RESET, .devgroup = -1, | |
685 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
686 | }, | |
687 | { .resource = RES_Main_Ref, .devgroup = -1, | |
688 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
689 | }, | |
9312fffb AK |
690 | { 0, 0}, |
691 | }; | |
692 | ||
693 | static struct twl4030_power_data rx51_t2scripts_data __initdata = { | |
694 | .scripts = twl4030_scripts, | |
695 | .num = ARRAY_SIZE(twl4030_scripts), | |
696 | .resource_config = twl4030_rconfig, | |
697 | }; | |
698 | ||
699 | ||
700 | ||
701 | static struct twl4030_platform_data rx51_twldata __initdata = { | |
ffe7f95b LL |
702 | .irq_base = TWL4030_IRQ_BASE, |
703 | .irq_end = TWL4030_IRQ_END, | |
704 | ||
705 | /* platform_data for children goes here */ | |
706 | .gpio = &rx51_gpio_data, | |
707 | .keypad = &rx51_kp_data, | |
708 | .madc = &rx51_madc_data, | |
dfc27b34 | 709 | .usb = &rx51_usb_data, |
9312fffb | 710 | .power = &rx51_t2scripts_data, |
ffe7f95b LL |
711 | |
712 | .vaux1 = &rx51_vaux1, | |
713 | .vaux2 = &rx51_vaux2, | |
ffe7f95b LL |
714 | .vaux4 = &rx51_vaux4, |
715 | .vmmc1 = &rx51_vmmc1, | |
ffe7f95b LL |
716 | .vsim = &rx51_vsim, |
717 | .vdac = &rx51_vdac, | |
4cfcaef1 | 718 | .vio = &rx51_vio, |
ffe7f95b LL |
719 | }; |
720 | ||
721 | static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_1[] = { | |
722 | { | |
723 | I2C_BOARD_INFO("twl5030", 0x48), | |
724 | .flags = I2C_CLIENT_WAKE, | |
725 | .irq = INT_34XX_SYS_NIRQ, | |
726 | .platform_data = &rx51_twldata, | |
727 | }, | |
728 | }; | |
729 | ||
dabe929b JN |
730 | static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_2[] = { |
731 | { | |
732 | I2C_BOARD_INFO("tlv320aic3x", 0x18), | |
733 | }, | |
734 | }; | |
735 | ||
ffe7f95b LL |
736 | static int __init rx51_i2c_init(void) |
737 | { | |
f52eeee8 | 738 | if ((system_rev >= SYSTEM_REV_S_USES_VAUX3 && system_rev < 0x100) || |
4cfcaef1 | 739 | system_rev >= SYSTEM_REV_B_USES_VAUX3) { |
f52eeee8 | 740 | rx51_twldata.vaux3 = &rx51_vaux3_mmc; |
4cfcaef1 JN |
741 | /* Only older boards use VMMC2 for internal MMC */ |
742 | rx51_vmmc2.num_consumer_supplies--; | |
743 | } else { | |
f52eeee8 | 744 | rx51_twldata.vaux3 = &rx51_vaux3_cam; |
f52eeee8 | 745 | } |
4cfcaef1 | 746 | rx51_twldata.vmmc2 = &rx51_vmmc2; |
cb3cc45a | 747 | omap_register_i2c_bus(1, 2200, rx51_peripherals_i2c_board_info_1, |
dabe929b JN |
748 | ARRAY_SIZE(rx51_peripherals_i2c_board_info_1)); |
749 | omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2, | |
750 | ARRAY_SIZE(rx51_peripherals_i2c_board_info_2)); | |
ffe7f95b LL |
751 | omap_register_i2c_bus(3, 400, NULL, 0); |
752 | return 0; | |
753 | } | |
754 | ||
aa62e90f JY |
755 | #if defined(CONFIG_MTD_ONENAND_OMAP2) || \ |
756 | defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) | |
757 | ||
758 | static struct mtd_partition onenand_partitions[] = { | |
759 | { | |
760 | .name = "bootloader", | |
761 | .offset = 0, | |
762 | .size = 0x20000, | |
763 | .mask_flags = MTD_WRITEABLE, /* Force read-only */ | |
764 | }, | |
765 | { | |
766 | .name = "config", | |
767 | .offset = MTDPART_OFS_APPEND, | |
768 | .size = 0x60000, | |
769 | }, | |
770 | { | |
771 | .name = "log", | |
772 | .offset = MTDPART_OFS_APPEND, | |
773 | .size = 0x40000, | |
774 | }, | |
775 | { | |
776 | .name = "kernel", | |
777 | .offset = MTDPART_OFS_APPEND, | |
778 | .size = 0x200000, | |
779 | }, | |
780 | { | |
781 | .name = "initfs", | |
782 | .offset = MTDPART_OFS_APPEND, | |
783 | .size = 0x200000, | |
784 | }, | |
785 | { | |
786 | .name = "rootfs", | |
787 | .offset = MTDPART_OFS_APPEND, | |
788 | .size = MTDPART_SIZ_FULL, | |
789 | }, | |
790 | }; | |
791 | ||
792 | static struct omap_onenand_platform_data board_onenand_data = { | |
793 | .cs = 0, | |
794 | .gpio_irq = 65, | |
795 | .parts = onenand_partitions, | |
796 | .nr_parts = ARRAY_SIZE(onenand_partitions), | |
c8e6488f | 797 | .flags = ONENAND_SYNC_READWRITE, |
aa62e90f JY |
798 | }; |
799 | ||
800 | static void __init board_onenand_init(void) | |
801 | { | |
802 | gpmc_onenand_init(&board_onenand_data); | |
803 | } | |
804 | ||
805 | #else | |
806 | ||
807 | static inline void board_onenand_init(void) | |
808 | { | |
809 | } | |
810 | ||
811 | #endif | |
ffe7f95b | 812 | |
1a48e157 TL |
813 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) |
814 | ||
815 | static struct omap_smc91x_platform_data board_smc91x_data = { | |
816 | .cs = 1, | |
817 | .gpio_irq = 54, | |
818 | .gpio_pwrdwn = 86, | |
819 | .gpio_reset = 164, | |
820 | .flags = GPMC_TIMINGS_SMC91C96 | IORESOURCE_IRQ_HIGHLEVEL, | |
821 | }; | |
822 | ||
823 | static void __init board_smc91x_init(void) | |
824 | { | |
4896e394 TL |
825 | omap_mux_init_gpio(54, OMAP_PIN_INPUT_PULLDOWN); |
826 | omap_mux_init_gpio(86, OMAP_PIN_OUTPUT); | |
827 | omap_mux_init_gpio(164, OMAP_PIN_OUTPUT); | |
1a48e157 TL |
828 | |
829 | gpmc_smc91x_init(&board_smc91x_data); | |
830 | } | |
831 | ||
832 | #else | |
833 | ||
834 | static inline void board_smc91x_init(void) | |
835 | { | |
836 | } | |
837 | ||
838 | #endif | |
839 | ||
a24e61a9 KV |
840 | static void rx51_wl1251_set_power(bool enable) |
841 | { | |
842 | gpio_set_value(RX51_WL1251_POWER_GPIO, enable); | |
843 | } | |
844 | ||
845 | static void __init rx51_init_wl1251(void) | |
846 | { | |
847 | int irq, ret; | |
848 | ||
849 | ret = gpio_request(RX51_WL1251_POWER_GPIO, "wl1251 power"); | |
850 | if (ret < 0) | |
851 | goto error; | |
852 | ||
853 | ret = gpio_direction_output(RX51_WL1251_POWER_GPIO, 0); | |
854 | if (ret < 0) | |
855 | goto err_power; | |
856 | ||
857 | ret = gpio_request(RX51_WL1251_IRQ_GPIO, "wl1251 irq"); | |
858 | if (ret < 0) | |
859 | goto err_power; | |
860 | ||
861 | ret = gpio_direction_input(RX51_WL1251_IRQ_GPIO); | |
862 | if (ret < 0) | |
863 | goto err_irq; | |
864 | ||
865 | irq = gpio_to_irq(RX51_WL1251_IRQ_GPIO); | |
866 | if (irq < 0) | |
867 | goto err_irq; | |
868 | ||
869 | wl1251_pdata.set_power = rx51_wl1251_set_power; | |
870 | rx51_peripherals_spi_board_info[RX51_SPI_WL1251].irq = irq; | |
871 | ||
872 | return; | |
873 | ||
874 | err_irq: | |
875 | gpio_free(RX51_WL1251_IRQ_GPIO); | |
876 | ||
877 | err_power: | |
878 | gpio_free(RX51_WL1251_POWER_GPIO); | |
879 | ||
880 | error: | |
881 | printk(KERN_ERR "wl1251 board initialisation failed\n"); | |
882 | wl1251_pdata.set_power = NULL; | |
883 | ||
884 | /* | |
885 | * Now rx51_peripherals_spi_board_info[1].irq is zero and | |
886 | * set_power is null, and wl1251_probe() will fail. | |
887 | */ | |
888 | } | |
889 | ||
ffe7f95b LL |
890 | void __init rx51_peripherals_init(void) |
891 | { | |
ffe7f95b | 892 | rx51_i2c_init(); |
aa62e90f | 893 | board_onenand_init(); |
1a48e157 | 894 | board_smc91x_init(); |
f014ee32 | 895 | rx51_add_gpio_keys(); |
a24e61a9 KV |
896 | rx51_init_wl1251(); |
897 | spi_register_board_info(rx51_peripherals_spi_board_info, | |
898 | ARRAY_SIZE(rx51_peripherals_spi_board_info)); | |
68ff0423 | 899 | omap2_hsmmc_init(mmc); |
ffe7f95b LL |
900 | } |
901 |