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ARM: OMAP3: MUSB initialization for omap hw, v2
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1/*
2 * linux/arch/arm/mach-omap2/board-2430sdp.c
3 *
4 * Copyright (C) 2006 Texas Instruments
5 *
6 * Modified from mach-omap2/board-generic.c
7 *
8 * Initial Code : Based on a patch from Komal Shah and Richard Woodruff
9 * Updated the Code for 2430 SDP : Syed Mohammed Khasim
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/platform_device.h>
19#include <linux/mtd/mtd.h>
20#include <linux/mtd/partitions.h>
21#include <linux/delay.h>
90c62bf0 22#include <linux/i2c/twl4030.h>
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23#include <linux/err.h>
24#include <linux/clk.h>
fced80c7 25#include <linux/io.h>
72d0f1c3 26
a09e64fb 27#include <mach/hardware.h>
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28#include <asm/mach-types.h>
29#include <asm/mach/arch.h>
30#include <asm/mach/map.h>
31#include <asm/mach/flash.h>
32
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33#include <mach/gpio.h>
34#include <mach/mux.h>
35#include <mach/board.h>
36#include <mach/common.h>
37#include <mach/gpmc.h>
18cb7aca 38#include <mach/usb.h>
72d0f1c3 39
90c62bf0 40#include "mmc-twl4030.h"
72d0f1c3 41
a362fdbd 42#define SDP2430_CS0_BASE 0x04000000
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43#define SDP2430_FLASH_CS 0
44#define SDP2430_SMC91X_CS 5
45
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46#define SDP2430_ETHR_GPIO_IRQ 149
47
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48static struct mtd_partition sdp2430_partitions[] = {
49 /* bootloader (U-Boot, etc) in first sector */
50 {
51 .name = "bootloader",
52 .offset = 0,
53 .size = SZ_256K,
54 .mask_flags = MTD_WRITEABLE, /* force read-only */
55 },
56 /* bootloader params in the next sector */
57 {
58 .name = "params",
59 .offset = MTDPART_OFS_APPEND,
60 .size = SZ_128K,
61 .mask_flags = 0,
62 },
63 /* kernel */
64 {
65 .name = "kernel",
66 .offset = MTDPART_OFS_APPEND,
67 .size = SZ_2M,
68 .mask_flags = 0
69 },
70 /* file system */
71 {
72 .name = "filesystem",
73 .offset = MTDPART_OFS_APPEND,
74 .size = MTDPART_SIZ_FULL,
75 .mask_flags = 0
76 }
77};
78
79static struct flash_platform_data sdp2430_flash_data = {
80 .map_name = "cfi_probe",
81 .width = 2,
82 .parts = sdp2430_partitions,
83 .nr_parts = ARRAY_SIZE(sdp2430_partitions),
84};
85
86static struct resource sdp2430_flash_resource = {
87 .start = SDP2430_CS0_BASE,
88 .end = SDP2430_CS0_BASE + SZ_64M - 1,
89 .flags = IORESOURCE_MEM,
90};
91
92static struct platform_device sdp2430_flash_device = {
93 .name = "omapflash",
94 .id = 0,
95 .dev = {
96 .platform_data = &sdp2430_flash_data,
97 },
98 .num_resources = 1,
99 .resource = &sdp2430_flash_resource,
100};
101
102static struct resource sdp2430_smc91x_resources[] = {
103 [0] = {
104 .start = SDP2430_CS0_BASE,
105 .end = SDP2430_CS0_BASE + SZ_64M - 1,
106 .flags = IORESOURCE_MEM,
107 },
108 [1] = {
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109 .start = OMAP_GPIO_IRQ(SDP2430_ETHR_GPIO_IRQ),
110 .end = OMAP_GPIO_IRQ(SDP2430_ETHR_GPIO_IRQ),
a8149170 111 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
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112 },
113};
114
115static struct platform_device sdp2430_smc91x_device = {
116 .name = "smc91x",
117 .id = -1,
118 .num_resources = ARRAY_SIZE(sdp2430_smc91x_resources),
119 .resource = sdp2430_smc91x_resources,
120};
121
122static struct platform_device *sdp2430_devices[] __initdata = {
123 &sdp2430_smc91x_device,
124 &sdp2430_flash_device,
125};
126
127static inline void __init sdp2430_init_smc91x(void)
128{
129 int eth_cs;
130 unsigned long cs_mem_base;
131 unsigned int rate;
44595982 132 struct clk *gpmc_fck;
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133
134 eth_cs = SDP2430_SMC91X_CS;
135
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136 gpmc_fck = clk_get(NULL, "gpmc_fck"); /* Always on ENABLE_ON_INIT */
137 if (IS_ERR(gpmc_fck)) {
138 WARN_ON(1);
139 return;
140 }
141
142 clk_enable(gpmc_fck);
143 rate = clk_get_rate(gpmc_fck);
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144
145 /* Make sure CS1 timings are correct, for 2430 always muxed */
146 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG1, 0x00011200);
147
148 if (rate >= 160000000) {
149 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f01);
150 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080803);
151 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1c0b1c0a);
152 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F);
153 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000004C4);
154 } else if (rate >= 130000000) {
155 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00);
156 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802);
157 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09);
158 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F);
159 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000004C4);
160 } else { /* rate = 100000000 */
161 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00);
162 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802);
163 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09);
164 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x031A1F1F);
165 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000003C2);
166 }
167
168 if (gpmc_cs_request(eth_cs, SZ_16M, &cs_mem_base) < 0) {
169 printk(KERN_ERR "Failed to request GPMC mem for smc91x\n");
44595982 170 goto out;
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171 }
172
173 sdp2430_smc91x_resources[0].start = cs_mem_base + 0x300;
174 sdp2430_smc91x_resources[0].end = cs_mem_base + 0x30f;
175 udelay(100);
176
a362fdbd 177 if (gpio_request(SDP2430_ETHR_GPIO_IRQ, "SMC91x irq") < 0) {
72d0f1c3 178 printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n",
a362fdbd 179 SDP2430_ETHR_GPIO_IRQ);
72d0f1c3 180 gpmc_cs_free(eth_cs);
44595982 181 goto out;
72d0f1c3 182 }
a362fdbd 183 gpio_direction_input(SDP2430_ETHR_GPIO_IRQ);
72d0f1c3 184
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185out:
186 clk_disable(gpmc_fck);
187 clk_put(gpmc_fck);
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188}
189
190static void __init omap_2430sdp_init_irq(void)
191{
192 omap2_init_common_hw();
193 omap_init_irq();
194 omap_gpio_init();
195 sdp2430_init_smc91x();
196}
197
198static struct omap_uart_config sdp2430_uart_config __initdata = {
199 .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
200};
201
202static struct omap_board_config_kernel sdp2430_config[] = {
203 {OMAP_TAG_UART, &sdp2430_uart_config},
204};
205
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206
207static struct twl4030_gpio_platform_data sdp2430_gpio_data = {
208 .gpio_base = OMAP_MAX_GPIO_LINES,
209 .irq_base = TWL4030_GPIO_IRQ_BASE,
210 .irq_end = TWL4030_GPIO_IRQ_END,
211};
212
213static struct twl4030_platform_data sdp2430_twldata = {
214 .irq_base = TWL4030_IRQ_BASE,
215 .irq_end = TWL4030_IRQ_END,
216
217 /* platform_data for children goes here */
218 .gpio = &sdp2430_gpio_data,
219};
220
221static struct i2c_board_info __initdata sdp2430_i2c_boardinfo[] = {
222 {
223 I2C_BOARD_INFO("twl4030", 0x48),
224 .flags = I2C_CLIENT_WAKE,
225 .irq = INT_24XX_SYS_NIRQ,
226 .platform_data = &sdp2430_twldata,
227 },
228};
229
230static int __init omap2430_i2c_init(void)
231{
232 omap_register_i2c_bus(1, 400, NULL, 0);
233 omap_register_i2c_bus(2, 2600, sdp2430_i2c_boardinfo,
234 ARRAY_SIZE(sdp2430_i2c_boardinfo));
235 return 0;
236}
237
238static struct twl4030_hsmmc_info mmc[] __initdata = {
239 {
240 .mmc = 1,
241 .wires = 4,
242 .gpio_cd = -EINVAL,
243 .gpio_wp = -EINVAL,
244 .ext_clock = 1,
245 },
246 {} /* Terminator */
247};
248
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249static void __init omap_2430sdp_init(void)
250{
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251 omap2430_i2c_init();
252
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253 platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices));
254 omap_board_config = sdp2430_config;
255 omap_board_config_size = ARRAY_SIZE(sdp2430_config);
256 omap_serial_init();
90c62bf0 257 twl4030_mmc_init(mmc);
18cb7aca 258 usb_musb_init();
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259}
260
261static void __init omap_2430sdp_map_io(void)
262{
c8d2eb8e 263 omap2_set_globals_243x();
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264 omap2_map_common_io();
265}
266
267MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board")
268 /* Maintainer: Syed Khasim - Texas Instruments Inc */
269 .phys_io = 0x48000000,
270 .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc,
271 .boot_params = 0x80000100,
272 .map_io = omap_2430sdp_map_io,
273 .init_irq = omap_2430sdp_init_irq,
274 .init_machine = omap_2430sdp_init,
275 .timer = &omap_timer,
276MACHINE_END