[net-next-2.6.git] / arch / arm / mach-omap1 / board-perseus2.c

/*
 * linux/arch/arm/mach-omap1/board-perseus2.c
 *
 * Modified from board-generic.c
 *
 * Original OMAP730 support by Jean Pihet <j-pihet@ti.com>
 * Updated for 2.6 by Kevin Hilman <kjh@hilman.org>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/input.h>
#include <linux/smc91x.h>

#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>

#include <plat/tc.h>
#include <mach/gpio.h>
#include <plat/mux.h>
#include <plat/fpga.h>
#include <plat/flash.h>
#include <plat/keypad.h>
#include <plat/common.h>
#include <plat/board.h>

static int p2_keymap[] = {
	KEY(0,0,KEY_UP),
	KEY(0,1,KEY_RIGHT),
	KEY(0,2,KEY_LEFT),
	KEY(0,3,KEY_DOWN),
	KEY(0,4,KEY_ENTER),
	KEY(1,0,KEY_F10),
	KEY(1,1,KEY_SEND),
	KEY(1,2,KEY_END),
	KEY(1,3,KEY_VOLUMEDOWN),
	KEY(1,4,KEY_VOLUMEUP),
	KEY(1,5,KEY_RECORD),
	KEY(2,0,KEY_F9),
	KEY(2,1,KEY_3),
	KEY(2,2,KEY_6),
	KEY(2,3,KEY_9),
	KEY(2,4,KEY_KPDOT),
	KEY(3,0,KEY_BACK),
	KEY(3,1,KEY_2),
	KEY(3,2,KEY_5),
	KEY(3,3,KEY_8),
	KEY(3,4,KEY_0),
	KEY(3,5,KEY_KPSLASH),
	KEY(4,0,KEY_HOME),
	KEY(4,1,KEY_1),
	KEY(4,2,KEY_4),
	KEY(4,3,KEY_7),
	KEY(4,4,KEY_KPASTERISK),
	KEY(4,5,KEY_POWER),
	0
};

static struct smc91x_platdata smc91x_info = {
	.flags	= SMC91X_USE_16BIT | SMC91X_NOWAIT,
	.leda	= RPC_LED_100_10,
	.ledb	= RPC_LED_TX_RX,
};

static struct resource smc91x_resources[] = {
	[0] = {
		.start	= H2P2_DBG_FPGA_ETHR_START,	/* Physical */
		.end	= H2P2_DBG_FPGA_ETHR_START + 0xf,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= INT_7XX_MPU_EXT_NIRQ,
		.end	= 0,
		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
	},
};

static struct mtd_partition nor_partitions[] = {
	/* bootloader (U-Boot, etc) in first sector */
	{
	      .name		= "bootloader",
	      .offset		= 0,
	      .size		= SZ_128K,
	      .mask_flags	= MTD_WRITEABLE, /* force read-only */
	},
	/* bootloader params in the next sector */
	{
	      .name		= "params",
	      .offset		= MTDPART_OFS_APPEND,
	      .size		= SZ_128K,
	      .mask_flags	= 0,
	},
	/* kernel */
	{
	      .name		= "kernel",
	      .offset		= MTDPART_OFS_APPEND,
	      .size		= SZ_2M,
	      .mask_flags	= 0
	},
	/* rest of flash is a file system */
	{
	      .name		= "rootfs",
	      .offset		= MTDPART_OFS_APPEND,
	      .size		= MTDPART_SIZ_FULL,
	      .mask_flags	= 0
	},
};

static struct physmap_flash_data nor_data = {
	.width		= 2,
	.set_vpp	= omap1_set_vpp,
	.parts		= nor_partitions,
	.nr_parts	= ARRAY_SIZE(nor_partitions),
};

static struct resource nor_resource = {
	.start		= OMAP_CS0_PHYS,
	.end		= OMAP_CS0_PHYS + SZ_32M - 1,
	.flags		= IORESOURCE_MEM,
};

static struct platform_device nor_device = {
	.name		= "physmap-flash",
	.id		= 0,
	.dev		= {
		.platform_data	= &nor_data,
	},
	.num_resources	= 1,
	.resource	= &nor_resource,
};

static void nand_cmd_ctl(struct mtd_info *mtd, int cmd,	unsigned int ctrl)
{
	struct nand_chip *this = mtd->priv;
	unsigned long mask;

	if (cmd == NAND_CMD_NONE)
		return;

	mask = (ctrl & NAND_CLE) ? 0x02 : 0;
	if (ctrl & NAND_ALE)
		mask |= 0x04;
	writeb(cmd, (unsigned long)this->IO_ADDR_W | mask);
}

#define P2_NAND_RB_GPIO_PIN	62

static int nand_dev_ready(struct mtd_info *mtd)
{
	return gpio_get_value(P2_NAND_RB_GPIO_PIN);
}

static const char *part_probes[] = { "cmdlinepart", NULL };

static struct platform_nand_data nand_data = {
	.chip	= {
		.nr_chips		= 1,
		.chip_offset		= 0,
		.options		= NAND_SAMSUNG_LP_OPTIONS,
		.part_probe_types	= part_probes,
	},
	.ctrl	= {
		.cmd_ctrl	= nand_cmd_ctl,
		.dev_ready	= nand_dev_ready,
	},
};

static struct resource nand_resource = {
	.start		= OMAP_CS3_PHYS,
	.end		= OMAP_CS3_PHYS + SZ_4K - 1,
	.flags		= IORESOURCE_MEM,
};

static struct platform_device nand_device = {
	.name		= "gen_nand",
	.id		= 0,
	.dev		= {
		.platform_data	= &nand_data,
	},
	.num_resources	= 1,
	.resource	= &nand_resource,
};

static struct platform_device smc91x_device = {
	.name		= "smc91x",
	.id		= 0,
	.dev	= {
		.platform_data	= &smc91x_info,
	},
	.num_resources	= ARRAY_SIZE(smc91x_resources),
	.resource	= smc91x_resources,
};

static struct resource kp_resources[] = {
	[0] = {
		.start	= INT_7XX_MPUIO_KEYPAD,
		.end	= INT_7XX_MPUIO_KEYPAD,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct omap_kp_platform_data kp_data = {
	.rows		= 8,
	.cols		= 8,
	.keymap		= p2_keymap,
	.keymapsize	= ARRAY_SIZE(p2_keymap),
	.delay		= 4,
	.dbounce	= 1,
};

static struct platform_device kp_device = {
	.name		= "omap-keypad",
	.id		= -1,
	.dev		= {
		.platform_data = &kp_data,
	},
	.num_resources	= ARRAY_SIZE(kp_resources),
	.resource	= kp_resources,
};

static struct platform_device lcd_device = {
	.name		= "lcd_p2",
	.id		= -1,
};

static struct platform_device *devices[] __initdata = {
	&nor_device,
	&nand_device,
	&smc91x_device,
	&kp_device,
	&lcd_device,
};

static struct omap_lcd_config perseus2_lcd_config __initdata = {
	.ctrl_name	= "internal",
};

static struct omap_board_config_kernel perseus2_config[] __initdata = {
	{ OMAP_TAG_LCD,		&perseus2_lcd_config },
};

static void __init omap_perseus2_init(void)
{
	if (gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
		BUG();
	gpio_direction_input(P2_NAND_RB_GPIO_PIN);

	omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
	omap_cfg_reg(M8_1610_FLASH_CS2B_WE);

	/* Mux pins for keypad */
	omap_cfg_reg(E2_7XX_KBR0);
	omap_cfg_reg(J7_7XX_KBR1);
	omap_cfg_reg(E1_7XX_KBR2);
	omap_cfg_reg(F3_7XX_KBR3);
	omap_cfg_reg(D2_7XX_KBR4);
	omap_cfg_reg(C2_7XX_KBC0);
	omap_cfg_reg(D3_7XX_KBC1);
	omap_cfg_reg(E4_7XX_KBC2);
	omap_cfg_reg(F4_7XX_KBC3);
	omap_cfg_reg(E3_7XX_KBC4);

	platform_add_devices(devices, ARRAY_SIZE(devices));

	omap_board_config = perseus2_config;
	omap_board_config_size = ARRAY_SIZE(perseus2_config);
	omap_serial_init();
	omap_register_i2c_bus(1, 100, NULL, 0);
}

static void __init perseus2_init_smc91x(void)
{
	fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
	mdelay(50);
	fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1,
		   H2P2_DBG_FPGA_LAN_RESET);
	mdelay(50);
}

static void __init omap_perseus2_init_irq(void)
{
	omap1_init_common_hw();
	omap_init_irq();
	omap_gpio_init();
	perseus2_init_smc91x();
}
/* Only FPGA needs to be mapped here. All others are done with ioremap */
static struct map_desc omap_perseus2_io_desc[] __initdata = {
	{
		.virtual	= H2P2_DBG_FPGA_BASE,
		.pfn		= __phys_to_pfn(H2P2_DBG_FPGA_START),
		.length		= H2P2_DBG_FPGA_SIZE,
		.type		= MT_DEVICE
	}
};

static void __init omap_perseus2_map_io(void)
{
	omap1_map_common_io();
	iotable_init(omap_perseus2_io_desc,
		     ARRAY_SIZE(omap_perseus2_io_desc));

	/* Early, board-dependent init */

	/*
	 * Hold GSM Reset until needed
	 */
	omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL);

	/*
	 * UARTs -> done automagically by 8250 driver
	 */

	/*
	 * CSx timings, GPIO Mux ... setup
	 */

	/* Flash: CS0 timings setup */
	omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0);
	omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0);

	/*
	 * Ethernet support through the debug board
	 * CS1 timings setup
	 */
	omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1);
	omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1);

	/*
	 * Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
	 * It is used as the Ethernet controller interrupt
	 */
	omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF, OMAP7XX_IO_CONF_9);
}

MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")
	/* Maintainer: Kevin Hilman <kjh@hilman.org> */
	.phys_io	= 0xfff00000,
	.io_pg_offst	= ((0xfef00000) >> 18) & 0xfffc,
	.boot_params	= 0x10000100,
	.map_io		= omap_perseus2_map_io,
	.init_irq	= omap_perseus2_init_irq,
	.init_machine	= omap_perseus2_init,
	.timer		= &omap_timer,
MACHINE_END
Commit	Line	Data
1da177e4	1	/*
dbdf9ced	2	* linux/arch/arm/mach-omap1/board-perseus2.c
1da177e4 LT	3	*
	4	* Modified from board-generic.c
	5	*
	6	* Original OMAP730 support by Jean Pihet <j-pihet@ti.com>
	7	* Updated for 2.6 by Kevin Hilman <kjh@hilman.org>
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License version 2 as
	11	* published by the Free Software Foundation.
	12	*/
	13
	14	#include <linux/kernel.h>
	15	#include <linux/init.h>
d052d1be	16	#include <linux/platform_device.h>
1da177e4 LT	17	#include <linux/delay.h>
1da177e4 LT	18	#include <linux/mtd/mtd.h>
9b6553cd	19	#include <linux/mtd/nand.h>
1da177e4	20	#include <linux/mtd/partitions.h>
561b036a	21	#include <linux/mtd/physmap.h>
9b6553cd	22	#include <linux/input.h>
3bc48014	23	#include <linux/smc91x.h>
1da177e4	24
a09e64fb	25	#include <mach/hardware.h>
1da177e4 LT	26	#include <asm/mach-types.h>
1da177e4 LT	27	#include <asm/mach/arch.h>
1da177e4 LT	28	#include <asm/mach/map.h>
1da177e4 LT	29
ce491cf8	30	#include <plat/tc.h>
a09e64fb	31	#include <mach/gpio.h>
ce491cf8 TL	32	#include <plat/mux.h>
ce491cf8 TL	33	#include <plat/fpga.h>
561b036a	34	#include <plat/flash.h>
ce491cf8 TL	35	#include <plat/keypad.h>
	36	#include <plat/common.h>
	37	#include <plat/board.h>
1da177e4	38
9b6553cd TL	39	static int p2_keymap[] = {
	40	KEY(0,0,KEY_UP),
	41	KEY(0,1,KEY_RIGHT),
	42	KEY(0,2,KEY_LEFT),
	43	KEY(0,3,KEY_DOWN),
496bcb81 VK	44	KEY(0,4,KEY_ENTER),
496bcb81 VK	45	KEY(1,0,KEY_F10),
9b6553cd TL	46	KEY(1,1,KEY_SEND),
	47	KEY(1,2,KEY_END),
	48	KEY(1,3,KEY_VOLUMEDOWN),
	49	KEY(1,4,KEY_VOLUMEUP),
	50	KEY(1,5,KEY_RECORD),
496bcb81	51	KEY(2,0,KEY_F9),
9b6553cd TL	52	KEY(2,1,KEY_3),
	53	KEY(2,2,KEY_6),
	54	KEY(2,3,KEY_9),
496bcb81	55	KEY(2,4,KEY_KPDOT),
9b6553cd TL	56	KEY(3,0,KEY_BACK),
	57	KEY(3,1,KEY_2),
	58	KEY(3,2,KEY_5),
	59	KEY(3,3,KEY_8),
	60	KEY(3,4,KEY_0),
496bcb81	61	KEY(3,5,KEY_KPSLASH),
9b6553cd TL	62	KEY(4,0,KEY_HOME),
	63	KEY(4,1,KEY_1),
	64	KEY(4,2,KEY_4),
	65	KEY(4,3,KEY_7),
496bcb81	66	KEY(4,4,KEY_KPASTERISK),
9b6553cd TL	67	KEY(4,5,KEY_POWER),
	68	0
	69	};
	70
3bc48014 LM	71	static struct smc91x_platdata smc91x_info = {
	72	.flags = SMC91X_USE_16BIT \| SMC91X_NOWAIT,
	73	.leda = RPC_LED_100_10,
	74	.ledb = RPC_LED_TX_RX,
	75	};
	76
1da177e4 LT	77	static struct resource smc91x_resources[] = {
	78	[0] = {
	79	.start = H2P2_DBG_FPGA_ETHR_START, /* Physical */
	80	.end = H2P2_DBG_FPGA_ETHR_START + 0xf,
	81	.flags = IORESOURCE_MEM,
	82	},
	83	[1] = {
372b1c32	84	.start = INT_7XX_MPU_EXT_NIRQ,
1da177e4	85	.end = 0,
e7b3dc7e	86	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHEDGE,
1da177e4 LT	87	},
	88	};
	89
9b6553cd	90	static struct mtd_partition nor_partitions[] = {
1da177e4 LT	91	/* bootloader (U-Boot, etc) in first sector */
	92	{
	93	.name = "bootloader",
	94	.offset = 0,
	95	.size = SZ_128K,
	96	.mask_flags = MTD_WRITEABLE, /* force read-only */
	97	},
	98	/* bootloader params in the next sector */
	99	{
	100	.name = "params",
	101	.offset = MTDPART_OFS_APPEND,
	102	.size = SZ_128K,
	103	.mask_flags = 0,
	104	},
	105	/* kernel */
	106	{
	107	.name = "kernel",
	108	.offset = MTDPART_OFS_APPEND,
	109	.size = SZ_2M,
	110	.mask_flags = 0
	111	},
	112	/* rest of flash is a file system */
	113	{
	114	.name = "rootfs",
	115	.offset = MTDPART_OFS_APPEND,
	116	.size = MTDPART_SIZ_FULL,
	117	.mask_flags = 0
	118	},
	119	};
	120
561b036a	121	static struct physmap_flash_data nor_data = {
1da177e4	122	.width = 2,
561b036a	123	.set_vpp = omap1_set_vpp,
9b6553cd TL	124	.parts = nor_partitions,
9b6553cd TL	125	.nr_parts = ARRAY_SIZE(nor_partitions),
1da177e4 LT	126	};
1da177e4 LT	127
9b6553cd	128	static struct resource nor_resource = {
7c38cf02 TL	129	.start = OMAP_CS0_PHYS,
7c38cf02 TL	130	.end = OMAP_CS0_PHYS + SZ_32M - 1,
1da177e4 LT	131	.flags = IORESOURCE_MEM,
	132	};
	133
9b6553cd	134	static struct platform_device nor_device = {
561b036a	135	.name = "physmap-flash",
1da177e4 LT	136	.id = 0,
1da177e4 LT	137	.dev = {
9b6553cd TL	138	.platform_data = &nor_data,
	139	},
	140	.num_resources = 1,
	141	.resource = &nor_resource,
	142	};
	143
414f552a LM	144	static void nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
	145	{
	146	struct nand_chip *this = mtd->priv;
	147	unsigned long mask;
	148
	149	if (cmd == NAND_CMD_NONE)
	150	return;
	151
	152	mask = (ctrl & NAND_CLE) ? 0x02 : 0;
	153	if (ctrl & NAND_ALE)
	154	mask \|= 0x04;
	155	writeb(cmd, (unsigned long)this->IO_ADDR_W \| mask);
	156	}
	157
	158	#define P2_NAND_RB_GPIO_PIN 62
	159
	160	static int nand_dev_ready(struct mtd_info *mtd)
	161	{
	162	return gpio_get_value(P2_NAND_RB_GPIO_PIN);
	163	}
	164
	165	static const char *part_probes[] = { "cmdlinepart", NULL };
	166
	167	static struct platform_nand_data nand_data = {
	168	.chip = {
	169	.nr_chips = 1,
	170	.chip_offset = 0,
	171	.options = NAND_SAMSUNG_LP_OPTIONS,
	172	.part_probe_types = part_probes,
	173	},
	174	.ctrl = {
	175	.cmd_ctrl = nand_cmd_ctl,
	176	.dev_ready = nand_dev_ready,
	177	},
9b6553cd TL	178	};
	179
	180	static struct resource nand_resource = {
	181	.start = OMAP_CS3_PHYS,
	182	.end = OMAP_CS3_PHYS + SZ_4K - 1,
	183	.flags = IORESOURCE_MEM,
	184	};
	185
	186	static struct platform_device nand_device = {
414f552a	187	.name = "gen_nand",
9b6553cd TL	188	.id = 0,
	189	.dev = {
	190	.platform_data = &nand_data,
1da177e4 LT	191	},
1da177e4 LT	192	.num_resources = 1,
9b6553cd	193	.resource = &nand_resource,
1da177e4 LT	194	};
	195
	196	static struct platform_device smc91x_device = {
	197	.name = "smc91x",
	198	.id = 0,
3bc48014 LM	199	.dev = {
	200	.platform_data = &smc91x_info,
	201	},
1da177e4 LT	202	.num_resources = ARRAY_SIZE(smc91x_resources),
	203	.resource = smc91x_resources,
	204	};
	205
9b6553cd TL	206	static struct resource kp_resources[] = {
9b6553cd TL	207	[0] = {
372b1c32 AB	208	.start = INT_7XX_MPUIO_KEYPAD,
372b1c32 AB	209	.end = INT_7XX_MPUIO_KEYPAD,
9b6553cd TL	210	.flags = IORESOURCE_IRQ,
	211	},
	212	};
	213
	214	static struct omap_kp_platform_data kp_data = {
4d24607b KS	215	.rows = 8,
	216	.cols = 8,
	217	.keymap = p2_keymap,
	218	.keymapsize = ARRAY_SIZE(p2_keymap),
	219	.delay = 4,
	220	.dbounce = 1,
9b6553cd TL	221	};
	222
	223	static struct platform_device kp_device = {
	224	.name = "omap-keypad",
	225	.id = -1,
	226	.dev = {
	227	.platform_data = &kp_data,
	228	},
	229	.num_resources = ARRAY_SIZE(kp_resources),
	230	.resource = kp_resources,
	231	};
	232
	233	static struct platform_device lcd_device = {
	234	.name = "lcd_p2",
	235	.id = -1,
	236	};
	237
1da177e4	238	static struct platform_device *devices[] __initdata = {
9b6553cd TL	239	&nor_device,
9b6553cd TL	240	&nand_device,
1da177e4	241	&smc91x_device,
9b6553cd TL	242	&kp_device,
9b6553cd TL	243	&lcd_device,
1da177e4 LT	244	};
1da177e4 LT	245
3179a019	246	static struct omap_lcd_config perseus2_lcd_config __initdata = {
3179a019 TL	247	.ctrl_name = "internal",
	248	};
	249
e27a93a9	250	static struct omap_board_config_kernel perseus2_config[] __initdata = {
3179a019 TL	251	{ OMAP_TAG_LCD, &perseus2_lcd_config },
	252	};
	253
1da177e4 LT	254	static void __init omap_perseus2_init(void)
1da177e4 LT	255	{
f2d18fea JN	256	if (gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
f2d18fea JN	257	BUG();
414f552a	258	gpio_direction_input(P2_NAND_RB_GPIO_PIN);
9b6553cd TL	259
	260	omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
	261	omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
	262
93c43f25 TL	263	/* Mux pins for keypad */
	264	omap_cfg_reg(E2_7XX_KBR0);
	265	omap_cfg_reg(J7_7XX_KBR1);
	266	omap_cfg_reg(E1_7XX_KBR2);
	267	omap_cfg_reg(F3_7XX_KBR3);
	268	omap_cfg_reg(D2_7XX_KBR4);
	269	omap_cfg_reg(C2_7XX_KBC0);
	270	omap_cfg_reg(D3_7XX_KBC1);
	271	omap_cfg_reg(E4_7XX_KBC2);
	272	omap_cfg_reg(F4_7XX_KBC3);
	273	omap_cfg_reg(E3_7XX_KBC4);
	274
9b6553cd	275	platform_add_devices(devices, ARRAY_SIZE(devices));
3179a019 TL	276
	277	omap_board_config = perseus2_config;
	278	omap_board_config_size = ARRAY_SIZE(perseus2_config);
	279	omap_serial_init();
1ed16a86	280	omap_register_i2c_bus(1, 100, NULL, 0);
1da177e4 LT	281	}
	282
	283	static void __init perseus2_init_smc91x(void)
	284	{
	285	fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
	286	mdelay(50);
	287	fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1,
	288	H2P2_DBG_FPGA_LAN_RESET);
	289	mdelay(50);
	290	}
	291
277d58ef	292	static void __init omap_perseus2_init_irq(void)
1da177e4	293	{
87bd63f6	294	omap1_init_common_hw();
1da177e4 LT	295	omap_init_irq();
	296	omap_gpio_init();
	297	perseus2_init_smc91x();
	298	}
1da177e4 LT	299	/* Only FPGA needs to be mapped here. All others are done with ioremap */
1da177e4 LT	300	static struct map_desc omap_perseus2_io_desc[] __initdata = {
9fe133b1 DS	301	{
	302	.virtual = H2P2_DBG_FPGA_BASE,
	303	.pfn = __phys_to_pfn(H2P2_DBG_FPGA_START),
	304	.length = H2P2_DBG_FPGA_SIZE,
	305	.type = MT_DEVICE
	306	}
1da177e4 LT	307	};
	308
	309	static void __init omap_perseus2_map_io(void)
	310	{
87bd63f6	311	omap1_map_common_io();
1da177e4 LT	312	iotable_init(omap_perseus2_io_desc,
	313	ARRAY_SIZE(omap_perseus2_io_desc));
	314
	315	/* Early, board-dependent init */
	316
	317	/*
	318	* Hold GSM Reset until needed
	319	*/
b51988db	320	omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL);
1da177e4 LT	321
	322	/*
	323	* UARTs -> done automagically by 8250 driver
	324	*/
	325
	326	/*
	327	* CSx timings, GPIO Mux ... setup
	328	*/
	329
	330	/* Flash: CS0 timings setup */
b51988db AB	331	omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0);
b51988db AB	332	omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0);
1da177e4 LT	333
1da177e4 LT	334	/*
93b1fae4	335	* Ethernet support through the debug board
1da177e4 LT	336	* CS1 timings setup
1da177e4 LT	337	*/
b51988db AB	338	omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1);
b51988db AB	339	omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1);
1da177e4 LT	340
	341	/*
	342	* Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
	343	* It is used as the Ethernet controller interrupt
	344	*/
b51988db	345	omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF, OMAP7XX_IO_CONF_9);
1da177e4 LT	346	}
	347
	348	MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")
e9dea0c6	349	/* Maintainer: Kevin Hilman <kjh@hilman.org> */
e9dea0c6 RK	350	.phys_io = 0xfff00000,
	351	.io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
	352	.boot_params = 0x10000100,
	353	.map_io = omap_perseus2_map_io,
	354	.init_irq = omap_perseus2_init_irq,
	355	.init_machine = omap_perseus2_init,
1da177e4 LT	356	.timer = &omap_timer,
1da177e4 LT	357	MACHINE_END