[net-next-2.6.git] / arch / arm / mach-imx / mach-pcm038.c

/*
 * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 * MA 02110-1301, USA.
 */

#include <linux/i2c.h>
#include <linux/i2c/at24.h>
#include <linux/io.h>
#include <linux/mtd/plat-ram.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
#include <linux/regulator/machine.h>
#include <linux/mfd/mc13783.h>
#include <linux/spi/spi.h>
#include <linux/irq.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>

#include <mach/board-pcm038.h>
#include <mach/common.h>
#include <mach/hardware.h>
#include <mach/i2c.h>
#include <mach/iomux-mx27.h>
#include <mach/imx-uart.h>
#include <mach/mxc_nand.h>
#include <mach/spi.h>
#include <mach/mxc_ehci.h>
#include <mach/ulpi.h>

#include "devices.h"

static int pcm038_pins[] = {
	/* UART1 */
	PE12_PF_UART1_TXD,
	PE13_PF_UART1_RXD,
	PE14_PF_UART1_CTS,
	PE15_PF_UART1_RTS,
	/* UART2 */
	PE3_PF_UART2_CTS,
	PE4_PF_UART2_RTS,
	PE6_PF_UART2_TXD,
	PE7_PF_UART2_RXD,
	/* UART3 */
	PE8_PF_UART3_TXD,
	PE9_PF_UART3_RXD,
	PE10_PF_UART3_CTS,
	PE11_PF_UART3_RTS,
	/* FEC */
	PD0_AIN_FEC_TXD0,
	PD1_AIN_FEC_TXD1,
	PD2_AIN_FEC_TXD2,
	PD3_AIN_FEC_TXD3,
	PD4_AOUT_FEC_RX_ER,
	PD5_AOUT_FEC_RXD1,
	PD6_AOUT_FEC_RXD2,
	PD7_AOUT_FEC_RXD3,
	PD8_AF_FEC_MDIO,
	PD9_AIN_FEC_MDC,
	PD10_AOUT_FEC_CRS,
	PD11_AOUT_FEC_TX_CLK,
	PD12_AOUT_FEC_RXD0,
	PD13_AOUT_FEC_RX_DV,
	PD14_AOUT_FEC_RX_CLK,
	PD15_AOUT_FEC_COL,
	PD16_AIN_FEC_TX_ER,
	PF23_AIN_FEC_TX_EN,
	/* I2C2 */
	PC5_PF_I2C2_SDA,
	PC6_PF_I2C2_SCL,
	/* SPI1 */
	PD25_PF_CSPI1_RDY,
	PD29_PF_CSPI1_SCLK,
	PD30_PF_CSPI1_MISO,
	PD31_PF_CSPI1_MOSI,
	/* SSI1 */
	PC20_PF_SSI1_FS,
	PC21_PF_SSI1_RXD,
	PC22_PF_SSI1_TXD,
	PC23_PF_SSI1_CLK,
	/* SSI4 */
	PC16_PF_SSI4_FS,
	PC17_PF_SSI4_RXD,
	PC18_PF_SSI4_TXD,
	PC19_PF_SSI4_CLK,
	/* USB host */
	PA0_PF_USBH2_CLK,
	PA1_PF_USBH2_DIR,
	PA2_PF_USBH2_DATA7,
	PA3_PF_USBH2_NXT,
	PA4_PF_USBH2_STP,
	PD19_AF_USBH2_DATA4,
	PD20_AF_USBH2_DATA3,
	PD21_AF_USBH2_DATA6,
	PD22_AF_USBH2_DATA0,
	PD23_AF_USBH2_DATA2,
	PD24_AF_USBH2_DATA1,
	PD26_AF_USBH2_DATA5,
};

/*
 * Phytec's PCM038 comes with 2MiB battery buffered SRAM,
 * 16 bit width
 */

static struct platdata_mtd_ram pcm038_sram_data = {
	.bankwidth = 2,
};

static struct resource pcm038_sram_resource = {
	.start = MX27_CS1_BASE_ADDR,
	.end   = MX27_CS1_BASE_ADDR + 512 * 1024 - 1,
	.flags = IORESOURCE_MEM,
};

static struct platform_device pcm038_sram_mtd_device = {
	.name = "mtd-ram",
	.id = 0,
	.dev = {
		.platform_data = &pcm038_sram_data,
	},
	.num_resources = 1,
	.resource = &pcm038_sram_resource,
};

/*
 * Phytec's phyCORE-i.MX27 comes with 32MiB flash,
 * 16 bit width
 */
static struct physmap_flash_data pcm038_flash_data = {
	.width = 2,
};

static struct resource pcm038_flash_resource = {
	.start = 0xc0000000,
	.end   = 0xc1ffffff,
	.flags = IORESOURCE_MEM,
};

static struct platform_device pcm038_nor_mtd_device = {
	.name = "physmap-flash",
	.id = 0,
	.dev = {
		.platform_data = &pcm038_flash_data,
	},
	.num_resources = 1,
	.resource = &pcm038_flash_resource,
};

static struct imxuart_platform_data uart_pdata[] = {
	{
		.flags = IMXUART_HAVE_RTSCTS,
	}, {
		.flags = IMXUART_HAVE_RTSCTS,
	}, {
		.flags = IMXUART_HAVE_RTSCTS,
	},
};

static struct mxc_nand_platform_data pcm038_nand_board_info = {
	.width = 1,
	.hw_ecc = 1,
};

static struct platform_device *platform_devices[] __initdata = {
	&pcm038_nor_mtd_device,
	&mxc_w1_master_device,
	&mxc_fec_device,
	&pcm038_sram_mtd_device,
	&mxc_wdt,
};

/* On pcm038 there's a sram attached to CS1, we enable the chipselect here and
 * setup other stuffs to access the sram. */
static void __init pcm038_init_sram(void)
{
	mx27_setup_weimcs(1, 0x0000d843, 0x22252521, 0x22220a00);
}

static struct imxi2c_platform_data pcm038_i2c_1_data = {
	.bitrate = 100000,
};

static struct at24_platform_data board_eeprom = {
	.byte_len = 4096,
	.page_size = 32,
	.flags = AT24_FLAG_ADDR16,
};

static struct i2c_board_info pcm038_i2c_devices[] = {
	{
		I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
		.platform_data = &board_eeprom,
	}, {
		I2C_BOARD_INFO("pcf8563", 0x51),
	}, {
		I2C_BOARD_INFO("lm75", 0x4a),
	}
};

static int pcm038_spi_cs[] = {GPIO_PORTD + 28};

static struct spi_imx_master pcm038_spi_0_data = {
	.chipselect = pcm038_spi_cs,
	.num_chipselect = ARRAY_SIZE(pcm038_spi_cs),
};

static struct regulator_consumer_supply sdhc1_consumers[] = {
	{
		.dev	= &mxc_sdhc_device1.dev,
		.supply	= "sdhc_vcc",
	},
};

static struct regulator_init_data sdhc1_data = {
	.constraints = {
		.min_uV = 3000000,
		.max_uV = 3400000,
		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
			REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS,
		.valid_modes_mask = REGULATOR_MODE_NORMAL |
			REGULATOR_MODE_FAST,
		.always_on = 0,
		.boot_on = 0,
	},
	.num_consumer_supplies = ARRAY_SIZE(sdhc1_consumers),
	.consumer_supplies = sdhc1_consumers,
};

static struct regulator_consumer_supply cam_consumers[] = {
	{
		.dev	= NULL,
		.supply	= "imx_cam_vcc",
	},
};

static struct regulator_init_data cam_data = {
	.constraints = {
		.min_uV = 3000000,
		.max_uV = 3400000,
		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
			REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS,
		.valid_modes_mask = REGULATOR_MODE_NORMAL |
			REGULATOR_MODE_FAST,
		.always_on = 0,
		.boot_on = 0,
	},
	.num_consumer_supplies = ARRAY_SIZE(cam_consumers),
	.consumer_supplies = cam_consumers,
};

struct mc13783_regulator_init_data pcm038_regulators[] = {
	{
		.id = MC13783_REGU_VCAM,
		.init_data = &cam_data,
	}, {
		.id = MC13783_REGU_VMMC1,
		.init_data = &sdhc1_data,
	},
};

static struct mc13783_platform_data pcm038_pmic = {
	.regulators = pcm038_regulators,
	.num_regulators = ARRAY_SIZE(pcm038_regulators),
	.flags = MC13783_USE_ADC | MC13783_USE_REGULATOR |
		 MC13783_USE_TOUCHSCREEN,
};

static struct spi_board_info pcm038_spi_board_info[] __initdata = {
	{
		.modalias = "mc13783",
		.irq = IRQ_GPIOB(23),
		.max_speed_hz = 300000,
		.bus_num = 0,
		.chip_select = 0,
		.platform_data = &pcm038_pmic,
		.mode = SPI_CS_HIGH,
	}
};

static struct mxc_usbh_platform_data usbh2_pdata = {
	.portsc	= MXC_EHCI_MODE_ULPI,
	.flags	= MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_DIFF_UNI,
};

static void __init pcm038_init(void)
{
	mxc_gpio_setup_multiple_pins(pcm038_pins, ARRAY_SIZE(pcm038_pins),
			"PCM038");

	pcm038_init_sram();

	mxc_register_device(&imx2x_uart_device0, &uart_pdata[0]);
	mxc_register_device(&imx2x_uart_device1, &uart_pdata[1]);
	mxc_register_device(&imx2x_uart_device2, &uart_pdata[2]);

	mxc_gpio_mode(PE16_AF_OWIRE);
	mxc_register_device(&imx27_nand_device, &pcm038_nand_board_info);

	/* only the i2c master 1 is used on this CPU card */
	i2c_register_board_info(1, pcm038_i2c_devices,
				ARRAY_SIZE(pcm038_i2c_devices));

	mxc_register_device(&mxc_i2c_device1, &pcm038_i2c_1_data);

	/* PE18 for user-LED D40 */
	mxc_gpio_mode(GPIO_PORTE | 18 | GPIO_GPIO | GPIO_OUT);

	mxc_gpio_mode(GPIO_PORTD | 28 | GPIO_GPIO | GPIO_OUT);

	/* MC13783 IRQ */
	mxc_gpio_mode(GPIO_PORTB | 23 | GPIO_GPIO | GPIO_IN);

	mxc_register_device(&mxc_spi_device0, &pcm038_spi_0_data);
	spi_register_board_info(pcm038_spi_board_info,
				ARRAY_SIZE(pcm038_spi_board_info));

	mxc_register_device(&mxc_usbh2, &usbh2_pdata);

	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));

#ifdef CONFIG_MACH_PCM970_BASEBOARD
	pcm970_baseboard_init();
#endif
}

static void __init pcm038_timer_init(void)
{
	mx27_clocks_init(26000000);
}

static struct sys_timer pcm038_timer = {
	.init = pcm038_timer_init,
};

MACHINE_START(PCM038, "phyCORE-i.MX27")
	.phys_io        = MX27_AIPI_BASE_ADDR,
	.io_pg_offst    = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
	.boot_params    = MX27_PHYS_OFFSET + 0x100,
	.map_io         = mx27_map_io,
	.init_irq       = mx27_init_irq,
	.init_machine   = pcm038_init,
	.timer          = &pcm038_timer,
MACHINE_END
Commit	Line	Data
7e5e9f54 JB	1	/*
	2	* Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
	3	* Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
	4	*
	5	* This program is free software; you can redistribute it and/or
	6	* modify it under the terms of the GNU General Public License
	7	* as published by the Free Software Foundation; either version 2
	8	* of the License, or (at your option) any later version.
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	* GNU General Public License for more details.
	13	*
	14	* You should have received a copy of the GNU General Public License
	15	* along with this program; if not, write to the Free Software
	16	* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
	17	* MA 02110-1301, USA.
	18	*/
	19
a4e9a65a SH	20	#include <linux/i2c.h>
a4e9a65a SH	21	#include <linux/i2c/at24.h>
bff0b53b SH	22	#include <linux/io.h>
	23	#include <linux/mtd/plat-ram.h>
	24	#include <linux/mtd/physmap.h>
	25	#include <linux/platform_device.h>
61533841 SH	26	#include <linux/regulator/machine.h>
	27	#include <linux/mfd/mc13783.h>
	28	#include <linux/spi/spi.h>
	29	#include <linux/irq.h>
a4e9a65a	30
7e5e9f54	31	#include <asm/mach-types.h>
bff0b53b SH	32	#include <asm/mach/arch.h>
	33	#include <asm/mach/time.h>
	34
	35	#include <mach/board-pcm038.h>
a09e64fb RK	36	#include <mach/common.h>
a09e64fb RK	37	#include <mach/hardware.h>
a4e9a65a	38	#include <mach/i2c.h>
e835d88e	39	#include <mach/iomux-mx27.h>
a09e64fb	40	#include <mach/imx-uart.h>
01f71a37	41	#include <mach/mxc_nand.h>
61533841	42	#include <mach/spi.h>
773f206b SH	43	#include <mach/mxc_ehci.h>
773f206b SH	44	#include <mach/ulpi.h>
7e5e9f54	45
7e90534a SH	46	#include "devices.h"
7e90534a SH	47
f231ea44 SH	48	static int pcm038_pins[] = {
	49	/* UART1 */
	50	PE12_PF_UART1_TXD,
	51	PE13_PF_UART1_RXD,
	52	PE14_PF_UART1_CTS,
	53	PE15_PF_UART1_RTS,
	54	/* UART2 */
	55	PE3_PF_UART2_CTS,
	56	PE4_PF_UART2_RTS,
	57	PE6_PF_UART2_TXD,
	58	PE7_PF_UART2_RXD,
	59	/* UART3 */
	60	PE8_PF_UART3_TXD,
	61	PE9_PF_UART3_RXD,
	62	PE10_PF_UART3_CTS,
	63	PE11_PF_UART3_RTS,
	64	/* FEC */
	65	PD0_AIN_FEC_TXD0,
	66	PD1_AIN_FEC_TXD1,
	67	PD2_AIN_FEC_TXD2,
	68	PD3_AIN_FEC_TXD3,
	69	PD4_AOUT_FEC_RX_ER,
	70	PD5_AOUT_FEC_RXD1,
	71	PD6_AOUT_FEC_RXD2,
	72	PD7_AOUT_FEC_RXD3,
	73	PD8_AF_FEC_MDIO,
	74	PD9_AIN_FEC_MDC,
	75	PD10_AOUT_FEC_CRS,
	76	PD11_AOUT_FEC_TX_CLK,
	77	PD12_AOUT_FEC_RXD0,
	78	PD13_AOUT_FEC_RX_DV,
	79	PD14_AOUT_FEC_RX_CLK,
	80	PD15_AOUT_FEC_COL,
	81	PD16_AIN_FEC_TX_ER,
	82	PF23_AIN_FEC_TX_EN,
	83	/* I2C2 */
	84	PC5_PF_I2C2_SDA,
	85	PC6_PF_I2C2_SCL,
	86	/* SPI1 */
	87	PD25_PF_CSPI1_RDY,
f231ea44 SH	88	PD29_PF_CSPI1_SCLK,
	89	PD30_PF_CSPI1_MISO,
	90	PD31_PF_CSPI1_MOSI,
	91	/* SSI1 */
	92	PC20_PF_SSI1_FS,
	93	PC21_PF_SSI1_RXD,
	94	PC22_PF_SSI1_TXD,
	95	PC23_PF_SSI1_CLK,
	96	/* SSI4 */
	97	PC16_PF_SSI4_FS,
	98	PC17_PF_SSI4_RXD,
	99	PC18_PF_SSI4_TXD,
	100	PC19_PF_SSI4_CLK,
773f206b SH	101	/* USB host */
	102	PA0_PF_USBH2_CLK,
	103	PA1_PF_USBH2_DIR,
	104	PA2_PF_USBH2_DATA7,
	105	PA3_PF_USBH2_NXT,
	106	PA4_PF_USBH2_STP,
	107	PD19_AF_USBH2_DATA4,
	108	PD20_AF_USBH2_DATA3,
	109	PD21_AF_USBH2_DATA6,
	110	PD22_AF_USBH2_DATA0,
	111	PD23_AF_USBH2_DATA2,
	112	PD24_AF_USBH2_DATA1,
	113	PD26_AF_USBH2_DATA5,
f231ea44 SH	114	};
f231ea44 SH	115
3620c0dc SH	116	/*
	117	* Phytec's PCM038 comes with 2MiB battery buffered SRAM,
	118	* 16 bit width
	119	*/
	120
	121	static struct platdata_mtd_ram pcm038_sram_data = {
	122	.bankwidth = 2,
	123	};
	124
	125	static struct resource pcm038_sram_resource = {
3f35d1f5 UKK	126	.start = MX27_CS1_BASE_ADDR,
3f35d1f5 UKK	127	.end = MX27_CS1_BASE_ADDR + 512 * 1024 - 1,
3620c0dc SH	128	.flags = IORESOURCE_MEM,
	129	};
	130
	131	static struct platform_device pcm038_sram_mtd_device = {
	132	.name = "mtd-ram",
	133	.id = 0,
	134	.dev = {
	135	.platform_data = &pcm038_sram_data,
	136	},
	137	.num_resources = 1,
	138	.resource = &pcm038_sram_resource,
	139	};
	140
7e5e9f54 JB	141	/*
	142	* Phytec's phyCORE-i.MX27 comes with 32MiB flash,
	143	* 16 bit width
	144	*/
	145	static struct physmap_flash_data pcm038_flash_data = {
	146	.width = 2,
	147	};
	148
	149	static struct resource pcm038_flash_resource = {
	150	.start = 0xc0000000,
	151	.end = 0xc1ffffff,
	152	.flags = IORESOURCE_MEM,
	153	};
	154
	155	static struct platform_device pcm038_nor_mtd_device = {
	156	.name = "physmap-flash",
	157	.id = 0,
	158	.dev = {
	159	.platform_data = &pcm038_flash_data,
	160	},
	161	.num_resources = 1,
	162	.resource = &pcm038_flash_resource,
	163	};
	164
7e5e9f54 JB	165	static struct imxuart_platform_data uart_pdata[] = {
7e5e9f54 JB	166	{
7e5e9f54 JB	167	.flags = IMXUART_HAVE_RTSCTS,
7e5e9f54 JB	168	}, {
7e5e9f54 JB	169	.flags = IMXUART_HAVE_RTSCTS,
7e5e9f54 JB	170	}, {
7e5e9f54 JB	171	.flags = IMXUART_HAVE_RTSCTS,
	172	},
	173	};
	174
01f71a37 SH	175	static struct mxc_nand_platform_data pcm038_nand_board_info = {
	176	.width = 1,
	177	.hw_ecc = 1,
	178	};
	179
7e5e9f54 JB	180	static struct platform_device *platform_devices[] __initdata = {
7e5e9f54 JB	181	&pcm038_nor_mtd_device,
d40a0992	182	&mxc_w1_master_device,
879fea1b	183	&mxc_fec_device,
3620c0dc	184	&pcm038_sram_mtd_device,
f13899da	185	&mxc_wdt,
7e5e9f54 JB	186	};
7e5e9f54 JB	187
3620c0dc SH	188	/* On pcm038 there's a sram attached to CS1, we enable the chipselect here and
	189	* setup other stuffs to access the sram. */
	190	static void __init pcm038_init_sram(void)
	191	{
a8dfb646	192	mx27_setup_weimcs(1, 0x0000d843, 0x22252521, 0x22220a00);
3620c0dc SH	193	}
3620c0dc SH	194
a4e9a65a SH	195	static struct imxi2c_platform_data pcm038_i2c_1_data = {
a4e9a65a SH	196	.bitrate = 100000,
a4e9a65a SH	197	};
	198
	199	static struct at24_platform_data board_eeprom = {
	200	.byte_len = 4096,
	201	.page_size = 32,
	202	.flags = AT24_FLAG_ADDR16,
	203	};
	204
	205	static struct i2c_board_info pcm038_i2c_devices[] = {
cf87a6e2	206	{
a4e9a65a SH	207	I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
a4e9a65a SH	208	.platform_data = &board_eeprom,
cf87a6e2 SH	209	}, {
	210	I2C_BOARD_INFO("pcf8563", 0x51),
	211	}, {
a4e9a65a	212	I2C_BOARD_INFO("lm75", 0x4a),
a4e9a65a SH	213	}
a4e9a65a SH	214	};
a4e9a65a	215
61533841 SH	216	static int pcm038_spi_cs[] = {GPIO_PORTD + 28};
	217
	218	static struct spi_imx_master pcm038_spi_0_data = {
	219	.chipselect = pcm038_spi_cs,
	220	.num_chipselect = ARRAY_SIZE(pcm038_spi_cs),
	221	};
	222
	223	static struct regulator_consumer_supply sdhc1_consumers[] = {
	224	{
	225	.dev = &mxc_sdhc_device1.dev,
	226	.supply = "sdhc_vcc",
	227	},
	228	};
	229
	230	static struct regulator_init_data sdhc1_data = {
	231	.constraints = {
	232	.min_uV = 3000000,
	233	.max_uV = 3400000,
	234	.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE \|
	235	REGULATOR_CHANGE_MODE \| REGULATOR_CHANGE_STATUS,
	236	.valid_modes_mask = REGULATOR_MODE_NORMAL \|
	237	REGULATOR_MODE_FAST,
	238	.always_on = 0,
	239	.boot_on = 0,
	240	},
	241	.num_consumer_supplies = ARRAY_SIZE(sdhc1_consumers),
	242	.consumer_supplies = sdhc1_consumers,
	243	};
	244
	245	static struct regulator_consumer_supply cam_consumers[] = {
	246	{
	247	.dev = NULL,
	248	.supply = "imx_cam_vcc",
	249	},
	250	};
	251
	252	static struct regulator_init_data cam_data = {
	253	.constraints = {
	254	.min_uV = 3000000,
	255	.max_uV = 3400000,
	256	.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE \|
	257	REGULATOR_CHANGE_MODE \| REGULATOR_CHANGE_STATUS,
	258	.valid_modes_mask = REGULATOR_MODE_NORMAL \|
	259	REGULATOR_MODE_FAST,
	260	.always_on = 0,
	261	.boot_on = 0,
	262	},
	263	.num_consumer_supplies = ARRAY_SIZE(cam_consumers),
	264	.consumer_supplies = cam_consumers,
	265	};
	266
	267	struct mc13783_regulator_init_data pcm038_regulators[] = {
	268	{
	269	.id = MC13783_REGU_VCAM,
	270	.init_data = &cam_data,
	271	}, {
	272	.id = MC13783_REGU_VMMC1,
	273	.init_data = &sdhc1_data,
	274	},
	275	};
	276
	277	static struct mc13783_platform_data pcm038_pmic = {
	278	.regulators = pcm038_regulators,
	279	.num_regulators = ARRAY_SIZE(pcm038_regulators),
280	.flags = MC13783_USE_ADC \| MC13783_USE_REGULATOR \|
281	MC13783_USE_TOUCHSCREEN,
282	};
283
284	static struct spi_board_info pcm038_spi_board_info[] __initdata = {
285	{
286	.modalias = "mc13783",
287	.irq = IRQ_GPIOB(23),
288	.max_speed_hz = 300000,
289	.bus_num = 0,
290	.chip_select = 0,
291	.platform_data = &pcm038_pmic,
292	.mode = SPI_CS_HIGH,
293	}
294	};
295
773f206b SH	296	static struct mxc_usbh_platform_data usbh2_pdata = {
	297	.portsc = MXC_EHCI_MODE_ULPI,
	298	.flags = MXC_EHCI_POWER_PINS_ENABLED \| MXC_EHCI_INTERFACE_DIFF_UNI,
	299	};
	300
7e5e9f54 JB	301	static void __init pcm038_init(void)
7e5e9f54 JB	302	{
f231ea44 SH	303	mxc_gpio_setup_multiple_pins(pcm038_pins, ARRAY_SIZE(pcm038_pins),
	304	"PCM038");
	305
3620c0dc	306	pcm038_init_sram();
7e5e9f54	307
551823e7 UKK	308	mxc_register_device(&imx2x_uart_device0, &uart_pdata[0]);
	309	mxc_register_device(&imx2x_uart_device1, &uart_pdata[1]);
	310	mxc_register_device(&imx2x_uart_device2, &uart_pdata[2]);
01f71a37	311
ccfe30a7	312	mxc_gpio_mode(PE16_AF_OWIRE);
3636a145	313	mxc_register_device(&imx27_nand_device, &pcm038_nand_board_info);
7e5e9f54	314
a4e9a65a SH	315	/* only the i2c master 1 is used on this CPU card */
	316	i2c_register_board_info(1, pcm038_i2c_devices,
	317	ARRAY_SIZE(pcm038_i2c_devices));
	318
	319	mxc_register_device(&mxc_i2c_device1, &pcm038_i2c_1_data);
a4e9a65a	320
0160651a LF	321	/* PE18 for user-LED D40 */
	322	mxc_gpio_mode(GPIO_PORTE \| 18 \| GPIO_GPIO \| GPIO_OUT);
	323
61533841 SH	324	mxc_gpio_mode(GPIO_PORTD \| 28 \| GPIO_GPIO \| GPIO_OUT);
	325
	326	/* MC13783 IRQ */
	327	mxc_gpio_mode(GPIO_PORTB \| 23 \| GPIO_GPIO \| GPIO_IN);
	328
	329	mxc_register_device(&mxc_spi_device0, &pcm038_spi_0_data);
	330	spi_register_board_info(pcm038_spi_board_info,
	331	ARRAY_SIZE(pcm038_spi_board_info));
	332
773f206b SH	333	mxc_register_device(&mxc_usbh2, &usbh2_pdata);
773f206b SH	334
7e5e9f54	335	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
ff6552e4 JB	336
	337	#ifdef CONFIG_MACH_PCM970_BASEBOARD
	338	pcm970_baseboard_init();
	339	#endif
7e5e9f54 JB	340	}
	341
	342	static void __init pcm038_timer_init(void)
	343	{
30c730f8	344	mx27_clocks_init(26000000);
7e5e9f54 JB	345	}
7e5e9f54 JB	346
058b7a6f	347	static struct sys_timer pcm038_timer = {
7e5e9f54 JB	348	.init = pcm038_timer_init,
	349	};
	350
	351	MACHINE_START(PCM038, "phyCORE-i.MX27")
3f35d1f5 UKK	352	.phys_io = MX27_AIPI_BASE_ADDR,
3f35d1f5 UKK	353	.io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
34101237	354	.boot_params = MX27_PHYS_OFFSET + 0x100,
cd4a05f9	355	.map_io = mx27_map_io,
c5aa0ad0	356	.init_irq = mx27_init_irq,
7e5e9f54 JB	357	.init_machine = pcm038_init,
	358	.timer = &pcm038_timer,
	359	MACHINE_END