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davinci: DA850/OMAP-L138: add frequency scaling support
[net-next-2.6.git] / arch / arm / mach-davinci / include / mach / da8xx.h
CommitLineData
55c79a40
MG		 1/*
2 * Chip specific defines for DA8XX/OMAP L1XX SoC
3 *
4 * Author: Mark A. Greer <mgreer@mvista.com>
5 *
6 * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 */
11#ifndef __ASM_ARCH_DAVINCI_DA8XX_H
12#define __ASM_ARCH_DAVINCI_DA8XX_H
13
b9e6342b
MG		 14#include <video/da8xx-fb.h>
15
55c79a40
MG		 16#include <mach/serial.h>
17#include <mach/edma.h>
18#include <mach/i2c.h>
19#include <mach/emac.h>
e33ef5e3 20#include <mach/asp.h>
700691f2 21#include <mach/mmc.h>
e5d3d252 22#include <mach/usb.h>
55c79a40 23
6a28adef
SN		 24extern void __iomem *da8xx_syscfg_base;
25
55c79a40
MG		 26/*
27 * The cp_intc interrupt controller for the da8xx isn't in the same
28 * chunk of physical memory space as the other registers (like it is
29 * on the davincis) so it needs to be mapped separately. It will be
30 * mapped early on when the I/O space is mapped and we'll put it just
31 * before the I/O space in the processor's virtual memory space.
32 */
33#define DA8XX_CP_INTC_BASE 0xfffee000
34#define DA8XX_CP_INTC_SIZE SZ_8K
35#define DA8XX_CP_INTC_VIRT (IO_VIRT - DA8XX_CP_INTC_SIZE - SZ_4K)
36
3c60a66d 37#define DA8XX_SYSCFG_BASE (IO_PHYS + 0x14000)
6a28adef 38#define DA8XX_SYSCFG_VIRT(x) (da8xx_syscfg_base + (x))
cd874448 39#define DA8XX_JTAG_ID_REG 0x18
683b1e1f 40#define DA8XX_CFGCHIP0_REG 0x17c
371b53e0 41#define DA8XX_CFGCHIP2_REG 0x184
5d36a332 42#define DA8XX_CFGCHIP3_REG 0x188
55c79a40 43
bea238f6
RS		 44#define DA8XX_PSC0_BASE 0x01c10000
45#define DA8XX_PLL0_BASE 0x01c11000
bea238f6
RS		 46#define DA8XX_TIMER64P0_BASE 0x01c20000
47#define DA8XX_TIMER64P1_BASE 0x01c21000
48#define DA8XX_GPIO_BASE 0x01e26000
49#define DA8XX_PSC1_BASE 0x01e27000
5cbdf276 50#define DA8XX_LCD_CNTRL_BASE 0x01e13000
700691f2 51#define DA8XX_MMCSD0_BASE 0x01c40000
7c5ec609 52#define DA8XX_AEMIF_CS2_BASE 0x60000000
38beb929
SR		 53#define DA8XX_AEMIF_CS3_BASE 0x62000000
54#define DA8XX_AEMIF_CTL_BASE 0x68000000
bea238f6 55
c96b56c5
SR		 56#define PINMUX0 0x00
57#define PINMUX1 0x04
58#define PINMUX2 0x08
59#define PINMUX3 0x0c
60#define PINMUX4 0x10
61#define PINMUX5 0x14
62#define PINMUX6 0x18
63#define PINMUX7 0x1c
64#define PINMUX8 0x20
65#define PINMUX9 0x24
66#define PINMUX10 0x28
67#define PINMUX11 0x2c
68#define PINMUX12 0x30
69#define PINMUX13 0x34
70#define PINMUX14 0x38
71#define PINMUX15 0x3c
72#define PINMUX16 0x40
73#define PINMUX17 0x44
74#define PINMUX18 0x48
75#define PINMUX19 0x4c
76
55c79a40 77void __init da830_init(void);
e1a8d7e2 78void __init da850_init(void);
55c79a40
MG		 79
80int da8xx_register_edma(void);
81int da8xx_register_i2c(int instance, struct davinci_i2c_platform_data *pdata);
82int da8xx_register_watchdog(void);
e5d3d252 83int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata);
55c79a40 84int da8xx_register_emac(void);
b9e6342b 85int da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata);
700691f2 86int da8xx_register_mmcsd0(struct davinci_mmc_config *config);
b8864aa4 87void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata);
c51df70b 88int da8xx_register_rtc(void);
683b1e1f 89int da850_register_cpufreq(void);
55c79a40
MG		 90
91extern struct platform_device da8xx_serial_device;
92extern struct emac_platform_data da8xx_emac_pdata;
b9e6342b
MG		 93extern struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata;
94extern struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata;
55c79a40
MG		 95
96extern const short da830_emif25_pins[];
97extern const short da830_spi0_pins[];
98extern const short da830_spi1_pins[];
99extern const short da830_mmc_sd_pins[];
100extern const short da830_uart0_pins[];
101extern const short da830_uart1_pins[];
102extern const short da830_uart2_pins[];
103extern const short da830_usb20_pins[];
104extern const short da830_usb11_pins[];
105extern const short da830_uhpi_pins[];
106extern const short da830_cpgmac_pins[];
107extern const short da830_emif3c_pins[];
108extern const short da830_mcasp0_pins[];
109extern const short da830_mcasp1_pins[];
110extern const short da830_mcasp2_pins[];
111extern const short da830_i2c0_pins[];
112extern const short da830_i2c1_pins[];
113extern const short da830_lcdcntl_pins[];
114extern const short da830_pwm_pins[];
115extern const short da830_ecap0_pins[];
116extern const short da830_ecap1_pins[];
117extern const short da830_ecap2_pins[];
118extern const short da830_eqep0_pins[];
119extern const short da830_eqep1_pins[];
120
e1a8d7e2
SR		 121extern const short da850_uart0_pins[];
122extern const short da850_uart1_pins[];
123extern const short da850_uart2_pins[];
124extern const short da850_i2c0_pins[];
125extern const short da850_i2c1_pins[];
5a4b1315 126extern const short da850_cpgmac_pins[];
e33ef5e3 127extern const short da850_mcasp_pins[];
5cbdf276 128extern const short da850_lcdcntl_pins[];
700691f2 129extern const short da850_mmcsd0_pins[];
38beb929 130extern const short da850_nand_pins[];
7c5ec609 131extern const short da850_nor_pins[];
e1a8d7e2 132
c96b56c5 133int da8xx_pinmux_setup(const short pins[]);
55c79a40
MG		 134
135#endif /* __ASM_ARCH_DAVINCI_DA8XX_H */
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