[net-next-2.6.git] / arch / arm / kernel / debug.S

/*
 *  linux/arch/arm/kernel/debug.S
 *
 *  Copyright (C) 1994-1999 Russell King
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 *  32-bit debugging code
 */
#include <linux/linkage.h>

		.text

/*
 * Some debugging routines (useful if you've got MM problems and
 * printk isn't working).  For DEBUGGING ONLY!!!  Do not leave
 * references to these in a production kernel!
 */

#if defined(CONFIG_DEBUG_ICEDCC)
		@@ debug using ARM EmbeddedICE DCC channel

#if defined(CONFIG_CPU_V6)

		.macro	addruart, rx, tmp
		.endm

		.macro	senduart, rd, rx
		mcr	p14, 0, \rd, c0, c5, 0
		.endm

		.macro	busyuart, rd, rx
1001:
		mrc	p14, 0, \rx, c0, c1, 0
		tst	\rx, #0x20000000
		beq	1001b
		.endm

		.macro	waituart, rd, rx
		mov	\rd, #0x2000000
1001:
		subs	\rd, \rd, #1
		bmi	1002f
		mrc	p14, 0, \rx, c0, c1, 0
		tst	\rx, #0x20000000
		bne	1001b
1002:
		.endm

#elif defined(CONFIG_CPU_V7)

		.macro	addruart, rx, tmp
		.endm

		.macro	senduart, rd, rx
		mcr	p14, 0, \rd, c0, c5, 0
		.endm

		.macro	busyuart, rd, rx
busy:		mrc	p14, 0, pc, c0, c1, 0
		bcs	busy
		.endm

		.macro	waituart, rd, rx
wait:		mrc	p14, 0, pc, c0, c1, 0
		bcs	wait

		.endm

#elif defined(CONFIG_CPU_XSCALE)

		.macro	addruart, rx, tmp
		.endm

		.macro	senduart, rd, rx
		mcr	p14, 0, \rd, c8, c0, 0
		.endm

		.macro	busyuart, rd, rx
1001:
		mrc	p14, 0, \rx, c14, c0, 0
		tst	\rx, #0x10000000
		beq	1001b
		.endm

		.macro	waituart, rd, rx
		mov	\rd, #0x10000000
1001:
		subs	\rd, \rd, #1
		bmi	1002f
		mrc	p14, 0, \rx, c14, c0, 0
		tst	\rx, #0x10000000
		bne	1001b
1002:
		.endm

#else

		.macro	addruart, rx, tmp
		.endm

		.macro	senduart, rd, rx
		mcr	p14, 0, \rd, c1, c0, 0
		.endm

		.macro	busyuart, rd, rx
1001:
		mrc	p14, 0, \rx, c0, c0, 0
		tst	\rx, #2
		beq	1001b

		.endm

		.macro	waituart, rd, rx
		mov	\rd, #0x2000000
1001:
		subs	\rd, \rd, #1
		bmi	1002f
		mrc	p14, 0, \rx, c0, c0, 0
		tst	\rx, #2
		bne	1001b
1002:
		.endm

#endif	/* CONFIG_CPU_V6 */

#else
#include <mach/debug-macro.S>
#endif	/* CONFIG_DEBUG_ICEDCC */

/*
 * Useful debugging routines
 */
ENTRY(printhex8)
		mov	r1, #8
		b	printhex
ENDPROC(printhex8)

ENTRY(printhex4)
		mov	r1, #4
		b	printhex
ENDPROC(printhex4)

ENTRY(printhex2)
		mov	r1, #2
printhex:	adr	r2, hexbuf
		add	r3, r2, r1
		mov	r1, #0
		strb	r1, [r3]
1:		and	r1, r0, #15
		mov	r0, r0, lsr #4
		cmp	r1, #10
		addlt	r1, r1, #'0'
		addge	r1, r1, #'a' - 10
		strb	r1, [r3, #-1]!
		teq	r3, r2
		bne	1b
		mov	r0, r2
		b	printascii
ENDPROC(printhex2)

		.ltorg

ENTRY(printascii)
		addruart r3, r1
		b	2f
1:		waituart r2, r3
		senduart r1, r3
		busyuart r2, r3
		teq	r1, #'\n'
		moveq	r1, #'\r'
		beq	1b
2:		teq	r0, #0
		ldrneb	r1, [r0], #1
		teqne	r1, #0
		bne	1b
		mov	pc, lr
ENDPROC(printascii)

ENTRY(printch)
		addruart r3, r1
		mov	r1, r0
		mov	r0, #0
		b	1b
ENDPROC(printch)

hexbuf:		.space 16
Commit	Line	Data
1da177e4 LT	1	/*
	2	* linux/arch/arm/kernel/debug.S
	3	*
	4	* Copyright (C) 1994-1999 Russell King
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2 as
	8	* published by the Free Software Foundation.
	9	*
	10	* 32-bit debugging code
	11	*/
1da177e4	12	#include <linux/linkage.h>
1da177e4 LT	13
	14	.text
	15
	16	/*
	17	* Some debugging routines (useful if you've got MM problems and
	18	* printk isn't working). For DEBUGGING ONLY!!! Do not leave
	19	* references to these in a production kernel!
	20	*/
	21
	22	#if defined(CONFIG_DEBUG_ICEDCC)
	23	@@ debug using ARM EmbeddedICE DCC channel
7d95ded9 TL	24
	25	#if defined(CONFIG_CPU_V6)
	26
4e6d488a	27	.macro addruart, rx, tmp
7d95ded9 TL	28	.endm
	29
	30	.macro senduart, rd, rx
	31	mcr p14, 0, \rd, c0, c5, 0
	32	.endm
	33
	34	.macro busyuart, rd, rx
	35	1001:
	36	mrc p14, 0, \rx, c0, c1, 0
	37	tst \rx, #0x20000000
	38	beq 1001b
	39	.endm
	40
	41	.macro waituart, rd, rx
	42	mov \rd, #0x2000000
	43	1001:
	44	subs \rd, \rd, #1
	45	bmi 1002f
	46	mrc p14, 0, \rx, c0, c1, 0
	47	tst \rx, #0x20000000
	48	bne 1001b
	49	1002:
	50	.endm
	51
200b7a8d TL	52	#elif defined(CONFIG_CPU_V7)
200b7a8d TL	53
4e6d488a	54	.macro addruart, rx, tmp
200b7a8d TL	55	.endm
	56
	57	.macro senduart, rd, rx
	58	mcr p14, 0, \rd, c0, c5, 0
	59	.endm
	60
	61	.macro busyuart, rd, rx
	62	busy: mrc p14, 0, pc, c0, c1, 0
	63	bcs busy
	64	.endm
	65
	66	.macro waituart, rd, rx
	67	wait: mrc p14, 0, pc, c0, c1, 0
	68	bcs wait
	69
	70	.endm
	71
c633c3cf JCPV	72	#elif defined(CONFIG_CPU_XSCALE)
c633c3cf JCPV	73
4e6d488a	74	.macro addruart, rx, tmp
c633c3cf JCPV	75	.endm
	76
	77	.macro senduart, rd, rx
	78	mcr p14, 0, \rd, c8, c0, 0
	79	.endm
	80
	81	.macro busyuart, rd, rx
	82	1001:
	83	mrc p14, 0, \rx, c14, c0, 0
	84	tst \rx, #0x10000000
	85	beq 1001b
	86	.endm
	87
	88	.macro waituart, rd, rx
	89	mov \rd, #0x10000000
	90	1001:
	91	subs \rd, \rd, #1
	92	bmi 1002f
	93	mrc p14, 0, \rx, c14, c0, 0
	94	tst \rx, #0x10000000
	95	bne 1001b
	96	1002:
	97	.endm
	98
7d95ded9 TL	99	#else
7d95ded9 TL	100
4e6d488a	101	.macro addruart, rx, tmp
1da177e4 LT	102	.endm
	103
	104	.macro senduart, rd, rx
	105	mcr p14, 0, \rd, c1, c0, 0
	106	.endm
	107
	108	.macro busyuart, rd, rx
	109	1001:
	110	mrc p14, 0, \rx, c0, c0, 0
	111	tst \rx, #2
	112	beq 1001b
	113
	114	.endm
	115
	116	.macro waituart, rd, rx
	117	mov \rd, #0x2000000
	118	1001:
	119	subs \rd, \rd, #1
	120	bmi 1002f
	121	mrc p14, 0, \rx, c0, c0, 0
	122	tst \rx, #2
	123	bne 1001b
	124	1002:
	125	.endm
7d95ded9 TL	126
	127	#endif /* CONFIG_CPU_V6 */
	128
1da177e4	129	#else
a09e64fb	130	#include <mach/debug-macro.S>
7d95ded9	131	#endif /* CONFIG_DEBUG_ICEDCC */
1da177e4 LT	132
	133	/*
	134	* Useful debugging routines
	135	*/
	136	ENTRY(printhex8)
	137	mov r1, #8
	138	b printhex
93ed3970	139	ENDPROC(printhex8)
1da177e4 LT	140
	141	ENTRY(printhex4)
	142	mov r1, #4
	143	b printhex
93ed3970	144	ENDPROC(printhex4)
1da177e4 LT	145
	146	ENTRY(printhex2)
	147	mov r1, #2
	148	printhex: adr r2, hexbuf
	149	add r3, r2, r1
	150	mov r1, #0
	151	strb r1, [r3]
	152	1: and r1, r0, #15
	153	mov r0, r0, lsr #4
	154	cmp r1, #10
	155	addlt r1, r1, #'0'
	156	addge r1, r1, #'a' - 10
	157	strb r1, [r3, #-1]!
	158	teq r3, r2
	159	bne 1b
	160	mov r0, r2
	161	b printascii
93ed3970	162	ENDPROC(printhex2)
1da177e4 LT	163
	164	.ltorg
	165
	166	ENTRY(printascii)
4e6d488a	167	addruart r3, r1
1da177e4 LT	168	b 2f
	169	1: waituart r2, r3
	170	senduart r1, r3
	171	busyuart r2, r3
	172	teq r1, #'\n'
	173	moveq r1, #'\r'
	174	beq 1b
	175	2: teq r0, #0
	176	ldrneb r1, [r0], #1
	177	teqne r1, #0
	178	bne 1b
	179	mov pc, lr
93ed3970	180	ENDPROC(printascii)
1da177e4 LT	181
1da177e4 LT	182	ENTRY(printch)
4e6d488a	183	addruart r3, r1
1da177e4 LT	184	mov r1, r0
	185	mov r0, #0
	186	b 1b
93ed3970	187	ENDPROC(printch)
1da177e4 LT	188
1da177e4 LT	189	hexbuf: .space 16